ATE467866T1 - Prozessor mit geschwindigkeitsverringerung durch programmierten haltzyklus - Google Patents
Prozessor mit geschwindigkeitsverringerung durch programmierten haltzyklusInfo
- Publication number
- ATE467866T1 ATE467866T1 AT02755453T AT02755453T ATE467866T1 AT E467866 T1 ATE467866 T1 AT E467866T1 AT 02755453 T AT02755453 T AT 02755453T AT 02755453 T AT02755453 T AT 02755453T AT E467866 T1 ATE467866 T1 AT E467866T1
- Authority
- AT
- Austria
- Prior art keywords
- processor
- clock cycles
- speed reduction
- hold cycle
- predetermined amount
- Prior art date
Links
- YBJHBAHKTGYVGT-ZKWXMUAHSA-N (+)-Biotin Chemical compound N1C(=O)N[C@@H]2[C@H](CCCCC(=O)O)SC[C@@H]21 YBJHBAHKTGYVGT-ZKWXMUAHSA-N 0.000 abstract 1
- FEPMHVLSLDOMQC-UHFFFAOYSA-N virginiamycin-S1 Natural products CC1OC(=O)C(C=2C=CC=CC=2)NC(=O)C2CC(=O)CCN2C(=O)C(CC=2C=CC=CC=2)N(C)C(=O)C2CCCN2C(=O)C(CC)NC(=O)C1NC(=O)C1=NC=CC=C1O FEPMHVLSLDOMQC-UHFFFAOYSA-N 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Image Processing (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Control Of Stepping Motors (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/920,042 US20030025698A1 (en) | 2001-08-01 | 2001-08-01 | Programmed stall cycles slow-down video processor |
PCT/IB2002/003195 WO2003012631A1 (en) | 2001-08-01 | 2002-07-29 | A processor provided with a slow-down facility through programmed stall cycles |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE467866T1 true ATE467866T1 (de) | 2010-05-15 |
Family
ID=25443059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT02755453T ATE467866T1 (de) | 2001-08-01 | 2002-07-29 | Prozessor mit geschwindigkeitsverringerung durch programmierten haltzyklus |
Country Status (8)
Country | Link |
---|---|
US (2) | US20030025698A1 (de) |
EP (2) | EP2204732A1 (de) |
JP (1) | JP3987032B2 (de) |
KR (1) | KR100984636B1 (de) |
CN (1) | CN1329820C (de) |
AT (1) | ATE467866T1 (de) |
DE (1) | DE60236362D1 (de) |
WO (1) | WO2003012631A1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1646950B1 (de) * | 2003-07-07 | 2008-01-16 | Koninklijke Philips Electronics N.V. | Datenverarbeitungssystem und verfahren zur datenverarbeitung |
US20050156930A1 (en) * | 2004-01-20 | 2005-07-21 | Matsushita Electric Industrial Co., Ltd. | Rendering device and rendering method |
US7877752B2 (en) * | 2005-12-14 | 2011-01-25 | Broadcom Corp. | Method and system for efficient audio scheduling for dual-decode digital signal processor (DSP) |
JP2008097214A (ja) * | 2006-10-10 | 2008-04-24 | Hitachi Ltd | アクセス権管理方法、管理計算機、及び管理プログラム |
CN102097050B (zh) * | 2009-12-11 | 2016-03-09 | 康佳集团股份有限公司 | 一种实现显示信号无缝切换的装置和方法 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3343136A (en) * | 1964-08-17 | 1967-09-19 | Bunker Ramo | Data processing timing apparatus |
JPS6222128A (ja) * | 1985-07-22 | 1987-01-30 | Sharp Corp | デ−タ処理装置 |
GB8820183D0 (en) * | 1988-08-25 | 1988-09-28 | Int Computers Ltd | Data processing apparatus |
JPH03126131A (ja) * | 1989-10-11 | 1991-05-29 | Nec Corp | 中央処理装置の実行速度制御方式 |
US5408150A (en) * | 1992-06-04 | 1995-04-18 | Linear Technology Corporation | Circuit for driving two power mosfets in a half-bridge configuration |
JPH09140126A (ja) * | 1995-05-30 | 1997-05-27 | Linear Technol Corp | 適応スイッチ回路、適応出力回路、制御回路およびスイッチング電圧レギュレータを動作させる方法 |
US5719800A (en) * | 1995-06-30 | 1998-02-17 | Intel Corporation | Performance throttling to reduce IC power consumption |
US5771358A (en) * | 1996-07-15 | 1998-06-23 | Micron Electronics, Inc. | Method and system for apportioning computer bus bandwidth |
US5896141A (en) * | 1996-07-26 | 1999-04-20 | Hewlett-Packard Company | System and method for virtual device access in a computer system |
FR2770660B1 (fr) * | 1997-11-03 | 2000-08-25 | Inside Technologies | Microprocesseur, notamment pour carte a puce |
US5953685A (en) * | 1997-11-26 | 1999-09-14 | Intel Corporation | Method and apparatus to control core logic temperature |
US6674479B2 (en) * | 2000-01-07 | 2004-01-06 | Intel Corporation | Method and apparatus for implementing 4:2:0 to 4:2:2 and 4:2:2 to 4:2:0 color space conversion |
US6662278B1 (en) * | 2000-09-22 | 2003-12-09 | Intel Corporation | Adaptive throttling of memory acceses, such as throttling RDRAM accesses in a real-time system |
US20020126759A1 (en) * | 2001-01-10 | 2002-09-12 | Wen-Hsiao Peng | Method and apparatus for providing prediction mode fine granularity scalability |
DE10225555B3 (de) * | 2002-06-10 | 2004-02-12 | Saint-Gobain Sekurit Deutschland Gmbh & Co. Kg | Verbundscheibe mit Sollbruchstelle |
-
2001
- 2001-08-01 US US09/920,042 patent/US20030025698A1/en not_active Abandoned
-
2002
- 2002-07-29 EP EP10158063A patent/EP2204732A1/de not_active Withdrawn
- 2002-07-29 AT AT02755453T patent/ATE467866T1/de not_active IP Right Cessation
- 2002-07-29 KR KR1020047001372A patent/KR100984636B1/ko not_active IP Right Cessation
- 2002-07-29 CN CNB02814998XA patent/CN1329820C/zh not_active Expired - Fee Related
- 2002-07-29 EP EP02755453A patent/EP1425657B1/de not_active Expired - Lifetime
- 2002-07-29 JP JP2003517741A patent/JP3987032B2/ja not_active Expired - Fee Related
- 2002-07-29 DE DE60236362T patent/DE60236362D1/de not_active Expired - Lifetime
- 2002-07-29 US US10/207,507 patent/US6917365B2/en not_active Expired - Lifetime
- 2002-07-29 WO PCT/IB2002/003195 patent/WO2003012631A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
KR100984636B1 (ko) | 2010-10-05 |
JP2005500601A (ja) | 2005-01-06 |
CN1329820C (zh) | 2007-08-01 |
KR20040018534A (ko) | 2004-03-03 |
US20030025698A1 (en) | 2003-02-06 |
WO2003012631A1 (en) | 2003-02-13 |
DE60236362D1 (de) | 2010-06-24 |
EP2204732A1 (de) | 2010-07-07 |
EP1425657A1 (de) | 2004-06-09 |
US6917365B2 (en) | 2005-07-12 |
JP3987032B2 (ja) | 2007-10-03 |
US20030070107A1 (en) | 2003-04-10 |
CN1537269A (zh) | 2004-10-13 |
EP1425657B1 (de) | 2010-05-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |