ATE422258T1 - Speichereffizientes anweisungsverarbeitungsschema - Google Patents

Speichereffizientes anweisungsverarbeitungsschema

Info

Publication number
ATE422258T1
ATE422258T1 AT04799277T AT04799277T ATE422258T1 AT E422258 T1 ATE422258 T1 AT E422258T1 AT 04799277 T AT04799277 T AT 04799277T AT 04799277 T AT04799277 T AT 04799277T AT E422258 T1 ATE422258 T1 AT E422258T1
Authority
AT
Austria
Prior art keywords
instruction processing
processing scheme
measured
linear interference
memory efficient
Prior art date
Application number
AT04799277T
Other languages
English (en)
Inventor
Peter Dytrych
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE422258T1 publication Critical patent/ATE422258T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017Runtime instruction translation, e.g. macros
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Optical Recording Or Reproduction (AREA)
AT04799277T 2003-12-16 2004-11-30 Speichereffizientes anweisungsverarbeitungsschema ATE422258T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03104704 2003-12-16

Publications (1)

Publication Number Publication Date
ATE422258T1 true ATE422258T1 (de) 2009-02-15

Family

ID=34684589

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04799277T ATE422258T1 (de) 2003-12-16 2004-11-30 Speichereffizientes anweisungsverarbeitungsschema

Country Status (7)

Country Link
US (1) US7716456B2 (de)
EP (1) EP1697830B1 (de)
JP (1) JP2007514245A (de)
CN (1) CN100485606C (de)
AT (1) ATE422258T1 (de)
DE (1) DE602004019346D1 (de)
WO (1) WO2005059738A2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009026106A (ja) * 2007-07-20 2009-02-05 Oki Electric Ind Co Ltd 命令コード圧縮方法と命令フェッチ回路
WO2011028116A2 (en) * 2009-09-04 2011-03-10 Silicon Hive B.V. Method and apparatus and record carrier
JP5590849B2 (ja) * 2009-10-08 2014-09-17 キヤノン株式会社 複数の処理モジュールを有する並列処理回路を備えるデータ処理装置、その制御装置、およびその制御方法、プログラム
US9201652B2 (en) 2011-05-03 2015-12-01 Qualcomm Incorporated Methods and apparatus for storage and translation of entropy encoded software embedded within a memory hierarchy
US10120692B2 (en) 2011-07-28 2018-11-06 Qualcomm Incorporated Methods and apparatus for storage and translation of an entropy encoded instruction sequence to executable form
CN111090467A (zh) * 2016-04-26 2020-05-01 中科寒武纪科技股份有限公司 一种用于执行矩阵乘运算的装置和方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6154828A (en) * 1993-06-03 2000-11-28 Compaq Computer Corporation Method and apparatus for employing a cycle bit parallel executing instructions
JPH07121352A (ja) * 1993-10-21 1995-05-12 Canon Inc 演算処理装置
US5870576A (en) * 1996-12-16 1999-02-09 Hewlett-Packard Company Method and apparatus for storing and expanding variable-length program instructions upon detection of a miss condition within an instruction cache containing pointers to compressed instructions for wide instruction word processor architectures
JPH1185512A (ja) * 1997-09-03 1999-03-30 Fujitsu Ltd 命令圧縮格納および命令復元機能を有するデータ処理装置
JP3692793B2 (ja) * 1998-09-04 2005-09-07 松下電器産業株式会社 コンパイラ、プロセッサおよび記録媒体
JP2000305781A (ja) * 1999-04-21 2000-11-02 Mitsubishi Electric Corp Vliw方式プロセッサ、コード圧縮装置、コード圧縮方法およびコード圧縮プログラムを記録した媒体
GB2366643B (en) * 2000-05-25 2002-05-01 Siroyan Ltd Methods of compressing instructions for processors

Also Published As

Publication number Publication date
EP1697830A2 (de) 2006-09-06
WO2005059738A3 (en) 2006-12-28
CN101010666A (zh) 2007-08-01
US20070162724A1 (en) 2007-07-12
EP1697830B1 (de) 2009-02-04
WO2005059738A2 (en) 2005-06-30
US7716456B2 (en) 2010-05-11
JP2007514245A (ja) 2007-05-31
DE602004019346D1 (de) 2009-03-19
CN100485606C (zh) 2009-05-06

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Legal Events

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