ATE371217T1 - Vektorverarbeitungsvorrichtung, datenverarbeitungsvorrichtung und datenverarbeitungsmethode zur verringerung von störsignalen bei gleichzeitigem schalten - Google Patents

Vektorverarbeitungsvorrichtung, datenverarbeitungsvorrichtung und datenverarbeitungsmethode zur verringerung von störsignalen bei gleichzeitigem schalten

Info

Publication number
ATE371217T1
ATE371217T1 AT05015681T AT05015681T ATE371217T1 AT E371217 T1 ATE371217 T1 AT E371217T1 AT 05015681 T AT05015681 T AT 05015681T AT 05015681 T AT05015681 T AT 05015681T AT E371217 T1 ATE371217 T1 AT E371217T1
Authority
AT
Austria
Prior art keywords
vector
data processing
processing device
computing units
simultaneous switching
Prior art date
Application number
AT05015681T
Other languages
English (en)
Inventor
Hidemasa Toda
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Application granted granted Critical
Publication of ATE371217T1 publication Critical patent/ATE371217T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
  • Noise Elimination (AREA)
  • Image Processing (AREA)
AT05015681T 2004-07-26 2005-07-19 Vektorverarbeitungsvorrichtung, datenverarbeitungsvorrichtung und datenverarbeitungsmethode zur verringerung von störsignalen bei gleichzeitigem schalten ATE371217T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004217283A JP4079923B2 (ja) 2004-07-26 2004-07-26 ベクトル処理装置、情報処理装置、および、ベクトル処理方法

Publications (1)

Publication Number Publication Date
ATE371217T1 true ATE371217T1 (de) 2007-09-15

Family

ID=35159845

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05015681T ATE371217T1 (de) 2004-07-26 2005-07-19 Vektorverarbeitungsvorrichtung, datenverarbeitungsvorrichtung und datenverarbeitungsmethode zur verringerung von störsignalen bei gleichzeitigem schalten

Country Status (9)

Country Link
US (1) US20060020768A1 (de)
EP (1) EP1624380B1 (de)
JP (1) JP4079923B2 (de)
KR (1) KR100703764B1 (de)
AT (1) ATE371217T1 (de)
AU (1) AU2005203127A1 (de)
CA (1) CA2512316A1 (de)
DE (1) DE602005002096T2 (de)
DK (1) DK1624380T3 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100973083B1 (ko) * 2008-12-31 2010-07-29 전자부품연구원 어레이 기반의 움직임 벡터 추출기 및 그 방법
JP5804507B2 (ja) * 2011-09-26 2015-11-04 Ｎｅｃプラットフォームズ株式会社 演算処理装置及び演算器同時実行制御方法
GB2553783B (en) * 2016-09-13 2020-11-04 Advanced Risc Mach Ltd Vector multiply-add instruction

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4789925A (en) * 1985-07-31 1988-12-06 Unisys Corporation Vector data logical usage conflict detection
US5021945A (en) * 1985-10-31 1991-06-04 Mcc Development, Ltd. Parallel processor system for processing natural concurrencies and method therefor
JP2921190B2 (ja) * 1991-07-25 1999-07-19 日本電気株式会社 並列実行方式
US5274818A (en) * 1992-02-03 1993-12-28 Thinking Machines Corporation System and method for compiling a fine-grained array based source program onto a course-grained hardware
US6122767A (en) * 1993-06-03 2000-09-19 Texas Instruments Incorporated Method and apparatus for noise reduction of cyclic signal by selecting majority logic state of corresponding portions of plural cycles
JPH0744508A (ja) * 1993-08-03 1995-02-14 Hitachi Ltd プログラム分割方法
US6016395A (en) * 1996-10-18 2000-01-18 Samsung Electronics Co., Ltd. Programming a vector processor and parallel programming of an asymmetric dual multiprocessor comprised of a vector processor and a risc processor
US5987620A (en) * 1997-09-19 1999-11-16 Thang Tran Method and apparatus for a self-timed and self-enabled distributed clock
DE19743284C1 (de) * 1997-09-30 1999-03-11 Siemens Ag Schaltungsanordnung zur Reduzierung von Störungen infolge des Schaltes eines Ausgangstreibers
US6550059B1 (en) * 1999-10-04 2003-04-15 Advanced Micro Devices, Inc. Method for generating optimized vector instructions from high level programming languages
US6832214B1 (en) * 1999-12-07 2004-12-14 International Business Machines Corporation Method, system, and program for converting code to executable code using neural networks implemented in a software program
US6968546B2 (en) * 2001-03-30 2005-11-22 Intel Corporation Debugging support using dynamic re-compilation
US7278137B1 (en) * 2001-12-26 2007-10-02 Arc International Methods and apparatus for compiling instructions for a data processor
US6983387B2 (en) * 2002-10-17 2006-01-03 International Business Machines Corporation Microprocessor chip simultaneous switching current reduction method and apparatus

Also Published As

Publication number Publication date
JP2006039840A (ja) 2006-02-09
EP1624380A2 (de) 2006-02-08
AU2005203127A1 (en) 2006-02-09
DE602005002096T2 (de) 2008-07-24
KR20060046730A (ko) 2006-05-17
US20060020768A1 (en) 2006-01-26
DE602005002096D1 (de) 2007-10-04
EP1624380A3 (de) 2006-02-22
EP1624380B1 (de) 2007-08-22
DK1624380T3 (da) 2007-11-26
KR100703764B1 (ko) 2007-04-06
JP4079923B2 (ja) 2008-04-23
CA2512316A1 (en) 2006-01-26

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