ATE344535T1 - Cmos kompatibler soi-prozess - Google Patents

Cmos kompatibler soi-prozess

Info

Publication number
ATE344535T1
ATE344535T1 AT00114377T AT00114377T ATE344535T1 AT E344535 T1 ATE344535 T1 AT E344535T1 AT 00114377 T AT00114377 T AT 00114377T AT 00114377 T AT00114377 T AT 00114377T AT E344535 T1 ATE344535 T1 AT E344535T1
Authority
AT
Austria
Prior art keywords
troughs
components
type
trough
layer
Prior art date
Application number
AT00114377T
Other languages
English (en)
Inventor
Ralf Dipl-Ing Bornefeld
Original Assignee
Elmos Semiconductor Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elmos Semiconductor Ag filed Critical Elmos Semiconductor Ag
Application granted granted Critical
Publication of ATE344535T1 publication Critical patent/ATE344535T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76283—Lateral isolation by refilling of trenches with dielectric material

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
  • Medicines Containing Antibodies Or Antigens For Use As Internal Diagnostic Agents (AREA)
AT00114377T 1999-07-06 2000-07-05 Cmos kompatibler soi-prozess ATE344535T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19931030 1999-07-06
EP99121430 1999-10-27

Publications (1)

Publication Number Publication Date
ATE344535T1 true ATE344535T1 (de) 2006-11-15

Family

ID=26054057

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00114377T ATE344535T1 (de) 1999-07-06 2000-07-05 Cmos kompatibler soi-prozess

Country Status (3)

Country Link
US (1) US6326288B1 (de)
AT (1) ATE344535T1 (de)
DE (1) DE50013674D1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6573565B2 (en) * 1999-07-28 2003-06-03 International Business Machines Corporation Method and structure for providing improved thermal conduction for silicon semiconductor devices
WO2004068608A2 (de) * 2003-01-14 2004-08-12 Polyic Gmbh & Co. Kg Organischer feldeffekt transistor, integrierter schaltkreis
JP4065855B2 (ja) * 2004-01-21 2008-03-26 株式会社日立製作所 生体および化学試料検査装置
DE102005017655B4 (de) 2005-04-15 2008-12-11 Polyic Gmbh & Co. Kg Mehrschichtiger Verbundkörper mit elektronischer Funktion
DE102005031448A1 (de) 2005-07-04 2007-01-11 Polyic Gmbh & Co. Kg Aktivierbare optische Schicht
DE102005035589A1 (de) 2005-07-29 2007-02-01 Polyic Gmbh & Co. Kg Verfahren zur Herstellung eines elektronischen Bauelements
DE102005044306A1 (de) 2005-09-16 2007-03-22 Polyic Gmbh & Co. Kg Elektronische Schaltung und Verfahren zur Herstellung einer solchen
DE102006047388A1 (de) * 2006-10-06 2008-04-17 Polyic Gmbh & Co. Kg Feldeffekttransistor sowie elektrische Schaltung
EP1998372A1 (de) * 2007-05-30 2008-12-03 NEC Electronics Corporation SOI Halbleiterbauelement

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4578128A (en) * 1984-12-03 1986-03-25 Ncr Corporation Process for forming retrograde dopant distributions utilizing simultaneous outdiffusion of dopants
US4740827A (en) * 1985-09-30 1988-04-26 Kabushiki Kaisha Toshiba CMOS semiconductor device
US5053350A (en) * 1989-03-23 1991-10-01 Grumman Aerospace Corporation Method of making trench MOSFET capacitor cell for analog signal processing
JP3097200B2 (ja) * 1991-08-26 2000-10-10 日本電気株式会社 半導体装置
US5382541A (en) * 1992-08-26 1995-01-17 Harris Corporation Method for forming recessed oxide isolation containing deep and shallow trenches
JP3273582B2 (ja) * 1994-05-13 2002-04-08 キヤノン株式会社 記憶装置
US5583368A (en) * 1994-08-11 1996-12-10 International Business Machines Corporation Stacked devices
US5622880A (en) * 1994-08-18 1997-04-22 Sun Microsystems, Inc. Method of making a low power, high performance junction transistor
US5559368A (en) * 1994-08-30 1996-09-24 The Regents Of The University Of California Dynamic threshold voltage mosfet having gate to body connection for ultra-low voltage operation
JPH08153804A (ja) * 1994-09-28 1996-06-11 Sony Corp ゲート電極の形成方法
US6172405B1 (en) * 1998-07-17 2001-01-09 Sharp Kabushiki Kaisha Semiconductor device and production process therefore

Also Published As

Publication number Publication date
US6326288B1 (en) 2001-12-04
DE50013674D1 (de) 2006-12-14

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