ATE173842T1 - Reservierung, die den normalen vorrang von mikroprozessoren in multiprozessorrechnersystemen annulliert - Google Patents

Reservierung, die den normalen vorrang von mikroprozessoren in multiprozessorrechnersystemen annulliert

Info

Publication number
ATE173842T1
ATE173842T1 AT93922810T AT93922810T ATE173842T1 AT E173842 T1 ATE173842 T1 AT E173842T1 AT 93922810 T AT93922810 T AT 93922810T AT 93922810 T AT93922810 T AT 93922810T AT E173842 T1 ATE173842 T1 AT E173842T1
Authority
AT
Austria
Prior art keywords
bus
priority
bus master
host bus
host
Prior art date
Application number
AT93922810T
Other languages
English (en)
Inventor
Maria L Melo
Jeff W Wolford
Michael Moriarty
Paul R Culley
Arnold T Schnell
Original Assignee
Compaq Computer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compaq Computer Corp filed Critical Compaq Computer Corp
Application granted granted Critical
Publication of ATE173842T1 publication Critical patent/ATE173842T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Bus Control (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Debugging And Monitoring (AREA)
AT93922810T 1992-10-02 1993-09-29 Reservierung, die den normalen vorrang von mikroprozessoren in multiprozessorrechnersystemen annulliert ATE173842T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/956,034 US5553248A (en) 1992-10-02 1992-10-02 System for awarding the highest priority to a microprocessor releasing a system bus after aborting a locked cycle upon detecting a locked retry signal

Publications (1)

Publication Number Publication Date
ATE173842T1 true ATE173842T1 (de) 1998-12-15

Family

ID=25497682

Family Applications (1)

Application Number Title Priority Date Filing Date
AT93922810T ATE173842T1 (de) 1992-10-02 1993-09-29 Reservierung, die den normalen vorrang von mikroprozessoren in multiprozessorrechnersystemen annulliert

Country Status (8)

Country Link
US (1) US5553248A (de)
EP (1) EP0615640B1 (de)
JP (1) JP2742728B2 (de)
AT (1) ATE173842T1 (de)
AU (1) AU5168993A (de)
CA (1) CA2121720A1 (de)
DE (1) DE69322248T2 (de)
WO (1) WO1994008302A1 (de)

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US7162619B2 (en) * 2001-07-03 2007-01-09 Ip-First, Llc Apparatus and method for densely packing a branch instruction predicted by a branch target address cache and associated target instructions into a byte-wide instruction buffer
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Also Published As

Publication number Publication date
EP0615640B1 (de) 1998-11-25
JPH06511101A (ja) 1994-12-08
DE69322248T2 (de) 1999-04-22
JP2742728B2 (ja) 1998-04-22
DE69322248D1 (de) 1999-01-07
EP0615640A1 (de) 1994-09-21
AU5168993A (en) 1994-04-26
WO1994008302A1 (en) 1994-04-14
US5553248A (en) 1996-09-03
CA2121720A1 (en) 1994-04-14

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties