ATA14062003A - Digitale signalverarbeitungseinrichtung - Google Patents

Digitale signalverarbeitungseinrichtung

Info

Publication number
ATA14062003A
ATA14062003A AT0140603A AT14062003A ATA14062003A AT A14062003 A ATA14062003 A AT A14062003A AT 0140603 A AT0140603 A AT 0140603A AT 14062003 A AT14062003 A AT 14062003A AT A14062003 A ATA14062003 A AT A14062003A
Authority
AT
Austria
Prior art keywords
processing device
signal processing
digital signal
digital
signal
Prior art date
Application number
AT0140603A
Other languages
English (en)
Other versions
AT413895B (de
Original Assignee
On Demand Informationstechnolo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by On Demand Informationstechnolo filed Critical On Demand Informationstechnolo
Priority to AT0140603A priority Critical patent/AT413895B/de
Priority to CA002537549A priority patent/CA2537549A1/en
Priority to US10/571,021 priority patent/US20070033152A1/en
Priority to EP04761027A priority patent/EP1665029A2/de
Priority to PCT/AT2004/000305 priority patent/WO2005024542A2/de
Publication of ATA14062003A publication Critical patent/ATA14062003A/de
Application granted granted Critical
Publication of AT413895B publication Critical patent/AT413895B/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/14—Conversion to or from non-weighted codes
    • H03M7/24—Conversion to or from floating-point codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q99/00—Subject matter not provided for in other groups of this subclass
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/3824—Accepting both fixed-point and floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
AT0140603A 2003-09-08 2003-09-08 Digitale signalverarbeitungseinrichtung AT413895B (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
AT0140603A AT413895B (de) 2003-09-08 2003-09-08 Digitale signalverarbeitungseinrichtung
CA002537549A CA2537549A1 (en) 2003-09-08 2004-09-07 Digital signal processing device
US10/571,021 US20070033152A1 (en) 2003-09-08 2004-09-07 Digital signal processing device
EP04761027A EP1665029A2 (de) 2003-09-08 2004-09-07 Digitale signalverarbeitungseinrichtung
PCT/AT2004/000305 WO2005024542A2 (de) 2003-09-08 2004-09-07 Digitale signalverarbeitungseinrichtung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AT0140603A AT413895B (de) 2003-09-08 2003-09-08 Digitale signalverarbeitungseinrichtung

Publications (2)

Publication Number Publication Date
ATA14062003A true ATA14062003A (de) 2005-10-15
AT413895B AT413895B (de) 2006-07-15

Family

ID=34229714

Family Applications (1)

Application Number Title Priority Date Filing Date
AT0140603A AT413895B (de) 2003-09-08 2003-09-08 Digitale signalverarbeitungseinrichtung

Country Status (5)

Country Link
US (1) US20070033152A1 (de)
EP (1) EP1665029A2 (de)
AT (1) AT413895B (de)
CA (1) CA2537549A1 (de)
WO (1) WO2005024542A2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7515456B2 (en) * 2006-09-11 2009-04-07 Infineon Technologies Ag Memory circuit, a dynamic random access memory, a system comprising a memory and a floating point unit and a method for storing digital data
US11221872B2 (en) 2015-10-08 2022-01-11 Shanghai Zhaoxin Semiconductor Co., Ltd. Neural network unit that interrupts processing core upon condition
CN106485318B (zh) * 2015-10-08 2019-08-30 上海兆芯集成电路有限公司 具有混合协处理器/执行单元神经网络单元的处理器
US11226840B2 (en) 2015-10-08 2022-01-18 Shanghai Zhaoxin Semiconductor Co., Ltd. Neural network unit that interrupts processing core upon condition
US10671564B2 (en) 2015-10-08 2020-06-02 Via Alliance Semiconductor Co., Ltd. Neural network unit that performs convolutions using collective shift register among array of neural processing units
US11029949B2 (en) 2015-10-08 2021-06-08 Shanghai Zhaoxin Semiconductor Co., Ltd. Neural network unit
US10776690B2 (en) * 2015-10-08 2020-09-15 Via Alliance Semiconductor Co., Ltd. Neural network unit with plurality of selectable output functions
US10228911B2 (en) * 2015-10-08 2019-03-12 Via Alliance Semiconductor Co., Ltd. Apparatus employing user-specified binary point fixed point arithmetic
US11216720B2 (en) 2015-10-08 2022-01-04 Shanghai Zhaoxin Semiconductor Co., Ltd. Neural network unit that manages power consumption based on memory accesses per period
US10664751B2 (en) 2016-12-01 2020-05-26 Via Alliance Semiconductor Co., Ltd. Processor with memory array operable as either cache memory or neural network unit memory
US10725934B2 (en) 2015-10-08 2020-07-28 Shanghai Zhaoxin Semiconductor Co., Ltd. Processor with selective data storage (of accelerator) operable as either victim cache data storage or accelerator memory and having victim cache tags in lower level cache wherein evicted cache line is stored in said data storage when said data storage is in a first mode and said cache line is stored in system memory rather then said data store when said data storage is in a second mode
US10380481B2 (en) 2015-10-08 2019-08-13 Via Alliance Semiconductor Co., Ltd. Neural network unit that performs concurrent LSTM cell calculations
US10423876B2 (en) 2016-12-01 2019-09-24 Via Alliance Semiconductor Co., Ltd. Processor with memory array operable as either victim cache or neural network unit memory
US10430706B2 (en) 2016-12-01 2019-10-01 Via Alliance Semiconductor Co., Ltd. Processor with memory array operable as either last level cache slice or neural network unit memory
US10515302B2 (en) 2016-12-08 2019-12-24 Via Alliance Semiconductor Co., Ltd. Neural network unit with mixed data and weight size computation capability
US10586148B2 (en) 2016-12-31 2020-03-10 Via Alliance Semiconductor Co., Ltd. Neural network unit with re-shapeable memory
US10565492B2 (en) 2016-12-31 2020-02-18 Via Alliance Semiconductor Co., Ltd. Neural network unit with segmentable array width rotator
US10140574B2 (en) 2016-12-31 2018-11-27 Via Alliance Semiconductor Co., Ltd Neural network unit with segmentable array width rotator and re-shapeable weight memory to match segment width to provide common weights to multiple rotator segments
US10565494B2 (en) 2016-12-31 2020-02-18 Via Alliance Semiconductor Co., Ltd. Neural network unit with segmentable array width rotator

Family Cites Families (14)

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Publication number Priority date Publication date Assignee Title
US4041461A (en) * 1975-07-25 1977-08-09 International Business Machines Corporation Signal analyzer system
US4876660A (en) * 1987-03-20 1989-10-24 Bipolar Integrated Technology, Inc. Fixed-point multiplier-accumulator architecture
JPH07109975B2 (ja) * 1989-10-02 1995-11-22 富士ゼロックス株式会社 ディジタルフィルタ
US5666300A (en) * 1994-12-22 1997-09-09 Motorola, Inc. Power reduction in a data processing system using pipeline registers and method therefor
US5764549A (en) * 1996-04-29 1998-06-09 International Business Machines Corporation Fast floating point result alignment apparatus
US5930159A (en) * 1996-10-17 1999-07-27 Samsung Electronics Co., Ltd Right-shifting an integer operand and rounding a fractional intermediate result to obtain a rounded integer result
US5745393A (en) * 1996-10-17 1998-04-28 Samsung Electronics Company, Ltd. Left-shifting an integer operand and providing a clamped integer result
US5844827A (en) * 1996-10-17 1998-12-01 Samsung Electronics Co., Ltd. Arithmetic shifter that performs multiply/divide by two to the nth power for positive and negative N
KR100236533B1 (ko) * 1997-01-16 2000-01-15 윤종용 배럴 쉬프터와 산술논리 연산기가 연결되어 있는 디지탈 신호 처리기 및 그 오버플로 검출방법
US6317770B1 (en) * 1997-08-30 2001-11-13 Lg Electronics Inc. High speed digital signal processor
US6289365B1 (en) * 1997-12-09 2001-09-11 Sun Microsystems, Inc. System and method for floating-point computation
US6535900B1 (en) * 1998-09-07 2003-03-18 Dsp Group Ltd. Accumulation saturation by means of feedback
KR100325430B1 (ko) * 1999-10-11 2002-02-25 윤종용 상이한 워드 길이의 산술연산을 수행하는 데이터 처리장치 및 그 방법
US6829627B2 (en) * 2001-01-18 2004-12-07 International Business Machines Corporation Floating point unit for multiple data architectures

Also Published As

Publication number Publication date
CA2537549A1 (en) 2005-03-17
WO2005024542A2 (de) 2005-03-17
EP1665029A2 (de) 2006-06-07
US20070033152A1 (en) 2007-02-08
WO2005024542A3 (de) 2005-05-26
AT413895B (de) 2006-07-15

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