AT355354B - CIRCUIT ARRANGEMENT WITH A CENTRAL UNIT TO WHICH SEVERAL PERIPHERAL DEVICES ARE CONNECTED - Google Patents

CIRCUIT ARRANGEMENT WITH A CENTRAL UNIT TO WHICH SEVERAL PERIPHERAL DEVICES ARE CONNECTED

Info

Publication number
AT355354B
AT355354B AT627278A AT627278A AT355354B AT 355354 B AT355354 B AT 355354B AT 627278 A AT627278 A AT 627278A AT 627278 A AT627278 A AT 627278A AT 355354 B AT355354 B AT 355354B
Authority
AT
Austria
Prior art keywords
circuit arrangement
peripheral devices
central unit
several peripheral
several
Prior art date
Application number
AT627278A
Other languages
German (de)
Other versions
ATA627278A (en
Inventor
Jan Ing Hummel
Johann Ing Schmid
Peter Ing Wranek
Original Assignee
Schrack Elektrizitaets Ag E
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schrack Elektrizitaets Ag E filed Critical Schrack Elektrizitaets Ag E
Priority to AT627278A priority Critical patent/AT355354B/en
Publication of ATA627278A publication Critical patent/ATA627278A/en
Priority to DE19792932868 priority patent/DE2932868A1/en
Application granted granted Critical
Publication of AT355354B publication Critical patent/AT355354B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646Configuration or reconfiguration
    • G06F12/0653Configuration or reconfiguration with centralised address assignment
    • G06F12/0661Configuration or reconfiguration with centralised address assignment and decentralised selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
AT627278A 1978-08-29 1978-08-29 CIRCUIT ARRANGEMENT WITH A CENTRAL UNIT TO WHICH SEVERAL PERIPHERAL DEVICES ARE CONNECTED AT355354B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AT627278A AT355354B (en) 1978-08-29 1978-08-29 CIRCUIT ARRANGEMENT WITH A CENTRAL UNIT TO WHICH SEVERAL PERIPHERAL DEVICES ARE CONNECTED
DE19792932868 DE2932868A1 (en) 1978-08-29 1979-08-14 Data processor with central unit connected to peripherals - uses address storage enabling convenient peripheral interchange by use of switching stages each with memory address

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AT627278A AT355354B (en) 1978-08-29 1978-08-29 CIRCUIT ARRANGEMENT WITH A CENTRAL UNIT TO WHICH SEVERAL PERIPHERAL DEVICES ARE CONNECTED

Publications (2)

Publication Number Publication Date
ATA627278A ATA627278A (en) 1979-07-15
AT355354B true AT355354B (en) 1980-02-25

Family

ID=3584624

Family Applications (1)

Application Number Title Priority Date Filing Date
AT627278A AT355354B (en) 1978-08-29 1978-08-29 CIRCUIT ARRANGEMENT WITH A CENTRAL UNIT TO WHICH SEVERAL PERIPHERAL DEVICES ARE CONNECTED

Country Status (2)

Country Link
AT (1) AT355354B (en)
DE (1) DE2932868A1 (en)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4649476A (en) * 1983-10-31 1987-03-10 Motorola, Inc. Microcomputer having an internal address mapper
JPS6145347A (en) * 1984-08-10 1986-03-05 Nec Corp Microcomputer
US4675813A (en) * 1985-01-03 1987-06-23 Northern Telecom Limited Program assignable I/O addresses for a computer
FR2616935B1 (en) * 1987-06-17 1991-06-21 Duranton Rene BUS ADDRESSING DEVICE
JPH01185044A (en) * 1988-01-19 1989-07-24 Mitsubishi Electric Corp Managing circuit for terminal identifier
JP2644554B2 (en) * 1988-11-15 1997-08-25 株式会社日立製作所 Information processing system
DE69210080T2 (en) * 1991-04-15 1996-12-12 Ncr Int Inc Address control arrangement of peripheral devices
DE4342052C2 (en) * 1993-12-09 1996-07-11 Roland Man Druckmasch Control computer that is connected to several peripheral units via an address bus
DE4407895C2 (en) * 1994-03-10 1997-05-22 Reko Electronic Gmbh Method for configuring an information data network
DE4421344A1 (en) * 1994-06-17 1995-12-21 Hartmut B Dr Brinkhus Computer add-on expansion card with software-driven configuration
DE19618802A1 (en) * 1996-05-10 1997-11-13 Kremer Merseburg Horst Interface drive and controller e.g. for remote monitoring and data acquisition of water boiler
DE19701508C2 (en) * 1997-01-17 1999-09-02 Brinkhus Self-configuring modular electronic system, especially computer system
DE29809299U1 (en) 1998-05-22 1998-07-30 Siemens AG, 80333 München Functional unit
DE19857255C1 (en) 1998-12-11 2000-08-03 Hartmut B Brinkhus Self-configuring modular electronic system, especially computer system
FR2841353B1 (en) * 2002-06-25 2005-04-15 Valeo Climatisation METHOD FOR PROGRAMMING ADDRESSES OF A PLURALITY OF PERIPHERALS IN A VEHICLE AIR CONDITIONING INSTALLATION

Also Published As

Publication number Publication date
DE2932868A1 (en) 1980-03-13
ATA627278A (en) 1979-07-15

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee