AT335513B - CIRCUIT ARRANGEMENT FOR THE SECURED ENTRY OF BINAR INFORMATION IN A DIGITAL DATA PROCESSING SYSTEM, IN PARTICULAR FOR RAILWAY SECURITY - Google Patents

CIRCUIT ARRANGEMENT FOR THE SECURED ENTRY OF BINAR INFORMATION IN A DIGITAL DATA PROCESSING SYSTEM, IN PARTICULAR FOR RAILWAY SECURITY

Info

Publication number
AT335513B
AT335513B AT103274A AT103274A AT335513B AT 335513 B AT335513 B AT 335513B AT 103274 A AT103274 A AT 103274A AT 103274 A AT103274 A AT 103274A AT 335513 B AT335513 B AT 335513B
Authority
AT
Austria
Prior art keywords
binar
information
data processing
processing system
digital data
Prior art date
Application number
AT103274A
Other languages
German (de)
Other versions
ATA103274A (en
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of ATA103274A publication Critical patent/ATA103274A/en
Application granted granted Critical
Publication of AT335513B publication Critical patent/AT335513B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B61—RAILWAYS
    • B61L—GUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
    • B61L1/00—Devices along the route controlled by interaction with the vehicle or train
    • B61L1/20—Safety arrangements for preventing or indicating malfunction of the device, e.g. by leakage current, by lightning
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007—Fail-safe circuits
    • H03K19/0075—Fail-safe circuits by using two redundant chains
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/013—Modifications of generator to prevent operation by noise or interference

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Mechanical Engineering (AREA)
  • Quality & Reliability (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT103274A 1973-03-16 1974-02-08 CIRCUIT ARRANGEMENT FOR THE SECURED ENTRY OF BINAR INFORMATION IN A DIGITAL DATA PROCESSING SYSTEM, IN PARTICULAR FOR RAILWAY SECURITY AT335513B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2313186A DE2313186B2 (en) 1973-03-16 1973-03-16 Circuit arrangement for entering binary information into a digital data processing system, in particular for railway safety

Publications (2)

Publication Number Publication Date
ATA103274A ATA103274A (en) 1976-07-15
AT335513B true AT335513B (en) 1977-03-10

Family

ID=5875000

Family Applications (2)

Application Number Title Priority Date Filing Date
AT103274A AT335513B (en) 1973-03-16 1974-02-08 CIRCUIT ARRANGEMENT FOR THE SECURED ENTRY OF BINAR INFORMATION IN A DIGITAL DATA PROCESSING SYSTEM, IN PARTICULAR FOR RAILWAY SECURITY
AT103074A AT335512B (en) 1973-03-16 1974-02-08 CIRCUIT ARRANGEMENT FOR THE SECURED ENTRY OF BINAR INFORMATION IN A DIGITAL DATA PROCESSING SYSTEM, IN PARTICULAR FOR RAILWAY SECURITY

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT103074A AT335512B (en) 1973-03-16 1974-02-08 CIRCUIT ARRANGEMENT FOR THE SECURED ENTRY OF BINAR INFORMATION IN A DIGITAL DATA PROCESSING SYSTEM, IN PARTICULAR FOR RAILWAY SECURITY

Country Status (8)

Country Link
AT (2) AT335513B (en)
BE (1) BE812319A (en)
CH (2) CH582918A5 (en)
DE (1) DE2313186B2 (en)
FR (1) FR2221766B1 (en)
IT (1) IT1003787B (en)
NL (2) NL7403036A (en)
ZA (1) ZA741603B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4231279A (en) * 1978-07-10 1980-11-04 Theriot Joseph E Adaptive washer and bolt assembly
US4506165A (en) * 1982-06-30 1985-03-19 At&T Bell Laboratories Noise rejection Set-Reset Flip-Flop circuitry

Also Published As

Publication number Publication date
FR2221766B1 (en) 1976-10-08
AT335512B (en) 1977-03-10
CH582918A5 (en) 1976-12-15
ZA741603B (en) 1975-02-26
NL7403102A (en) 1974-09-18
DE2313186C3 (en) 1979-06-21
FR2221766A1 (en) 1974-10-11
ATA103074A (en) 1976-07-15
DE2313186A1 (en) 1974-10-03
BE812319A (en) 1974-09-16
IT1003787B (en) 1976-06-10
NL7403036A (en) 1974-09-18
DE2313186B2 (en) 1975-01-16
ATA103274A (en) 1976-07-15
CH591186A5 (en) 1977-09-15

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee