AT318042B - Verfahren zum Herstellen von Zuleitungsrahmen - Google Patents

Verfahren zum Herstellen von Zuleitungsrahmen

Info

Publication number
AT318042B
AT318042B AT773771A AT773771A AT318042B AT 318042 B AT318042 B AT 318042B AT 773771 A AT773771 A AT 773771A AT 773771 A AT773771 A AT 773771A AT 318042 B AT318042 B AT 318042B
Authority
AT
Austria
Prior art keywords
lead frames
manufacturing lead
manufacturing
frames
lead
Prior art date
Application number
AT773771A
Other languages
German (de)
English (en)
Original Assignee
Amp Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amp Inc filed Critical Amp Inc
Application granted granted Critical
Publication of AT318042B publication Critical patent/AT318042B/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67144Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842Mechanical treatment, e.g. punching, cutting, deforming, cold welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49121Beam lead frame or beam lead device
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
AT773771A 1970-09-08 1971-09-06 Verfahren zum Herstellen von Zuleitungsrahmen AT318042B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US7003470A 1970-09-08 1970-09-08

Publications (1)

Publication Number Publication Date
AT318042B true AT318042B (de) 1974-09-25

Family

ID=22092718

Family Applications (1)

Application Number Title Priority Date Filing Date
AT773771A AT318042B (de) 1970-09-08 1971-09-06 Verfahren zum Herstellen von Zuleitungsrahmen

Country Status (11)

Country Link
US (1) US3650232A (fr)
AT (1) AT318042B (fr)
AU (1) AU450494B2 (fr)
BE (1) BE772314A (fr)
CA (1) CA966986A (fr)
DE (1) DE2143809A1 (fr)
ES (1) ES394780A1 (fr)
FR (1) FR2106369B1 (fr)
GB (1) GB1305337A (fr)
NL (1) NL7112352A (fr)
SE (1) SE360216B (fr)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3815205A (en) * 1973-03-02 1974-06-11 Nasa Device for configuring multiple leads
US4158745A (en) * 1977-10-27 1979-06-19 Amp Incorporated Lead frame having integral terminal tabs
US4214120A (en) * 1978-10-27 1980-07-22 Western Electric Company, Inc. Electronic device package having solder leads and methods of assembling the package
US4439918A (en) * 1979-03-12 1984-04-03 Western Electric Co., Inc. Methods of packaging an electronic device
US4252864A (en) * 1979-11-05 1981-02-24 Amp Incorporated Lead frame having integral terminal tabs
FR2538961B1 (fr) * 1982-12-30 1985-07-12 Europ Composants Electron Embase pour circuit integre
KR910001118B1 (ko) * 1985-11-13 1991-02-23 후지쓰 가부시끼가이샤 Ic 시이트 절단 프레스 및 이를 이용한 ic 시이트 가공장치
US4819476A (en) * 1987-07-17 1989-04-11 Amp Incorporated Tooling for forming machines having improved guidance, tool mounting, and pilot pin systems
NL9100470A (nl) * 1991-03-15 1992-10-01 Asm Fico Tooling Werkwijze en inrichting voor het uit op een leadframe opgenomen geintegreerde schakelingen vervaardigen van een enkelvoudig produkt.
US5557504A (en) * 1993-08-31 1996-09-17 Sgs-Thomson Microelectronics, Inc. Surface mountable integrated circuit package with detachable module
US5570273A (en) * 1993-08-31 1996-10-29 Sgs-Thomson Microelectronics, Inc. Surface mountable integrated circuit package with low-profile detachable module
DE69712999T2 (de) * 1996-07-26 2003-01-23 Nec Corp., Tokio/Tokyo Festelektrolytkondensator mit vorplattierten Leiteranschlüssen und dessen Herstellungsverfahren
JP2000243889A (ja) * 1999-02-22 2000-09-08 Sony Corp 半導体装置用リードフレームの形状加工装置及び形状加工方法並びに半導体装置用リードフレーム
JP6748303B2 (ja) * 2016-11-11 2020-08-26 ルミレッズ ホールディング ベーフェー リードフレーム製造方法
CN117644134B (zh) * 2024-01-23 2024-05-14 佛山市阿玛达机械科技有限公司 一种金属板材加工用冷弯成型装置及其操作方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3571920A (en) * 1965-12-16 1971-03-23 Berg Electronics Inc Method for transistor manufacture
US3440027A (en) * 1966-06-22 1969-04-22 Frances Hugle Automated packaging of semiconductors
US3524249A (en) * 1966-10-08 1970-08-18 Nippon Electric Co Method of manufacturing a semiconductor container
US3559285A (en) * 1968-01-08 1971-02-02 Jade Corp Method of forming leads for attachment to semi-conductor devices

Also Published As

Publication number Publication date
GB1305337A (fr) 1973-01-31
AU450494B2 (en) 1974-07-11
FR2106369B1 (fr) 1977-04-22
US3650232A (en) 1972-03-21
DE2143809A1 (de) 1972-03-09
NL7112352A (fr) 1972-03-10
ES394780A1 (es) 1974-03-01
SE360216B (fr) 1973-09-17
AU3235571A (en) 1973-02-15
FR2106369A1 (fr) 1972-05-05
BE772314A (fr) 1972-03-07
CA966986A (en) 1975-05-06

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee