AR228857A1 - Disposicion circuital para el reconocimiento de codigo de sincronismo de un multiplexador de senales digitales - Google Patents
Disposicion circuital para el reconocimiento de codigo de sincronismo de un multiplexador de senales digitalesInfo
- Publication number
- AR228857A1 AR228857A1 AR282507A AR28250780A AR228857A1 AR 228857 A1 AR228857 A1 AR 228857A1 AR 282507 A AR282507 A AR 282507A AR 28250780 A AR28250780 A AR 28250780A AR 228857 A1 AR228857 A1 AR 228857A1
- Authority
- AR
- Argentina
- Prior art keywords
- circuital
- provision
- recognition
- digital signal
- signal multiplexer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0602—Systems characterised by the synchronising information used
- H04J3/0605—Special codes used as synchronising signal
- H04J3/0608—Detectors therefor, e.g. correlators, state machines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/13—Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/90—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
- H04N19/91—Entropy coding, e.g. variable length coding [VLC] or arithmetic coding
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT7926405A IT1207258B (it) | 1979-10-11 | 1979-10-11 | Disposizione circuitale atta a riconoscere la parola di allineamento, di particolare applicazione nella sezione ricevente di un multiplatore disegnali digitali. |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AR228857A1 true AR228857A1 (es) | 1983-04-29 |
Family
ID=11219415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AR282507A AR228857A1 (es) | 1979-10-11 | 1980-09-12 | Disposicion circuital para el reconocimiento de codigo de sincronismo de un multiplexador de senales digitales |
Country Status (10)
| Country | Link |
|---|---|
| JP (1) | JPS5661849A (xx) |
| AR (1) | AR228857A1 (xx) |
| AU (1) | AU6315280A (xx) |
| BR (1) | BR8005874A (xx) |
| DE (1) | DE3038360A1 (xx) |
| ES (1) | ES8105124A1 (xx) |
| FR (1) | FR2467516A1 (xx) |
| GB (1) | GB2063626A (xx) |
| IT (1) | IT1207258B (xx) |
| SE (1) | SE8007125L (xx) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1207280B (it) * | 1979-10-29 | 1989-05-17 | Telecomunicazionesiemens S P A | Disposizione circuitale atta a sincronizzare una unita' di demultiplazione, di particolare applicazione nella sezione ricevente di un multiplatore disegnali digitali. |
| IT1151019B (it) * | 1980-06-30 | 1986-12-17 | Sits Soc It Telecom Siemens | Circuito di temporizzazione per la ricezione di segnali pcm |
| DE3212450A1 (de) * | 1982-04-02 | 1983-10-13 | Siemens AG, 1000 Berlin und 8000 München | Synchronisiereinrichtung einer digitalsignal-demultiplexeinrichung |
| DE3230027A1 (de) * | 1982-08-12 | 1984-02-16 | Siemens Ag | Synchronisieranordnung |
| DE3230064A1 (de) * | 1982-08-12 | 1984-02-16 | Siemens AG, 1000 Berlin und 8000 München | Anordnung zum synchronen demultiplexen eines zeitmultiplexsignals |
| FR2538647B1 (fr) * | 1982-12-28 | 1990-01-12 | Billy Jean Claude | Circuit de demultiplexage d'un signal numerique en trames et a haut debit |
| FR2549323B1 (fr) * | 1983-07-12 | 1985-10-25 | Lignes Telegraph Telephon | Dispositif de synchronisation pour transmission numerique avec trames, et recepteur comportant un tel dispositif |
| DE3401728C2 (de) * | 1984-01-19 | 1986-02-27 | ANT Nachrichtentechnik GmbH, 7150 Backnang | Digitales Übertragungssystem |
| DE3438369A1 (de) * | 1984-10-19 | 1986-04-24 | ANT Nachrichtentechnik GmbH, 7150 Backnang | Digitales nachrichtenuebertragungssystem |
| DE3905594A1 (de) * | 1989-02-23 | 1990-08-30 | Standard Elektrik Lorenz Ag | Verfahren zum zuordnen von digitalsignalen auf parallele empfangskanaele |
| US5253254A (en) * | 1991-09-18 | 1993-10-12 | Dsc Communications Corporation | Telecommunications system with arbitrary alignment parallel framer |
| FR2743245B1 (fr) * | 1995-12-29 | 1998-01-23 | Thomson Multimedia Sa | Dispositif de demultiplexage |
| JPH1032555A (ja) * | 1996-07-18 | 1998-02-03 | Nippon Telegr & Teleph Corp <Ntt> | チャネル選択型分離回路 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1282074B (de) * | 1966-01-21 | 1968-11-07 | Deutsche Bundespost | Verfahren und Schaltungsanordnung zur Synchronisierung von PCM-Zeitvielfachsystemen |
| GB1246879A (en) * | 1969-06-17 | 1971-09-22 | Marconi Co Ltd | Improvements in or relating to digital signal multiplexing systems |
-
1979
- 1979-10-11 IT IT7926405A patent/IT1207258B/it active
-
1980
- 1980-09-02 ES ES494704A patent/ES8105124A1/es not_active Expired
- 1980-09-09 FR FR8019410A patent/FR2467516A1/fr active Pending
- 1980-09-12 AR AR282507A patent/AR228857A1/es active
- 1980-09-15 BR BR8005874A patent/BR8005874A/pt unknown
- 1980-09-18 GB GB8030221A patent/GB2063626A/en not_active Withdrawn
- 1980-10-09 JP JP14067980A patent/JPS5661849A/ja active Pending
- 1980-10-10 DE DE19803038360 patent/DE3038360A1/de not_active Withdrawn
- 1980-10-10 SE SE8007125A patent/SE8007125L/xx not_active Application Discontinuation
- 1980-10-10 AU AU63152/80A patent/AU6315280A/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| SE8007125L (sv) | 1981-04-12 |
| JPS5661849A (en) | 1981-05-27 |
| IT7926405A0 (it) | 1979-10-11 |
| ES494704A0 (es) | 1981-06-01 |
| IT1207258B (it) | 1989-05-17 |
| BR8005874A (pt) | 1981-05-19 |
| GB2063626A (en) | 1981-06-03 |
| FR2467516A1 (fr) | 1981-04-17 |
| DE3038360A1 (de) | 1981-04-23 |
| ES8105124A1 (es) | 1981-06-01 |
| AU6315280A (en) | 1981-04-16 |
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