AR063104A1 - Metodo y aparato para codificar y decodificar datos - Google Patents

Metodo y aparato para codificar y decodificar datos

Info

Publication number
AR063104A1
AR063104A1 ARP070104366A ARP070104366A AR063104A1 AR 063104 A1 AR063104 A1 AR 063104A1 AR P070104366 A ARP070104366 A AR P070104366A AR P070104366 A ARP070104366 A AR P070104366A AR 063104 A1 AR063104 A1 AR 063104A1
Authority
AR
Argentina
Prior art keywords
pmin
size
block
sizes
coding
Prior art date
Application number
ARP070104366A
Other languages
English (en)
Inventor
Ajit Nimbalker
Yufei W Blankenship
Brian K Classon
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=39247696&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=AR063104(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of AR063104A1 publication Critical patent/AR063104A1/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2789—Interleaver providing variable interleaving, e.g. variable block sizes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/275—Interleaver wherein the permutation pattern is obtained using a congruential operation of the type y=ax+b modulo c
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2903—Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H03M13/2996—Tail biting
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6566—Implementations concerning memory access contentions

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

En la presente, se proveen un método y un aparato para seleccionar tamanos de entrelazadores para turbo codigos. Durante la operacion se recibe el bloque de informacion de tamano K. Se determina un tamano de entrelazador K' que está relacionado con Kö, en donde Kö es de un conjunto de tamanos; en donde el conjunto de tamanos comprende Kö = ap x f, pmin <= p <= pmax; fmin <= f <= fmax, en donde a es un entero y f es un entero continuo entre fmin and fmáx, p toma valores enteros entre pmin y pmáx, a>1, pmáx > pmin, pmin>1. El bloque de informacion de tamano K es arrastrado hacia un bloque de entrada de tamano K' usando bits de relleno, si se requiere. La codificacion se realiza usando el bloque de entrada original y el bloque de entrada entrelazado para obtener un bloque de codigo usando un turbo codificador. El bloque de codigo es transmitido a través del canal.
ARP070104366A 2006-10-03 2007-10-02 Metodo y aparato para codificar y decodificar datos AR063104A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/538,347 US7925956B2 (en) 2006-10-03 2006-10-03 Method and apparatus for encoding and decoding data

Publications (1)

Publication Number Publication Date
AR063104A1 true AR063104A1 (es) 2008-12-30

Family

ID=39247696

Family Applications (1)

Application Number Title Priority Date Filing Date
ARP070104366A AR063104A1 (es) 2006-10-03 2007-10-02 Metodo y aparato para codificar y decodificar datos

Country Status (10)

Country Link
US (1) US7925956B2 (es)
EP (1) EP2074698A2 (es)
JP (1) JP2008092571A (es)
KR (1) KR20090057415A (es)
CN (1) CN101553990B (es)
AR (1) AR063104A1 (es)
BR (1) BRPI0719266B1 (es)
MY (1) MY150923A (es)
RU (1) RU2451392C2 (es)
WO (1) WO2008042587A2 (es)

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US8356232B2 (en) 2006-10-06 2013-01-15 Motorola Mobility Llc Method and apparatus for encoding and decoding data
US7979772B2 (en) * 2006-10-25 2011-07-12 Samsung Electronics Co., Ltd. Method and system for providing a contention-free interleaver for channel coding
EP2089974A2 (en) * 2006-11-01 2009-08-19 QUALCOMM Incorporated Turbo interleaver for high data rates
US8032811B2 (en) * 2006-11-09 2011-10-04 Samsung Electronics Co., Ltd. Efficient almost regular permutation (ARP) interleaver and method
US8185785B2 (en) * 2006-11-28 2012-05-22 At&T Intellectual Property I, L.P. Broadcasting of digital video to mobile terminals
US7949926B2 (en) * 2006-11-30 2011-05-24 Motorola Mobility, Inc. Method and apparatus for encoding and decoding data
US8576807B2 (en) * 2007-06-25 2013-11-05 Qualcomm Incorporated Channel interleaving structure for a wireless communication system
US8289999B1 (en) * 2009-11-05 2012-10-16 L-3 Services, Inc. Permutation mapping for ARQ-processed transmissions
JP5510189B2 (ja) * 2010-08-25 2014-06-04 三菱電機株式会社 インタリーブ装置及びインタリーブ方法
US8621160B2 (en) * 2010-12-17 2013-12-31 Futurewei Technologies, Inc. System and method for contention-free memory access
CN102136888B (zh) * 2011-04-20 2013-02-20 大唐移动通信设备有限公司 一种子块解交织输入数据处理方法及装置
KR101286021B1 (ko) * 2012-02-02 2013-07-19 주식회사 이노와이어리스 인터리버 인덱스 생성장치 및 방법
CN103825669B (zh) 2012-11-16 2017-10-24 华为技术有限公司 数据处理的方法和装置
US10135467B2 (en) * 2016-06-08 2018-11-20 Echelon Corporation Methods and systems for applying an improved interleaver for modems operating on power grid
US10270559B2 (en) 2016-10-04 2019-04-23 At&T Intellectual Property I, L.P. Single encoder and decoder for forward error correction coding
US10243638B2 (en) 2016-10-04 2019-03-26 At&T Intellectual Property I, L.P. Forward error correction code selection in wireless systems
CN110071728B (zh) * 2018-01-24 2021-02-05 华为技术有限公司 一种交织方法及交织设备

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CN1256812C (zh) * 1997-07-30 2006-05-17 三星电子株式会社 透平编码器和信道编码方法
KR19990012821A (ko) * 1997-07-31 1999-02-25 홍성용 전자기파 흡수체 조성물과 이의 제조 방법, 전자기파 흡수용도료 조성물과 이의 제조 방법 및 이의 도포 방법
US6339834B1 (en) * 1998-05-28 2002-01-15 Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communication Research Centre Interleaving with golden section increments
US6347385B1 (en) * 1998-08-03 2002-02-12 Nortel Networks Limited Interleavers for turbo code
US6427214B1 (en) * 1998-09-29 2002-07-30 Nortel Networks Limited Interleaver using co-set partitioning
FR2785743A1 (fr) * 1998-11-09 2000-05-12 Canon Kk Dispositif et procede d'adaptation des turbocodeurs et des decodeurs associes a des sequences de longueur variable
US6304991B1 (en) * 1998-12-04 2001-10-16 Qualcomm Incorporated Turbo code interleaver using linear congruential sequence
KR100346170B1 (ko) * 1998-12-21 2002-11-30 삼성전자 주식회사 통신시스템의인터리빙/디인터리빙장치및방법
FR2790621B1 (fr) * 1999-03-05 2001-12-21 Canon Kk Dispositif et procede d'entrelacement pour turbocodage et turbodecodage
US6314534B1 (en) * 1999-03-31 2001-11-06 Qualcomm Incorporated Generalized address generation for bit reversed random interleaving
BR0009376A (pt) * 1999-04-06 2001-12-26 Samsung Electronics Co Ltd Aparelho e método de entrelaçamentobidimensional
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RU2265960C2 (ru) * 2003-06-16 2005-12-10 Федеральное государственное унитарное предприятие "Калужский научно-исследовательский институт телемеханических устройств" Способ передачи информации с использованием адаптивного перемежения
KR100912156B1 (ko) 2005-02-03 2009-08-14 파나소닉 주식회사 병렬 인터리버, 병렬 디인터리버 및 인터리브 방법

Also Published As

Publication number Publication date
WO2008042587A3 (en) 2008-07-10
BRPI0719266A2 (pt) 2016-04-12
BRPI0719266B1 (pt) 2020-12-01
RU2451392C2 (ru) 2012-05-20
CN101553990B (zh) 2014-02-19
WO2008042587A2 (en) 2008-04-10
KR20090057415A (ko) 2009-06-05
US7925956B2 (en) 2011-04-12
EP2074698A2 (en) 2009-07-01
JP2008092571A (ja) 2008-04-17
MY150923A (en) 2014-03-14
RU2009116644A (ru) 2010-11-10
CN101553990A (zh) 2009-10-07
US20080091986A1 (en) 2008-04-17

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