AR012798A1 - Circuito para reducir el efecto de ruido en senales, aparato procesador de senales, disposicion de computacion y metodo, que emplean el circuito - Google Patents

Circuito para reducir el efecto de ruido en senales, aparato procesador de senales, disposicion de computacion y metodo, que emplean el circuito

Info

Publication number
AR012798A1
AR012798A1 ARP990101188A ARP990101188A AR012798A1 AR 012798 A1 AR012798 A1 AR 012798A1 AR P990101188 A ARP990101188 A AR P990101188A AR P990101188 A ARP990101188 A AR P990101188A AR 012798 A1 AR012798 A1 AR 012798A1
Authority
AR
Argentina
Prior art keywords
circuit
noise
signals
reduce
effect
Prior art date
Application number
ARP990101188A
Other languages
English (en)
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AR012798A1 publication Critical patent/AR012798A1/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers
    • G06F13/4077—Precharging or discharging

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

Un circuito para reducir el efecto del ruido en senales, aparato procesador de senales, disposicion de computacion y método, que emplean el circuito,donde el circuito incluye una pluralidad de líneas de senales de informacion que poseen un direccionamiento sustancialmente vinculado, y una línea detension de referencia que posee un direccionamiento sustancialmente vinculado con el direccionamiento de la pluralidad de líneas de senales de informacion.El circuito incluye además un agente transmisor acoplado a la pluralidad de líneas de senales de informacion y a la línea de senales de tension dereferencia, incluyendo un circuito de acoplamiento del ruido que acopla el ruido del agente transmisor con la línea de tension de referencia.
ARP990101188A 1998-03-18 1999-03-18 Circuito para reducir el efecto de ruido en senales, aparato procesador de senales, disposicion de computacion y metodo, que emplean el circuito AR012798A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/044,508 US6195395B1 (en) 1998-03-18 1998-03-18 Multi-agent pseudo-differential signaling scheme

Publications (1)

Publication Number Publication Date
AR012798A1 true AR012798A1 (es) 2000-11-22

Family

ID=21932771

Family Applications (1)

Application Number Title Priority Date Filing Date
ARP990101188A AR012798A1 (es) 1998-03-18 1999-03-18 Circuito para reducir el efecto de ruido en senales, aparato procesador de senales, disposicion de computacion y metodo, que emplean el circuito

Country Status (6)

Country Link
US (1) US6195395B1 (es)
EP (1) EP0944000B1 (es)
AR (1) AR012798A1 (es)
DE (1) DE69914393T2 (es)
HK (1) HK1024761A1 (es)
SG (1) SG101921A1 (es)

Families Citing this family (175)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6195395B1 (en) * 1998-03-18 2001-02-27 Intel Corporation Multi-agent pseudo-differential signaling scheme
US6453422B1 (en) * 1999-12-23 2002-09-17 Intel Corporation Reference voltage distribution for multiload i/o systems
DE10051329C2 (de) * 2000-10-10 2003-12-11 Job Lizenz Gmbh & Co Kg Gefahrenmeldeanlage
FR2917921B1 (fr) * 2007-06-21 2011-02-11 Excem Dispositif d'interface pseudo-differentiel avec circuit de terminaison
FR2918523B1 (fr) * 2007-07-06 2011-02-11 Excem Dispositif d'interface pseudo-differentiel avec circuit d'equilibrage
FR2918826B1 (fr) * 2007-07-09 2009-10-02 Excem Soc Par Actions Simplifi Dispositif d'interface pseudo-differentiel avec circuit de commutation.
FR2919131B1 (fr) * 2007-07-20 2011-03-11 Excem Procede et dispositif pour les transmissions pseudo-differentielles
FR2933556B1 (fr) * 2008-07-07 2010-08-20 Excem Circuit de reception pseudo-differentiel
FR2933827B1 (fr) * 2008-07-11 2010-08-20 Excem Dispositif d'interface multicanal avec circuit d'equilibrage
FR2933823B1 (fr) 2008-07-11 2011-10-28 Excem Amplificateur a entrees multiples et sorties multiples ayant des entrees pseudo-differentielles
FR2934727B1 (fr) 2008-08-04 2010-08-13 Excem Procede de transmission pseudo-differentiel utilisant des variables electriques modales
FR2934728B1 (fr) * 2008-08-04 2010-08-27 Excem Procede de transmission pseudo-differentiel utilisant des variables electriques naturelles
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HK1024761A1 (en) 2000-10-20
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US6195395B1 (en) 2001-02-27
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EP0944000B1 (en) 2004-01-28
DE69914393T2 (de) 2004-07-01

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