WO2015137442A1 - Substrate treatment method and substrate treatment jig - Google Patents

Substrate treatment method and substrate treatment jig Download PDF

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Publication number
WO2015137442A1
WO2015137442A1 PCT/JP2015/057290 JP2015057290W WO2015137442A1 WO 2015137442 A1 WO2015137442 A1 WO 2015137442A1 JP 2015057290 W JP2015057290 W JP 2015057290W WO 2015137442 A1 WO2015137442 A1 WO 2015137442A1
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Prior art keywords
substrate
liquid
alignment liquid
alignment
hole
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PCT/JP2015/057290
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French (fr)
Japanese (ja)
Inventor
春生 岩津
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東京エレクトロン株式会社
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Publication of WO2015137442A1 publication Critical patent/WO2015137442A1/en

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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/001Apparatus specially adapted for electrolytic coating of wafers, e.g. semiconductors or solar cells
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/02Tanks; Installations therefor
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/10Electrodes, e.g. composition, counter electrode
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/003Electroplating using gases, e.g. pressure influence
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate

Definitions

  • the present invention relates to a substrate processing method for performing predetermined processing on a substrate on which a plurality of semiconductor chips are formed, and a substrate processing jig used in the substrate processing method.
  • a three-dimensional integration technique in which semiconductor devices are stacked three-dimensionally has been proposed.
  • a fineness of 100 ⁇ m or less is formed so as to penetrate a semiconductor wafer (hereinafter referred to as “wafer”) thinned by polishing the back surface and having a plurality of electronic circuits formed on the front surface.
  • a plurality of electrodes having a diameter, so-called through electrodes (TSV: Through Silicon Via) are formed.
  • TSV Through Silicon Via
  • Patent Document 1 proposes that a through electrode is formed by performing electroplating in a through hole of a wafer, for example, using a template having a flow path such as a plating solution. Specifically, first, after supplying the alignment liquid (pure water) to the alignment area on the wafer surface, the template is placed facing the wafer, and a restoring force is applied to the template by the surface tension of the alignment liquid. Adjust the position of the template and wafer.
  • a through electrode is formed by performing electroplating in a through hole of a wafer, for example, using a template having a flow path such as a plating solution. Specifically, first, after supplying the alignment liquid (pure water) to the alignment area on the wafer surface, the template is placed facing the wafer, and a restoring force is applied to the template by the surface tension of the alignment liquid. Adjust the position of the template and wafer.
  • the alignment liquid pure water
  • a plating solution is supplied from the flow path of the template into the through hole of the wafer by capillary action, and a voltage is applied with the electrode on the template side as the anode and the counter electrode on the wafer side as the cathode, and the plating process is performed in the through hole.
  • a through electrode is formed in the through hole.
  • Patent Document 2 proposes a method of supplying an alignment liquid (pure water) to the alignment pattern on the wafer surface from the flow path of the template after the template is arranged facing the wafer. ing. Even in such a case, the position of the template and the wafer is adjusted by applying a restoring force to the template by the surface tension of the alignment liquid.
  • an alignment liquid pure water
  • the present invention has been made in view of such a point, and an object thereof is to appropriately adjust the position of a substrate processing jig and a substrate, and to appropriately perform substrate processing using the substrate processing jig.
  • the present invention provides a substrate processing method for performing a predetermined process on a substrate on which a plurality of semiconductor chips are formed, wherein an alignment liquid is applied over the entire surface of the substrate on which the plurality of semiconductor chips are formed.
  • a second step of disposing the counter substrate on which the alignment liquid discharge hole penetrating in the thickness direction is formed on the substrate with the alignment liquid interposed therebetween, and the scribe line between the semiconductor chips.
  • the alignment liquid is discharged by capillary action to the upper surface side of the counter substrate through the alignment liquid discharge hole, and air is supplied to a space formed on the scribe line between the counter substrate and the substrate,
  • a third step of forming a gas-liquid interface between a peripheral edge of the semiconductor chip and the counter substrate; and the alignment liquid at the gas-liquid interface By the surface tension, has a fourth step of adjusting the position of the counter substrate to the substrate, the.
  • the present invention after supplying the alignment liquid to the entire surface of the substrate, only the alignment liquid existing in the scribe line is discharged to the upper surface side of the counter substrate through the alignment liquid discharge hole by capillary action. At the same time, air is supplied to the space formed on the scribe line between the counter substrate and a gas-liquid interface is formed between the peripheral edge of the semiconductor chip and the counter substrate. And the restoring force which moves a counter substrate acts by the surface tension of the alignment liquid in a gas-liquid interface, and the position adjustment of the counter substrate with respect to a board
  • the alignment liquid is supplied to the entire surface of the substrate, the difficulty in supplying the conventional alignment liquid is eliminated, and the position adjustment between the counter substrate and the substrate can be performed appropriately and easily.
  • the substrate processing performed thereafter can be appropriately performed.
  • a liquid escape hole penetrating in the thickness direction is formed, and on the top surface of the counter substrate, a liquid escape tank communicating with the liquid escape hole is provided, and in the fifth step, on the semiconductor chip
  • the alignment liquid or the processing liquid may be discharged by capillary action to the liquid escape tank through the liquid escape hole to maintain the arrangement of the counter substrate with respect to the substrate.
  • the liquid escape mentioned here may generate a holding force by the alignment liquid or the processing liquid between the semiconductor chip and the counter substrate, thereby adsorbing the substrate and the counter substrate.
  • Another aspect of the present invention is a substrate processing jig for performing predetermined processing on a substrate on which a plurality of semiconductor chips are formed, wherein an alignment liquid discharge hole penetrating in the thickness direction is formed, and the plurality of semiconductors
  • the alignment liquid is supplied to the entire surface of the substrate on which the chip is formed, and the substrate processing jig is disposed on the substrate with the alignment liquid interposed therebetween, and the alignment liquid discharge hole is formed from the scribe line between the semiconductor chips.
  • the alignment liquid is discharged by capillary action to the upper surface side of the substrate processing jig through air, and air is supplied to the space formed on the scribe line between the substrate processing jig and the substrate,
  • the alignment liquid discharge hole is formed so that a gas-liquid interface is formed between the peripheral portion of the semiconductor chip and the substrate processing jig.
  • the substrate processing jig in the present invention includes the counter substrate in the above-described invention.
  • the present invention it is possible to appropriately and easily adjust the position of the substrate processing jig and the substrate, and to appropriately perform the substrate processing using the substrate processing jig.
  • a semiconductor chip 11 (hereinafter sometimes referred to as “chip 11”) and a scribe line 12 are formed on the surface 10 a of the wafer 10.
  • a plurality of chips 11 are formed uniformly in the wafer surface.
  • the scribe line 12 extends between the plurality of chips 11 and 11 and is formed in a lattice shape.
  • the scribe line 12 is formed lower than the chip 11.
  • the scribe line 12 is opened on the side surface of the wafer 10 to form a wafer side surface opening 12a. Note that the scribe line is a line when the wafer is cut and divided into a plurality of semiconductor chips.
  • Each chip 11 has a through hole 13 extending in the thickness direction from the front surface 10a of the wafer 10 to the back surface 10b.
  • the through hole 13 does not penetrate the wafer 10, but the back surface 10 b of the wafer 10 is thinned and penetrated after a predetermined process, so that it is referred to as a “through hole” for convenience.
  • a wafer side electrode 14 corresponding to a template side electrode 29 of the template 20 described later is provided on the back surface 10 b side of the through hole 13.
  • electronic circuits and wirings are formed in the chip 11.
  • FIG. 3 and 4 has a substantially disk shape, for example, and has the same shape as that of the wafer 10 in plan view.
  • silicon carbide (SiC) or the like is used for the template 20.
  • FIG. 4 illustrates the state of the template 20 disposed opposite to the wafer 10 as described later, with the front surface 20a on the lower side and the back surface 20b on the upper side.
  • a processing region 21 for performing a plating process on the chip 11 using a plating solution as a processing solution is formed on the surface 20 a of the template 20, a processing region 21 for performing a plating process on the chip 11 using a plating solution as a processing solution is formed.
  • a plurality of processing regions 21 are formed at positions corresponding to the plurality of chips 11 on the wafer 10.
  • the plating solution for example, a mixed solution in which copper sulfate and sulfuric acid are dissolved is used.
  • an air supply groove 22 is formed on the surface 20 a of the template 20.
  • the air supply groove 22 extends between the plurality of processing regions 21, 21 and is formed in a lattice shape at a position corresponding to the scribe line 12 of the wafer 10.
  • the air supply groove 22 opens on the side surface of the template 20 to form a template side surface opening 22a.
  • the air supply groove 22 is formed so as to penetrate the template 20 in the surface direction.
  • the air supply groove 22 has a groove shape recessed from the surface 20 a and is formed lower than the processing region 21.
  • the air supply groove 22 can supply air to the scribe line 12 with the template 20 facing the wafer 10.
  • the position and shape of the air supply groove 22 are not limited to the present embodiment, and can be arbitrarily designed as long as air can be supplied to the scribe line 12.
  • the template 20 has a plurality of alignment liquid discharge holes 23 for discharging the alignment liquid.
  • the alignment liquid discharge hole 23 is a thin tube that penetrates from the front surface 10a to the back surface 10b in the thickness direction.
  • the alignment liquid discharge hole 23 communicates with the air supply groove 22.
  • the alignment liquid discharge hole 23 is formed so as to be positioned immediately above the scribe line 12 in a state where the template 20 is disposed facing the wafer 10.
  • pure water is used as the alignment liquid.
  • Each alignment liquid discharge hole 23 is provided with an alignment liquid discharge tank 24 communicating with the alignment liquid discharge hole 23.
  • the alignment liquid discharge tank 24 is provided on the back surface 20 b of the template 20.
  • the alignment liquid discharge tank 24 is a tank that can be stored for discharging the alignment liquid, and has a predetermined volume for storing the alignment liquid.
  • the alignment liquid discharge tank 24 has a narrow groove structure branched from the alignment liquid discharge hole 23 into a plurality of narrow grooves 24a.
  • the internal structure of the alignment liquid discharge tank 24 is not limited to this, and can be designed arbitrarily.
  • the alignment liquid discharge tank 24 may be formed of a porous body. Capillary action acts on the alignment liquid that has entered the porous body through the alignment liquid discharge hole 23. Since the porous body also absorbs the alignment liquid so that the sponge absorbs water, it plays the role of pumping up the alignment liquid from the alignment liquid discharge tank 24.
  • the alignment liquid discharge hole 23 and the alignment liquid discharge tank 24 are the alignment liquid from the scribe line 12 to the alignment liquid discharge tank 24 through the alignment liquid discharge hole 23 with the template 20 facing the wafer 10. Is designed to circulate by capillary action. For example, if the width of the scribe line 12, the diameter of the alignment liquid discharge hole 23, and the width of the narrow groove 24a of the alignment liquid discharge tank 24 are gradually decreased in this order, a capillary phenomenon is caused in the alignment liquid. Therefore, the alignment liquid can be discharged without using an external force such as a pump.
  • the template 20 is formed with a plating solution supply hole 25 as a treatment solution supply hole for supplying a plating solution and a plating solution discharge hole 26 as a treatment solution discharge hole for discharging the plating solution.
  • the plating solution supply hole 25 and the plating solution discharge hole 26 are thin tubes penetrating in the thickness direction from the front surface 20a to the back surface 20b, and are open on the front surface 20a.
  • the plating solution supply hole 25 and the plating solution discharge hole 26 are provided for each processing region 21.
  • Each plating solution supply hole 25 is provided with a plating solution supply tank 27 as a processing solution supply tank in communication with the plating solution supply hole 25.
  • Each plating solution discharge hole 26 is also provided with a plating solution discharge tank 28 as a processing solution discharge tank in communication with the plating solution discharge hole 26.
  • the plating solution supply tank 27 and the plating solution discharge tank 28 are respectively provided on the back surface 20 b of the template 20.
  • the plating solution supply tank 27 is a tank that can be stored to supply a plating solution.
  • the plating solution supply tank 27 has a narrow groove structure branched into a plurality of narrow grooves 27a.
  • the plating solution that has been supplied to the narrow groove 27 a and has advanced through the narrow groove 27 a enters the plating solution supply hole 25.
  • the plating solution supply tank 27 by forming the plating solution supply tank 27 to the plating solution supply hole 25 with a narrow tube or a narrow groove, a capillary phenomenon is caused in the plating solution in the inside. Therefore, the plating solution can be supplied without using an external force such as a pump.
  • the structure inside the plating solution supply tank 27 is not limited to this, and can be designed arbitrarily.
  • the plating solution discharge tank 28 is a tank that can be stored for discharging the plating solution, and has a predetermined volume for containing the plating solution.
  • the plating solution discharge tank 28 has a structure branched from the plating solution discharge hole 26 into a plurality of narrow grooves 28a. As described above, by forming the plating solution discharge hole 26 to the plating solution discharge tank 28 with a thin tube or a narrow groove, a capillary phenomenon is caused in the plating solution in the inside thereof. Therefore, the plating solution can be discharged without using an external force such as a pump.
  • the internal configuration of the plating solution discharge tank 28 is not limited to this, and can be arbitrarily designed.
  • the plating solution supply tank 27, the plating solution supply hole 25, the plating solution discharge hole 26, and the plating solution discharge tank 28 are arranged from the plating solution supply tank 27 to the plating solution discharge tank 28 with the template 20 facing the wafer 10.
  • the plating solution is designed to circulate by capillary action. For example, if the width of the narrow groove 27a of the plating solution supply tank 27, the diameter of the plating solution supply hole 25, the diameter of the plating solution discharge hole 26, and the width of the narrow groove 28a of the plating solution discharge tank 28 are gradually reduced in this order, Cause capillary action in the plating solution.
  • the specific dimensions can be calculated using a well-known Laplace equation or can be derived through simulations or experiments.
  • a new plating solution is supplied from the plating solution supply hole 25 to the processing region 21, and the processed plating solution is discharged from the plating solution discharge hole 26.
  • the plating process can be performed appropriately.
  • the air supply groove 22, the alignment liquid discharge hole 23, the plating liquid supply hole 25, and the plating liquid discharge hole 26 may be simultaneously formed by, for example, a photolithography process and an etching process.
  • the alignment liquid discharge tank 24, the plating liquid supply tank 27, and the plating liquid discharge tank 28 may be simultaneously formed by, for example, a photolithography process and an etching process.
  • a template-side electrode 29 for applying a voltage to the plating solution in the processing region 21 is provided in the processing region 21 of the template 20.
  • the template-side electrode 29 is provided so as to be positioned immediately above the through hole 13 in a state where the template 20 is disposed facing the wafer 10.
  • alignment liquid P is supplied to the entire surface 10a of the wafer 10 as shown in FIG.
  • the alignment liquid P also enters the scribe line 12 and the through hole 13.
  • the surface 10a of the wafer 10 is cleaned after a process preceding the plating process, for example, an etching step.
  • pure water used in this cleaning may be used. That is, it is not necessary to perform drying after cleaning or supply of the alignment liquid P in a separate process, and the cleaning of the wafer 10 also serves as the supply of the alignment liquid P.
  • the template 20 is arranged on the surface 10a side of the wafer 10 with the alignment liquid P interposed therebetween.
  • the template 20 is arranged so that the chip 11 and the processing region 21 face each other. Note that the chip 11 and the processing region 21 do not need to correspond exactly. Even when these positions are slightly shifted as shown in FIG. 7, the position adjustment of the wafer 10 and the template 20 is performed in the process described later.
  • the placement of the template 20 is performed by the holding mechanism 30.
  • the template 20 is held at a predetermined height by the holding mechanism 30.
  • the configuration of the holding mechanism 30 is not particularly limited as long as it can hold the template 20.
  • the alignment liquid P enters the alignment liquid discharge hole 23 through the air supply groove 22 by capillary action as shown in FIGS.
  • This alignment liquid P is further circulated and discharged to the alignment liquid discharge tank 24 by capillary action as shown in FIGS.
  • Air A is supplied to the space 40 to be formed.
  • a gas-liquid interface F is formed between the peripheral edge of the chip 11 and the peripheral edge of the processing region 21.
  • the template 20 is held at a predetermined height by the holding mechanism 30.
  • the height of the template 20 does not decrease as the alignment liquid P is discharged from the scribe line 12 to the alignment liquid discharge tank 24.
  • the relationship between the scribe line 12, the alignment liquid discharge hole 23, and the alignment liquid discharge tank 24 can be maintained, and the capillary phenomenon generated in the alignment liquid P can be maintained. Therefore, the gas-liquid interface F can be formed appropriately.
  • the alignment liquid P between the chip 11 and the processing region 21 also enters the plating solution supply hole 25 and the plating solution discharge hole 26 by capillary action.
  • the holding of the template 20 by the holding mechanism 30 is released as shown in FIG. Then, a restoring force (arrow in FIG. 13) that moves the template 20 acts on the template 20 by the surface tension of the alignment liquid P at the gas-liquid interface F as shown in FIG. Then, even when the position of the chip 11 and the position of the processing area 21 are shifted, the template 20 moves so that the chip 11 and the processing area 21 face each other, and the position adjustment of the wafer 10 and the template 20 is performed with high accuracy. Is called.
  • a plating process is performed next.
  • a DC power source 50 is connected to the wafer side electrode 14 and the template side electrode 29 as shown in FIG.
  • Wafer side electrode 14 is connected to the negative electrode side of DC power supply 50.
  • the template side electrode 29 is connected to the positive electrode side of the DC power supply 50.
  • the DC power supply 50 is used as a common power supply for the plurality of wafer side electrodes 14 and the plurality of template side electrodes 29 in the template 20.
  • the plating solution M is supplied to the plating solution supply tank 27 as shown in FIG. 15, and the plating solution M flows from the plating solution supply tank 27 to the plating solution discharge tank 28 by the capillary phenomenon as shown in FIG. To do. That is, the alignment liquid P in the plating liquid discharge tank 28 from the plating liquid supply tank 27 is replaced with the plating liquid M. Then, the plating solution M supplied onto the chip 11 enters the through hole 13, and the alignment solution P in the through hole 13 is also replaced with the plating solution M.
  • the plating solution M after the plating process is performed in the through hole 13 is discharged to the plating solution discharge hole 26.
  • the fresh plating solution M is continuously supplied on the chip 11 and the plating solution M does not stay. Therefore, the copper plating 50 can be uniformly deposited in the through hole 13.
  • the copper plating 60a grows, and the through electrode 60 is formed in the through hole 13 as shown in FIG.
  • the alignment liquid P existing in the scribe line 12 is brought into alignment liquid discharge tank 24 through the alignment liquid discharge hole 23 by capillary action. To be discharged.
  • air A is supplied to the space 40 formed between the air supply groove 22 and the scribe line 12, thereby forming a gas-liquid interface F between the peripheral edge of the chip 11 and the peripheral edge of the processing region 21. Is done.
  • the restoring force which moves the template 20 acts with the surface tension of the alignment liquid P in the gas-liquid interface F, and the position adjustment of the template 20 with respect to the wafer 10 is performed with high accuracy.
  • the alignment liquid P is supplied to the entire surface 10a of the wafer 10, the difficulty in supplying the conventional alignment liquid is eliminated, and the position adjustment of the wafer 10 and the template 20 is appropriately and easily performed. It can be carried out.
  • the template 20 is held by the holding mechanism 30 after the template 20 is arranged on the wafer 10 until the gas-liquid interface F is formed between the chip 11 and the processing region 21. For this reason, while the alignment liquid P is discharged from the scribe line 12 to the alignment liquid discharge tank 24, the capillary phenomenon generated in the alignment liquid P can be maintained, and the gas-liquid interface F can be appropriately formed.
  • the alignment liquid P used for adjusting the position of the wafer 10 and the template 20 is pure water.
  • the through electrode 60 is formed on the wafer 10 as in the present embodiment, the surface 10a of the wafer 10 is cleaned in advance.
  • pure water is used as a cleaning liquid for cleaning the surface 10a.
  • this pure water it is not necessary to separately supply an alignment liquid. Therefore, the position adjustment of the wafer 10 and the template 20 can be performed efficiently.
  • the gas-liquid interface F is formed using the scribe line 12 (peripheral edge of the chip 11), it is not necessary to form a separate groove in a region where an element is formed on the wafer 10. Therefore, the space on the wafer 10 can be used effectively, and the degree of freedom in designing semiconductor devices including electronic circuits and wirings is improved.
  • the plating solution M can be appropriately supplied onto the chip 11 (in the through hole 13) thereafter. Then, the alignment solution P in the through hole 13 is replaced with the plating solution M, and the plating process can be performed appropriately.
  • the template side electrode 29 is provided on the surface of the template 20 facing the wafer 10, but the arrangement of the template side electrode 29 is not limited to this.
  • a template side electrode 29 may be provided on the bottom surface of the narrow groove 27 a of the plating solution supply tank 27. That is, the template 20 is disposed on the opposite side of the surface facing the wafer 10.
  • the narrow groove 27 a of the plating solution supply tank 27 has a relatively large surface area with respect to the plating solution M. Therefore, the template side electrode 29 disposed on the bottom surface of the narrow groove 27a can perform charge exchange (plating treatment) with the plating solution M more efficiently.
  • an indirect electrode 70 may be provided below the template side electrode 29 as shown in FIG.
  • the indirect electrode 70 is formed by covering the electrode 71 with an insulator 72.
  • the indirect electrode 70 can be switched between the connection of the template side electrode 29 and the connection of the DC power source 50 by a switch 73.
  • the template side electrode 29 is electrically floated as shown in FIG. 22, and then the indirect electrode 70 is connected to the positive electrode side of the DC power supply 50. Since an electric field is applied between the indirect electrode 70 and the wafer side electrode 14, positive ions and negative ions in the plating solution M are attracted to the wafer side electrode 14 and the indirect electrode 70, respectively.
  • the indirect electrode 70 and the template side electrode 29 are connected by switching the switch 73. Then, the positive charges accumulated in the indirect electrode 70 move to the template side electrode 29, and negative ions deposited on the surface of the template side electrode 29 are exchanged. Since charge exchange is also performed on the wafer side electrode 14, positive ions are reduced, and the copper plating 60 a is deposited on the surface of the wafer side electrode 14. By controlling in this way, ions in the plating solution can be efficiently transported to the wafer-side electrode 14, so that the plating process can be accelerated.
  • an alignment liquid escape hole 80 and an alignment liquid escape tank 81 may be provided as shown in FIGS.
  • the alignment liquid escape hole 80 is a thin tube that penetrates from the front surface 20a to the back surface 20b in the thickness direction, and is open at the front surface 20a.
  • One alignment liquid escape hole 80 is provided for each processing region 21.
  • the alignment liquid escape tank 81 communicates with the alignment liquid escape hole 80 and is provided on the back surface 20 b of the template 20.
  • the alignment liquid escape tank 81 is a tank that can be stored for discharging the alignment liquid P.
  • the alignment liquid escape tank 81 has a configuration branched from the alignment liquid escape hole 80 into a plurality of narrow grooves 81a. In this way, by forming the alignment liquid escape hole 80 to the alignment liquid escape tank 81 with a narrow tube or a narrow groove, a capillary phenomenon is caused in the alignment liquid P inside.
  • the internal structure of the alignment liquid escape tank 81 is not limited to this, and can be designed arbitrarily.
  • the alignment liquid escape tank 81 may be formed of a porous body.
  • the holding of the template 20 by the holding mechanism 30 is released, and the position of the wafer 10 and the template 20 is adjusted. That is, in the subsequent plating process, the template 20 is not held by the holding mechanism 30, but it is necessary to maintain the position of the template 20 also in the plating process.
  • the holding of the template 20 by the holding mechanism 30 is released, pressure acts on the alignment liquid P (plating liquid M) between the chip 11 and the processing region 21 due to the weight of the template 20, and the gas-liquid interface F is positive pressure. It may become. In such a case, the position of the template 20 is not maintained.
  • the alignment liquid P (plating liquid M) between the chip 11 and the processing region 21 is discharged from the alignment liquid escape hole 80 by the capillary phenomenon, and the alignment liquid escape tank 81. To distribute. Then, it is possible to suppress the gas-liquid interface F from becoming a positive pressure and generate an appropriate holding force for the alignment liquid P (plating liquid M) between the chip 11 and the processing region 21. With this holding force, the template 20 is attracted to the wafer 10 and the position of the template 20 is maintained.
  • the position of the template 20 can be appropriately maintained during the plating process. Therefore, the plating process can be performed appropriately.
  • pure water is used as the alignment liquid P, but other alignment liquids such as a plating liquid and an etching liquid may be used.
  • the plating solution supply tank 27, the plating solution discharge tank 28, and the alignment liquid escape tank 81 are provided for each chip 11, but these may be shared by the plurality of chips 11.
  • the air supply groove 22 is formed in the template 20, but the air supply groove 22 may be omitted. In short, it is sufficient that a space for supplying air is formed on the scribe line 12 between the template 20 and the wafer 10. In such a case, the air enters the space and the peripheral portion of the chip 11 and the processing are performed. A gas-liquid interface F is formed between the peripheral portions of the region 21.
  • the present invention can be applied to various liquid processes.
  • the present invention can be applied to other electric field processes such as an etching process using an etching liquid, and the present invention can also be applied to a liquid process other than an electrolytic process such as a cleaning process using a cleaning liquid.
  • the present invention can also be applied to inspection of semiconductor devices. For example, contact liquid can be contacted at once with a plurality of fine through electrodes, and the through electrodes can be inspected in wafer units.
  • the present invention can be applied to the position adjustment of the substrates when the substrates are bonded to each other.
  • the template 20 as the substrate processing jig functions as a counter substrate bonded to the wafer 10.
  • the surfaces of the substrates in contact with each other can be activated by irradiation with infrared rays or the like.

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Abstract

In the present invention, a substrate treatment method includes: supplying an alignment solution to the entire surface of a substrate on which a plurality of semiconductor chips have been formed; arranging a counter substrate, in which alignment solution discharge holes penetrating through the thickness direction have been formed, over the substrate with the alignment solution therebetween; discharging the alignment solution by capillary action to the upper surface side of the counter substrate via the alignment solution discharge holes from scribe lines between the semiconductor chips, and in the area between the counter substrate and the substrate, supplying air to spaces formed on the scribe lines to form a gas-liquid interface between margins of the semiconductor chips and the counter substrate; and adjusting the position of the counter substrate relative to the substrate, by the surface tension of the alignment solution at the gas-liquid interface.

Description

基板処理方法及び基板処理治具Substrate processing method and substrate processing jig
(関連出願の相互参照)
 本願は、2014年3月14日に日本国に出願された特願2014-051115号に基づき、優先権を主張し、その内容をここに援用する。
(Cross-reference of related applications)
This application claims priority based on Japanese Patent Application No. 2014-051115 for which it applied to Japan on March 14, 2014, and uses the content here.
 本発明は、複数の半導体チップが形成された基板に所定の処理を行う基板処理方法、及び当該基板処理方法に用いられる基板処理治具に関する。 The present invention relates to a substrate processing method for performing predetermined processing on a substrate on which a plurality of semiconductor chips are formed, and a substrate processing jig used in the substrate processing method.
 近年、半導体装置の高性能化が要求され、半導体デバイスの高集積化が進んでいる。かかる状況下で、高集積化された半導体デバイスを水平面内に複数配置し、これら半導体デバイスを配線で接続して半導体装置を製造する場合、配線長が増大し、それにより配線の抵抗が大きくなること、また配線遅延が大きくなることが懸念される。 In recent years, higher performance of semiconductor devices is required, and higher integration of semiconductor devices is progressing. Under such circumstances, when a semiconductor device is manufactured by arranging a plurality of highly integrated semiconductor devices in a horizontal plane and connecting these semiconductor devices with wiring, the wiring length increases, thereby increasing the resistance of the wiring. In addition, there is a concern that the wiring delay becomes large.
 そこで、半導体デバイスを3次元に積層する3次元集積技術が提案されている。この3次元集積技術においては、裏面を研磨することで薄化され、表面に複数の電子回路が形成された半導体ウェハ(以下、「ウェハ」という)を貫通するように、例えば100μm以下の微細な径を有する電極、いわゆる貫通電極(TSV:Through Silicon Via)が複数形成される。そして、この貫通電極を介して、上下に積層されたウェハが電気的に接続される。 Therefore, a three-dimensional integration technique in which semiconductor devices are stacked three-dimensionally has been proposed. In this three-dimensional integration technology, for example, a fineness of 100 μm or less is formed so as to penetrate a semiconductor wafer (hereinafter referred to as “wafer”) thinned by polishing the back surface and having a plurality of electronic circuits formed on the front surface. A plurality of electrodes having a diameter, so-called through electrodes (TSV: Through Silicon Via) are formed. And the wafer laminated | stacked up and down is electrically connected through this penetration electrode.
 上述した貫通電極を形成する方式には、様々なものが検討されている。例えば特許文献1には、めっき液等の流通路を備えたテンプレートを用いて、例えばウェハの貫通孔内で電解めっきを行って貫通電極を形成することが提案されている。具体的には、先ず、ウェハ表面のアライメント領域にアライメント液(純水)を供給した後、テンプレートをウェハに対向して配置し、当該アライメント液の表面張力によりテンプレートに復元力を作用させて、テンプレートとウェハの位置調整をする。その後、テンプレートの流通路から毛細管現象によってウェハの貫通孔内にめっき液を供給し、さらにテンプレート側の電極を陽極、ウェハ側の対向電極を陰極として電圧を印加し、貫通孔内でめっき処理を行って当該貫通孔内に貫通電極を形成する。 Various methods for forming the above-described through electrode have been studied. For example, Patent Document 1 proposes that a through electrode is formed by performing electroplating in a through hole of a wafer, for example, using a template having a flow path such as a plating solution. Specifically, first, after supplying the alignment liquid (pure water) to the alignment area on the wafer surface, the template is placed facing the wafer, and a restoring force is applied to the template by the surface tension of the alignment liquid. Adjust the position of the template and wafer. After that, a plating solution is supplied from the flow path of the template into the through hole of the wafer by capillary action, and a voltage is applied with the electrode on the template side as the anode and the counter electrode on the wafer side as the cathode, and the plating process is performed in the through hole. A through electrode is formed in the through hole.
 このようにテンプレートを用いてウェハに所定の処理を行う場合、テンプレートとウェハの位置調整を行う必要がある。この位置調整の方法として、例えば特許文献2には、テンプレートをウェハに対向して配置した後、テンプレートの流通路からウェハ表面のアライメント用パターンにアライメント液(純水)を供給する方法も提案されている。かかる場合でも、アライメント液の表面張力によりテンプレートに復元力を作用させて、テンプレートとウェハの位置調整が行われる。 In this way, when a predetermined process is performed on a wafer using a template, it is necessary to adjust the position of the template and the wafer. As a method for adjusting the position, for example, Patent Document 2 proposes a method of supplying an alignment liquid (pure water) to the alignment pattern on the wafer surface from the flow path of the template after the template is arranged facing the wafer. ing. Even in such a case, the position of the template and the wafer is adjusted by applying a restoring force to the template by the surface tension of the alignment liquid.
特開2013-108111号公報JP 2013-108111 A 特開2013-138123号公報JP 2013-138123 A
 しかしながら、特許文献1に記載された位置調整方法を用いた場合、ウェハ表面の複数且つ微小なアライメント領域にアライメント液を供給する必要がある。このため、各アライメント領域にアライメント液を適切に供給するのは困難を伴う。 However, when the position adjusting method described in Patent Document 1 is used, it is necessary to supply alignment liquid to a plurality of minute alignment regions on the wafer surface. For this reason, it is difficult to appropriately supply the alignment liquid to each alignment region.
 また、特許文献2に記載された位置調整方法を用いた場合、テンプレートの微小な径を有する流通路からアライメント用パターンにアライメント液を供給する必要がある。かかる微小な径の流通路内では、アライメント液は流通し難い。しかも、流通路のウェハ側の開口部においてアライメント液に表面張力が作用し、当該アライメント液をウェハに接液させるのが困難となる。 Further, when the position adjusting method described in Patent Document 2 is used, it is necessary to supply alignment liquid to the alignment pattern from the flow path having a minute diameter of the template. In such a small diameter flow passage, the alignment liquid is difficult to flow. Moreover, surface tension acts on the alignment liquid at the wafer side opening of the flow path, making it difficult to bring the alignment liquid into contact with the wafer.
 以上のように、テンプレートを用いてウェハに所定の処理を行うに際し、テンプレートとウェハの位置調整には改善の余地がある。 As described above, there is room for improvement in adjusting the position of the template and the wafer when performing predetermined processing on the wafer using the template.
 本発明は、かかる点に鑑みてなされたものであり、基板処理治具と基板の位置調整を適切に行い、当該基板処理治具を用いた基板処理を適切に行うことを目的とする。 The present invention has been made in view of such a point, and an object thereof is to appropriately adjust the position of a substrate processing jig and a substrate, and to appropriately perform substrate processing using the substrate processing jig.
 前記の目的を達成するため、本発明は、複数の半導体チップが形成された基板に所定の処理を行う基板処理方法であって、前記複数の半導体チップが形成された基板の表面全面にアライメント液を供給する第1工程と、厚み方向に貫通するアライメント液排出孔が形成された対向基板を、前記アライメント液を挟んで基板上に配置する第2工程と、前記半導体チップ間のスクライブラインから前記アライメント液排出孔を介して前記対向基板の上面側に毛細管現象によって前記アライメント液を排出すると共に、前記対向基板と基板との間において前記スクライブライン上に形成される空間に空気が供給されて、前記半導体チップの周縁部と前記対向基板との間に気液界面を形成する第3工程と、前記気液界面における前記アライメント液の表面張力によって、基板に対する前記対向基板の位置調整を行う第4工程と、を有する。 In order to achieve the above object, the present invention provides a substrate processing method for performing a predetermined process on a substrate on which a plurality of semiconductor chips are formed, wherein an alignment liquid is applied over the entire surface of the substrate on which the plurality of semiconductor chips are formed. A second step of disposing the counter substrate on which the alignment liquid discharge hole penetrating in the thickness direction is formed on the substrate with the alignment liquid interposed therebetween, and the scribe line between the semiconductor chips. The alignment liquid is discharged by capillary action to the upper surface side of the counter substrate through the alignment liquid discharge hole, and air is supplied to a space formed on the scribe line between the counter substrate and the substrate, A third step of forming a gas-liquid interface between a peripheral edge of the semiconductor chip and the counter substrate; and the alignment liquid at the gas-liquid interface By the surface tension, has a fourth step of adjusting the position of the counter substrate to the substrate, the.
 本発明によれば、基板の表面全面にアライメント液を供給した後、スクライブラインに存するアライメント液のみが毛細管現象によりアライメント液排出孔を介して対向基板の上面側に排出される。同時に対向基板と基板との間においてスクライブライン上に形成される空間に空気が供給されることで、半導体チップの周縁部と対向基板との間に気液界面が形成される。そして、気液界面におけるアライメント液の表面張力によって、対向基板を移動させる復元力が作用し、基板に対する対向基板の位置調整が高精度に行われる。このように本発明では基板の表面全面にアライメント液が供給されるので、従来のアライメント液供給の困難性が解消され、対向基板と基板の位置調整を適切且つ容易に行うことができる。また、このように対向基板と基板の位置調整が適切に行われるので、その後に行われる基板処理を適切に行うことができる。 According to the present invention, after supplying the alignment liquid to the entire surface of the substrate, only the alignment liquid existing in the scribe line is discharged to the upper surface side of the counter substrate through the alignment liquid discharge hole by capillary action. At the same time, air is supplied to the space formed on the scribe line between the counter substrate and a gas-liquid interface is formed between the peripheral edge of the semiconductor chip and the counter substrate. And the restoring force which moves a counter substrate acts by the surface tension of the alignment liquid in a gas-liquid interface, and the position adjustment of the counter substrate with respect to a board | substrate is performed with high precision. As described above, in the present invention, since the alignment liquid is supplied to the entire surface of the substrate, the difficulty in supplying the conventional alignment liquid is eliminated, and the position adjustment between the counter substrate and the substrate can be performed appropriately and easily. In addition, since the position adjustment between the counter substrate and the substrate is appropriately performed as described above, the substrate processing performed thereafter can be appropriately performed.
 前記対向基板には、厚み方向に貫通する液逃がし孔が形成され、前記対向基板の上面には、前記液逃がし孔に連通する液逃がし槽が設けられ、前記第5工程において、前記半導体チップ上から前記液逃がし孔を介して前記液逃がし槽に毛細管現象によって前記アライメント液又は前記処理液を排出して、基板に対する前記対向基板の配置を維持してもよい。なお、ここでいう液逃がしによって、半導体チップと対向基板との間でアライメント液又は処理液による保持力を発生させ、基板と対向基板を吸着させるようにしてもよい。 In the counter substrate, a liquid escape hole penetrating in the thickness direction is formed, and on the top surface of the counter substrate, a liquid escape tank communicating with the liquid escape hole is provided, and in the fifth step, on the semiconductor chip The alignment liquid or the processing liquid may be discharged by capillary action to the liquid escape tank through the liquid escape hole to maintain the arrangement of the counter substrate with respect to the substrate. It should be noted that the liquid escape mentioned here may generate a holding force by the alignment liquid or the processing liquid between the semiconductor chip and the counter substrate, thereby adsorbing the substrate and the counter substrate.
 別な観点による本発明は、複数の半導体チップが形成された基板に所定の処理を行うための基板処理治具であって、厚み方向に貫通するアライメント液排出孔が形成され、前記複数の半導体チップが形成された基板の表面全面にアライメント液が供給され、さらに基板処理治具が前記アライメント液を挟んで基板上に配置された状態で、前記半導体チップ間のスクライブラインから前記アライメント液排出孔を介して基板処理治具の上面側に毛細管現象によって前記アライメント液が排出されると共に、前記基板処理治具と基板との間において前記スクライブライン上に形成される空間に空気が供給されて、前記半導体チップの周縁部と基板処理治具との間に気液界面が形成されるように、前記アライメント液排出孔は形成されている。なお、本発明における基板処理治具は、上述した発明における対向基板を包含するものである。 Another aspect of the present invention is a substrate processing jig for performing predetermined processing on a substrate on which a plurality of semiconductor chips are formed, wherein an alignment liquid discharge hole penetrating in the thickness direction is formed, and the plurality of semiconductors The alignment liquid is supplied to the entire surface of the substrate on which the chip is formed, and the substrate processing jig is disposed on the substrate with the alignment liquid interposed therebetween, and the alignment liquid discharge hole is formed from the scribe line between the semiconductor chips. The alignment liquid is discharged by capillary action to the upper surface side of the substrate processing jig through air, and air is supplied to the space formed on the scribe line between the substrate processing jig and the substrate, The alignment liquid discharge hole is formed so that a gas-liquid interface is formed between the peripheral portion of the semiconductor chip and the substrate processing jig. The substrate processing jig in the present invention includes the counter substrate in the above-described invention.
 本発明によれば、基板処理治具と基板の位置調整を適切且つ容易に行い、当該基板処理治具を用いた基板処理を適切に行うことができる。 According to the present invention, it is possible to appropriately and easily adjust the position of the substrate processing jig and the substrate, and to appropriately perform the substrate processing using the substrate processing jig.
ウェハの構成の概略を示す平面図である。It is a top view which shows the outline of a structure of a wafer. ウェハの構成の概略を示す縦断面図である。It is a longitudinal cross-sectional view which shows the outline of a structure of a wafer. テンプレートの構成の概略を示す平面図である。It is a top view which shows the outline of a structure of a template. テンプレートの構成の概略を示す縦断面図である。It is a longitudinal cross-sectional view which shows the outline of a structure of a template. アライメント液排出槽、めっき液供給槽及びめっき液排出槽の構成の概略を示す平面図である。It is a top view which shows the outline of a structure of an alignment liquid discharge tank, a plating solution supply tank, and a plating solution discharge tank. ウェハの表面全面にアライメント液を供給した様子を示す説明図である。It is explanatory drawing which shows a mode that the alignment liquid was supplied to the whole surface of the wafer. テンプレートをウェハに対向して配置した様子を示す説明図である。It is explanatory drawing which shows a mode that the template was arrange | positioned facing a wafer. アライメント液が空気供給溝を通ってアライメント液排出孔に進入する様子を示す説明図である。It is explanatory drawing which shows a mode that alignment liquid approachs an alignment liquid discharge hole through an air supply groove | channel. アライメント液が空気供給溝を通ってアライメント液排出孔に進入した際の平面視におけるテンプレートの様子を示す説明図である。It is explanatory drawing which shows the mode of the template in planar view when alignment liquid approachs into alignment liquid discharge hole through an air supply groove | channel. チップと処理領域の間に気液界面が形成された様子を示す説明図である。It is explanatory drawing which shows a mode that the gas-liquid interface was formed between the chip | tip and the process area | region. チップと処理領域の間に気液界面が形成された際の平面視におけるテンプレートの様子を示す説明図である。It is explanatory drawing which shows the mode of the template in planar view when the gas-liquid interface is formed between the chip | tip and the process area | region. 保持機構によるテンプレートの保持を解除した様子を示す説明図である。It is explanatory drawing which shows a mode that holding | maintenance of the template by a holding mechanism was cancelled | released. ウェハとテンプレートが位置調整される様子を示す説明図である。It is explanatory drawing which shows a mode that a wafer and a template are position-adjusted. ウェハ側電極とテンプレート側電極に直流電源が接続された様子を示す説明図である。It is explanatory drawing which shows a mode that DC power supply was connected to the wafer side electrode and the template side electrode. チップと処理領域の間のアライメント液がめっき液に置換される様子を示す説明図である。It is explanatory drawing which shows a mode that the alignment liquid between a chip | tip and a process area | region is substituted by a plating solution. チップと処理領域の間のアライメント液がめっき液に置換された様子を示す説明図である。It is explanatory drawing which shows a mode that the alignment liquid between a chip | tip and a process area | region was substituted by the plating solution. 貫通孔内に銅めっきを析出させる様子を示す説明図である。It is explanatory drawing which shows a mode that copper plating is deposited in a through-hole. 貫通孔内に貫通電極を形成した様子を示す説明図である。It is explanatory drawing which shows a mode that the penetration electrode was formed in the through-hole. 他の実施の形態におけるテンプレートの構成の概略を示す縦断面図である。It is a longitudinal cross-sectional view which shows the outline of a structure of the template in other embodiment. 他の実施の形態におけるテンプレート側電極の配置を示す平面図である。It is a top view which shows arrangement | positioning of the template side electrode in other embodiment. 他の実施の形態におけるテンプレートの構成の概略を示す縦断面図である。It is a longitudinal cross-sectional view which shows the outline of a structure of the template in other embodiment. 他の実施の形態において間接電極と電源を接続した様子を示す説明図である。It is explanatory drawing which shows a mode that the indirect electrode and the power supply were connected in other embodiment. 他の実施の形態において間接電極とテンプレート側電極を接続した様子を示す説明図である。It is explanatory drawing which shows a mode that the indirect electrode and the template side electrode were connected in other embodiment. 他の実施の形態におけるテンプレートの構成の概略を示す平面図である。It is a top view which shows the outline of a structure of the template in other embodiment. 他の実施の形態におけるテンプレートの構成の概略を示す縦断面図である。It is a longitudinal cross-sectional view which shows the outline of a structure of the template in other embodiment. 他の実施の形態におけるアライメント液逃がし槽の構成の概略を示す平面図である。It is a top view which shows the outline of a structure of the alignment liquid escape tank in other embodiment. 他の実施の形態においてテンプレートがウェハに吸着される様子を示す説明図である。It is explanatory drawing which shows a mode that a template is adsorb | sucked to a wafer in other embodiment.
 以下、本発明の実施の形態について説明する。本実施の形態では、本発明にかかる基板としてのウェハに行われる処理として、ウェハに形成された貫通孔内に貫通電極を形成するめっき処理について、当該めっき処理で用いられるウェハ及び基板処理治具(対向基板)としてのテンプレートの構成と共に説明する。なお、以下の説明で用いる図面において、各構成要素の寸法は、技術の理解の容易さを優先させるため、必ずしも実際の寸法に対応していない。 Hereinafter, embodiments of the present invention will be described. In the present embodiment, as a process performed on a wafer as a substrate according to the present invention, a plating process for forming a through electrode in a through hole formed in the wafer, a wafer used in the plating process and a substrate processing jig A description will be given together with the configuration of the template as (counter substrate). In the drawings used in the following description, the dimensions of each component do not necessarily correspond to the actual dimensions in order to prioritize easy understanding of the technology.
 先ず、本実施の形態のめっき処理で用いられるウェハ及びテンプレートの構成について説明する。図1及び図2に示すようにウェハ10の表面10aには、半導体チップ11(以下、「チップ11」という場合がある。)とスクライブライン12が形成されている。チップ11は、ウェハ面内均一に複数形成されている。スクライブライン12は、複数のチップ11、11間を延伸し、格子状に形成されている。また、スクライブライン12はチップ11よりも低く形成されている。さらにスクライブライン12は、ウェハ10の側面において開口し、ウェハ側面開口部12aを形成している。なお、スクライブラインとは、ウェハが切断され複数の半導体チップに分割される際のラインのことである。 First, the configuration of the wafer and template used in the plating process of the present embodiment will be described. As shown in FIGS. 1 and 2, a semiconductor chip 11 (hereinafter sometimes referred to as “chip 11”) and a scribe line 12 are formed on the surface 10 a of the wafer 10. A plurality of chips 11 are formed uniformly in the wafer surface. The scribe line 12 extends between the plurality of chips 11 and 11 and is formed in a lattice shape. The scribe line 12 is formed lower than the chip 11. Furthermore, the scribe line 12 is opened on the side surface of the wafer 10 to form a wafer side surface opening 12a. Note that the scribe line is a line when the wafer is cut and divided into a plurality of semiconductor chips.
 各チップ11には、ウェハ10の表面10aから裏面10b側に厚み方向に延伸する貫通孔13が形成されている。なお、本実施の形態では、貫通孔13はウェハ10を貫通していないが、所定の処理後にウェハ10の裏面10bが薄化されて貫通することになるため、便宜上、「貫通孔」と称する。貫通孔13の裏面10b側には、後述するテンプレート20のテンプレート側電極29に対応するウェハ側電極14が設けられている。なお、チップ11には、貫通孔13やウェハ側電極14の他、電子回路や配線等も形成されている。 Each chip 11 has a through hole 13 extending in the thickness direction from the front surface 10a of the wafer 10 to the back surface 10b. In the present embodiment, the through hole 13 does not penetrate the wafer 10, but the back surface 10 b of the wafer 10 is thinned and penetrated after a predetermined process, so that it is referred to as a “through hole” for convenience. . A wafer side electrode 14 corresponding to a template side electrode 29 of the template 20 described later is provided on the back surface 10 b side of the through hole 13. In addition to the through holes 13 and the wafer-side electrodes 14, electronic circuits and wirings are formed in the chip 11.
 図3及び図4に示すテンプレート20は、例えば略円盤形状を有し、ウェハ10の平面視における形状と同一の形状を有している。テンプレート20には例えば炭化珪素(SiC)などが用いられる。なお、図4は、後述するようにウェハ10に対向配置されたテンプレート20の状態を図示しており、表面20aが下側で裏面20bが上側に位置している。 3 and 4 has a substantially disk shape, for example, and has the same shape as that of the wafer 10 in plan view. For example, silicon carbide (SiC) or the like is used for the template 20. FIG. 4 illustrates the state of the template 20 disposed opposite to the wafer 10 as described later, with the front surface 20a on the lower side and the back surface 20b on the upper side.
 テンプレート20の表面20aには、チップ11に対して、処理液としてのめっき液を用いてめっき処理を行うための処理領域21が形成されている。処理領域21は、ウェハ10の複数のチップ11に対応する位置に複数形成されている。なお、めっき液としては、例えば硫酸銅と硫酸を溶解した混合液が用いられる。 On the surface 20 a of the template 20, a processing region 21 for performing a plating process on the chip 11 using a plating solution as a processing solution is formed. A plurality of processing regions 21 are formed at positions corresponding to the plurality of chips 11 on the wafer 10. As the plating solution, for example, a mixed solution in which copper sulfate and sulfuric acid are dissolved is used.
 また、テンプレート20の表面20aには、空気供給溝22が形成されている。空気供給溝22は、複数の処理領域21、21間を延伸し、ウェハ10のスクライブライン12に対応する位置に格子状に形成されている。テンプレート20の側面において空気供給溝22は開口し、テンプレート側面開口部22aを形成している。そして、空気供給溝22はテンプレート20を面方向に貫通して形成されている。また、空気供給溝22は表面20aより窪んだ溝形状を有し、処理領域21より低く形成されている。そして、テンプレート20をウェハ10に対向して配置した状態で、空気供給溝22はスクライブライン12に空気を供給できる。なお、空気供給溝22の位置や形状は本実施の形態に限定されず、スクライブライン12に空気を供給できれば任意に設計できる。 Further, an air supply groove 22 is formed on the surface 20 a of the template 20. The air supply groove 22 extends between the plurality of processing regions 21, 21 and is formed in a lattice shape at a position corresponding to the scribe line 12 of the wafer 10. The air supply groove 22 opens on the side surface of the template 20 to form a template side surface opening 22a. The air supply groove 22 is formed so as to penetrate the template 20 in the surface direction. The air supply groove 22 has a groove shape recessed from the surface 20 a and is formed lower than the processing region 21. The air supply groove 22 can supply air to the scribe line 12 with the template 20 facing the wafer 10. The position and shape of the air supply groove 22 are not limited to the present embodiment, and can be arbitrarily designed as long as air can be supplied to the scribe line 12.
 テンプレート20には、アライメント液を排出するためのアライメント液排出孔23が複数形成されている。アライメント液排出孔23は、表面10aから裏面10bに厚み方向に貫通する細管である。また、アライメント液排出孔23は、空気供給溝22に連通している。すなわち、テンプレート20をウェハ10に対向して配置した状態で、アライメント液排出孔23は、スクライブライン12の直上に位置するように形成されている。なお、アライメント液としては、例えば純水が用いられる。 The template 20 has a plurality of alignment liquid discharge holes 23 for discharging the alignment liquid. The alignment liquid discharge hole 23 is a thin tube that penetrates from the front surface 10a to the back surface 10b in the thickness direction. The alignment liquid discharge hole 23 communicates with the air supply groove 22. In other words, the alignment liquid discharge hole 23 is formed so as to be positioned immediately above the scribe line 12 in a state where the template 20 is disposed facing the wafer 10. For example, pure water is used as the alignment liquid.
 各アライメント液排出孔23には、アライメント液排出槽24が当該アライメント液排出孔23に連通して設けられている。アライメント液排出槽24は、テンプレート20の裏面20bに設けられている。アライメント液排出槽24は、アライメント液を排出するために貯留可能な槽であり、アライメント液を収容する所定の容積を有する。本実施の形態においては、図5に示すようにアライメント液排出槽24は、アライメント液排出孔23から複数の細溝24aに分岐した細溝構造を有している。なお、アライメント液排出槽24の内部の構成はこれに限定されず、任意に設計できる。例えばアライメント液排出槽24を多孔質体により構成してもよい。アライメント液排出孔23を通じて多孔質体に進入したアライメント液に対して、毛細管現象が働く。スポンジが水を吸収するように多孔質体もアライメント液を吸収するので、アライメント液排出槽24からアライメント液を汲み上げる役割を果たす。 Each alignment liquid discharge hole 23 is provided with an alignment liquid discharge tank 24 communicating with the alignment liquid discharge hole 23. The alignment liquid discharge tank 24 is provided on the back surface 20 b of the template 20. The alignment liquid discharge tank 24 is a tank that can be stored for discharging the alignment liquid, and has a predetermined volume for storing the alignment liquid. In the present embodiment, as shown in FIG. 5, the alignment liquid discharge tank 24 has a narrow groove structure branched from the alignment liquid discharge hole 23 into a plurality of narrow grooves 24a. In addition, the internal structure of the alignment liquid discharge tank 24 is not limited to this, and can be designed arbitrarily. For example, the alignment liquid discharge tank 24 may be formed of a porous body. Capillary action acts on the alignment liquid that has entered the porous body through the alignment liquid discharge hole 23. Since the porous body also absorbs the alignment liquid so that the sponge absorbs water, it plays the role of pumping up the alignment liquid from the alignment liquid discharge tank 24.
 アライメント液排出孔23とアライメント液排出槽24は、テンプレート20をウェハ10に対向して配置した状態で、スクライブライン12からアライメント液排出孔23を介してアライメント液排出槽24に至るまで、アライメント液が毛細管現象によって流通するように設計される。例えばスクライブライン12の幅、アライメント液排出孔23の径、アライメント液排出槽24の細溝24aの幅をこの順で徐々に小さくすれば、アライメント液に毛細管現象を生じせしめる。したがって、ポンプなどの外的な力を使用しなくても、アライメント液を排出することが可能になる。 The alignment liquid discharge hole 23 and the alignment liquid discharge tank 24 are the alignment liquid from the scribe line 12 to the alignment liquid discharge tank 24 through the alignment liquid discharge hole 23 with the template 20 facing the wafer 10. Is designed to circulate by capillary action. For example, if the width of the scribe line 12, the diameter of the alignment liquid discharge hole 23, and the width of the narrow groove 24a of the alignment liquid discharge tank 24 are gradually decreased in this order, a capillary phenomenon is caused in the alignment liquid. Therefore, the alignment liquid can be discharged without using an external force such as a pump.
 図3及び図4に示すようにテンプレート20には、めっき液を供給する処理液供給孔としてのめっき液供給孔25と、めっき液を排出する処理液排出孔としてのめっき液排出孔26が形成されている。めっき液供給孔25とめっき液排出孔26は、それぞれ表面20aから裏面20bに厚み方向に貫通する細管であり、表面20aにおいて開口している。また、めっき液供給孔25とめっき液排出孔26は、それぞれ処理領域21毎に1箇所ずつ設けられている。 As shown in FIGS. 3 and 4, the template 20 is formed with a plating solution supply hole 25 as a treatment solution supply hole for supplying a plating solution and a plating solution discharge hole 26 as a treatment solution discharge hole for discharging the plating solution. Has been. The plating solution supply hole 25 and the plating solution discharge hole 26 are thin tubes penetrating in the thickness direction from the front surface 20a to the back surface 20b, and are open on the front surface 20a. In addition, the plating solution supply hole 25 and the plating solution discharge hole 26 are provided for each processing region 21.
 各めっき液供給孔25には、処理液供給槽としてのめっき液供給槽27が当該めっき液供給孔25に連通して設けられている。また、各めっき液排出孔26にも、処理液排出槽としてのめっき液排出槽28が当該めっき液排出孔26に連通して設けられている。めっき液供給槽27とめっき液排出槽28は、それぞれテンプレート20の裏面20bに設けられている。 Each plating solution supply hole 25 is provided with a plating solution supply tank 27 as a processing solution supply tank in communication with the plating solution supply hole 25. Each plating solution discharge hole 26 is also provided with a plating solution discharge tank 28 as a processing solution discharge tank in communication with the plating solution discharge hole 26. The plating solution supply tank 27 and the plating solution discharge tank 28 are respectively provided on the back surface 20 b of the template 20.
 めっき液供給槽27は、めっき液を供給するために貯留可能な槽である。本実施の形態においては、図5に示すようにめっき液供給槽27は、複数の細溝27aに分岐した細溝構造を有している。かかる場合、細溝27aに供給されて当該細溝27a内を進行しためっき液は、めっき液供給孔25に進入する。このようにめっき液供給槽27からめっき液供給孔25に至るまでを細管もしくは細溝で構成することにより、その内部にあるめっき液に毛細管現象を生じせしめる。したがって、ポンプなどの外的な力を使用しなくても、めっき液を供給することが可能になる。なお、めっき液供給槽27の内部の構成はこれに限定されず、任意に設計できる。 The plating solution supply tank 27 is a tank that can be stored to supply a plating solution. In the present embodiment, as shown in FIG. 5, the plating solution supply tank 27 has a narrow groove structure branched into a plurality of narrow grooves 27a. In such a case, the plating solution that has been supplied to the narrow groove 27 a and has advanced through the narrow groove 27 a enters the plating solution supply hole 25. In this way, by forming the plating solution supply tank 27 to the plating solution supply hole 25 with a narrow tube or a narrow groove, a capillary phenomenon is caused in the plating solution in the inside. Therefore, the plating solution can be supplied without using an external force such as a pump. In addition, the structure inside the plating solution supply tank 27 is not limited to this, and can be designed arbitrarily.
 めっき液排出槽28は、めっき液を排出するために貯留可能な槽であり、めっき液を収容する所定の容積を有する。本実施の形態においては、めっき液排出槽28は、めっき液排出孔26から複数の細溝28aに分岐した構成を有している。このように、めっき液排出孔26からめっき液排出槽28に至るまでを細管もしくは細溝で構成することにより、その内部にあるめっき液に毛細管現象を生じせしめる。したがって、ポンプなどの外的な力を使用しなくても、めっき液を排出することが可能になる。なお、めっき液排出槽28の内部の構成はこれに限定されず、任意に設計できる。例えばめっき液排出槽28を多孔質体により構成してもよい。めっき液排出孔26を通じて多孔質体に進入しためっき液に対して、毛細管現象が働く。スポンジが水を吸収するように多孔質体もめっき液を吸収するので、めっき液排出槽28からめっき液を汲み上げる役割を果たす。 The plating solution discharge tank 28 is a tank that can be stored for discharging the plating solution, and has a predetermined volume for containing the plating solution. In the present embodiment, the plating solution discharge tank 28 has a structure branched from the plating solution discharge hole 26 into a plurality of narrow grooves 28a. As described above, by forming the plating solution discharge hole 26 to the plating solution discharge tank 28 with a thin tube or a narrow groove, a capillary phenomenon is caused in the plating solution in the inside thereof. Therefore, the plating solution can be discharged without using an external force such as a pump. The internal configuration of the plating solution discharge tank 28 is not limited to this, and can be arbitrarily designed. For example, you may comprise the plating solution discharge tank 28 with a porous body. Capillary action acts on the plating solution that has entered the porous body through the plating solution discharge hole 26. Since the porous material also absorbs the plating solution so that the sponge absorbs water, it plays the role of pumping up the plating solution from the plating solution discharge tank 28.
 めっき液供給槽27、めっき液供給孔25、めっき液排出孔26、めっき液排出槽28は、テンプレート20をウェハ10に対向して配置した状態で、めっき液供給槽27からめっき液排出槽28に至るまで、めっき液が毛細管現象によって流通するように設計される。例えばめっき液供給槽27の細溝27aの幅、めっき液供給孔25の径、めっき液排出孔26の径、めっき液排出槽28の細溝28aの幅をこの順で徐々に小さくすれば、めっき液に毛細管現象を生じせしめる。具体的な寸法については、公知のラプラスの式等を用いて算出することができ、或いはシミュレーションや実験等を行って導出することもできる。かかる場合、処理領域21に対して、めっき液供給孔25から新しいめっき液が供給され、さらにめっき液排出孔26から処理後のめっき液が排出される。このように処理領域21では、常に清新なめっき液が供給され、めっき液が滞留しないので、当該めっき処理を適切に行うことができる。 The plating solution supply tank 27, the plating solution supply hole 25, the plating solution discharge hole 26, and the plating solution discharge tank 28 are arranged from the plating solution supply tank 27 to the plating solution discharge tank 28 with the template 20 facing the wafer 10. The plating solution is designed to circulate by capillary action. For example, if the width of the narrow groove 27a of the plating solution supply tank 27, the diameter of the plating solution supply hole 25, the diameter of the plating solution discharge hole 26, and the width of the narrow groove 28a of the plating solution discharge tank 28 are gradually reduced in this order, Cause capillary action in the plating solution. The specific dimensions can be calculated using a well-known Laplace equation or can be derived through simulations or experiments. In such a case, a new plating solution is supplied from the plating solution supply hole 25 to the processing region 21, and the processed plating solution is discharged from the plating solution discharge hole 26. In this way, in the processing region 21, since a fresh plating solution is always supplied and the plating solution does not stay, the plating process can be performed appropriately.
 なお、本実施の形態において、空気供給溝22、アライメント液排出孔23、めっき液供給孔25、めっき液排出孔26は、例えばフォトリソグラフィー処理及びエッチング処理によって同時に形成さしてもよい。同様にアライメント液排出槽24、めっき液供給槽27、めっき液排出槽28も、例えばフォトリソグラフィー処理及びエッチング処理によって同時に形成さしてもよい。 In the present embodiment, the air supply groove 22, the alignment liquid discharge hole 23, the plating liquid supply hole 25, and the plating liquid discharge hole 26 may be simultaneously formed by, for example, a photolithography process and an etching process. Similarly, the alignment liquid discharge tank 24, the plating liquid supply tank 27, and the plating liquid discharge tank 28 may be simultaneously formed by, for example, a photolithography process and an etching process.
 図4に示すようにテンプレート20の処理領域21には、当該処理領域21のめっき液に電圧を印可するためのテンプレート側電極29が設けられている。テンプレート側電極29は、テンプレート20をウェハ10に対向して配置した状態で、貫通孔13の直上に位置するように設けられている。 As shown in FIG. 4, a template-side electrode 29 for applying a voltage to the plating solution in the processing region 21 is provided in the processing region 21 of the template 20. The template-side electrode 29 is provided so as to be positioned immediately above the through hole 13 in a state where the template 20 is disposed facing the wafer 10.
 次に、以上のように構成されたウェハ10及びテンプレート20を用いためっき処理について説明する。 Next, the plating process using the wafer 10 and the template 20 configured as described above will be described.
 先ず、図6に示すようにウェハ10の表面10a全面にアライメント液Pを供給する。アライメント液Pは、スクライブライン12と貫通孔13の内部にも進入する。なお、当該めっき処理に先行するプロセス、例えばエッチング工程の後、ウェハ10の表面10aを洗浄するが、上記アライメント液Pには、この洗浄で用いられる純水を用いてもよい。すなわち、洗浄後の乾燥や、アライメント液Pの供給を別途の工程で行う必要はなく、ウェハ10の洗浄がアライメント液Pの供給を兼ねる。 First, alignment liquid P is supplied to the entire surface 10a of the wafer 10 as shown in FIG. The alignment liquid P also enters the scribe line 12 and the through hole 13. Note that the surface 10a of the wafer 10 is cleaned after a process preceding the plating process, for example, an etching step. As the alignment liquid P, pure water used in this cleaning may be used. That is, it is not necessary to perform drying after cleaning or supply of the alignment liquid P in a separate process, and the cleaning of the wafer 10 also serves as the supply of the alignment liquid P.
 続いて、図7に示すようにアライメント液Pを挟んでウェハ10の表面10a側にテンプレート20を配置する。テンプレート20は、チップ11と処理領域21が対向するように配置される。なお、チップ11と処理領域21とは、厳密に対応している必要はない。図7に示すようにこれらの位置が多少ずれている場合でも、後述する工程においてウェハ10とテンプレート20の位置調整が行われる。 Subsequently, as shown in FIG. 7, the template 20 is arranged on the surface 10a side of the wafer 10 with the alignment liquid P interposed therebetween. The template 20 is arranged so that the chip 11 and the processing region 21 face each other. Note that the chip 11 and the processing region 21 do not need to correspond exactly. Even when these positions are slightly shifted as shown in FIG. 7, the position adjustment of the wafer 10 and the template 20 is performed in the process described later.
 テンプレート20の配置は、保持機構30によって行われる。この保持機構30によって、テンプレート20は所定の高さに保持される。なお、保持機構30はテンプレート20を保持できるものであれば、その構成は特に限定されない。 The placement of the template 20 is performed by the holding mechanism 30. The template 20 is held at a predetermined height by the holding mechanism 30. The configuration of the holding mechanism 30 is not particularly limited as long as it can hold the template 20.
 テンプレート20が配置されると、図8及び図9に示すようにアライメント液Pが毛細管現象により、空気供給溝22を通ってアライメント液排出孔23に進入する。このアライメント液Pは、図10及び図11に示すように毛細管現象により、さらにアライメント液排出槽24まで流通して排出される。このとき、アライメント液Pが排出されるに従って、テンプレート側面開口部22aとウェハ側面開口部12aから空気が進入していき(図11の矢印)、空気供給溝22とスクライブライン12との間で形成される空間40に空気Aが供給される。そうすると、チップ11の周縁部と処理領域21の周縁部の間に気液界面Fが形成される。 When the template 20 is arranged, the alignment liquid P enters the alignment liquid discharge hole 23 through the air supply groove 22 by capillary action as shown in FIGS. This alignment liquid P is further circulated and discharged to the alignment liquid discharge tank 24 by capillary action as shown in FIGS. At this time, as the alignment liquid P is discharged, air enters from the template side opening 22a and the wafer side opening 12a (arrow in FIG. 11), and is formed between the air supply groove 22 and the scribe line 12. Air A is supplied to the space 40 to be formed. As a result, a gas-liquid interface F is formed between the peripheral edge of the chip 11 and the peripheral edge of the processing region 21.
 このように気液界面Fを形成する間、テンプレート20は保持機構30によって所定の高さに保持されている。換言すれば、アライメント液Pがスクライブライン12からアライメント液排出槽24に排出されるに伴い、テンプレート20の高さが下がることがない。このため、スクライブライン12、アライメント液排出孔23、アライメント液排出槽24の関係を維持することができ、アライメント液Pに生じる毛細管現象を維持することができる。したがって、気液界面Fを適切に形成することができる。 While the gas-liquid interface F is thus formed, the template 20 is held at a predetermined height by the holding mechanism 30. In other words, the height of the template 20 does not decrease as the alignment liquid P is discharged from the scribe line 12 to the alignment liquid discharge tank 24. For this reason, the relationship between the scribe line 12, the alignment liquid discharge hole 23, and the alignment liquid discharge tank 24 can be maintained, and the capillary phenomenon generated in the alignment liquid P can be maintained. Therefore, the gas-liquid interface F can be formed appropriately.
 なお、気液界面Fを形成する間、チップ11と処理領域21間のアライメント液Pは、毛細管現象によりめっき液供給孔25とめっき液排出孔26にも進入する。 Note that while the gas-liquid interface F is formed, the alignment liquid P between the chip 11 and the processing region 21 also enters the plating solution supply hole 25 and the plating solution discharge hole 26 by capillary action.
 チップ11と処理領域21の間に気液界面Fが形成されると、図12に示すように保持機構30によるテンプレート20の保持を解除する。そうすると、図13に示すように気液界面Fにおけるアライメント液Pの表面張力によって、テンプレート20を移動させる復元力(図13の矢印)がテンプレート20に作用する。そうすると、チップ11の位置と処理領域21の位置がずれている場合でも、これらチップ11と処理領域21が対向するようにテンプレート20が移動し、ウェハ10とテンプレート20の位置調整が高精度に行われる。 When the gas-liquid interface F is formed between the chip 11 and the processing region 21, the holding of the template 20 by the holding mechanism 30 is released as shown in FIG. Then, a restoring force (arrow in FIG. 13) that moves the template 20 acts on the template 20 by the surface tension of the alignment liquid P at the gas-liquid interface F as shown in FIG. Then, even when the position of the chip 11 and the position of the processing area 21 are shifted, the template 20 moves so that the chip 11 and the processing area 21 face each other, and the position adjustment of the wafer 10 and the template 20 is performed with high accuracy. Is called.
 ウェハ10とテンプレート20の位置調整が行われると、次にめっき処理が行われる。このめっき処理を行うに際しては、図14に示すようにウェハ側電極14とテンプレート側電極29には、直流電源50が接続される。ウェハ側電極14は、直流電源50の負極側に接続される。テンプレート側電極29は、直流電源50の正極側に接続される。なお、直流電源50は、テンプレート20における複数のウェハ側電極14と複数のテンプレート側電極29に対して共通の電源として用いられる。 After the position adjustment of the wafer 10 and the template 20 is performed, a plating process is performed next. In performing this plating process, a DC power source 50 is connected to the wafer side electrode 14 and the template side electrode 29 as shown in FIG. Wafer side electrode 14 is connected to the negative electrode side of DC power supply 50. The template side electrode 29 is connected to the positive electrode side of the DC power supply 50. The DC power supply 50 is used as a common power supply for the plurality of wafer side electrodes 14 and the plurality of template side electrodes 29 in the template 20.
 その後、図15に示すようにめっき液供給槽27にめっき液Mが供給され、当該めっき液Mは、図16に示すようにその毛細管現象によってめっき液供給槽27からめっき液排出槽28まで流通する。すなわち、めっき液供給槽27からめっき液排出槽28にあったアライメント液Pがめっき液Mに置換される。そして、チップ11上に供給されためっき液Mは貫通孔13に進入し、当該貫通孔13内のアライメント液Pもめっき液Mに置換される。 Thereafter, the plating solution M is supplied to the plating solution supply tank 27 as shown in FIG. 15, and the plating solution M flows from the plating solution supply tank 27 to the plating solution discharge tank 28 by the capillary phenomenon as shown in FIG. To do. That is, the alignment liquid P in the plating liquid discharge tank 28 from the plating liquid supply tank 27 is replaced with the plating liquid M. Then, the plating solution M supplied onto the chip 11 enters the through hole 13, and the alignment solution P in the through hole 13 is also replaced with the plating solution M.
 その後、直流電源50により、テンプレート側電極29を陽極とし、ウェハ側電極14を陰極として、めっき液Mに電圧を印可する。そうすると、貫通孔13内のめっき液Mに対して電解めっきが行われ、図17に示すように貫通孔13内に銅めっき60aが析出する。 Thereafter, a voltage is applied to the plating solution M by the DC power source 50 using the template side electrode 29 as an anode and the wafer side electrode 14 as a cathode. Then, electrolytic plating is performed on the plating solution M in the through hole 13, and the copper plating 60a is deposited in the through hole 13 as shown in FIG.
 その後、貫通孔13内でめっき処理が行われた後のめっき液Mは、めっき液排出孔26に排出される。このようにチップ11上では、常に清新なめっき液Mが連続的に供給され、めっき液Mが滞留しない。したがって、貫通孔13内に銅めっき50を均一に析出させることができる。 Thereafter, the plating solution M after the plating process is performed in the through hole 13 is discharged to the plating solution discharge hole 26. In this way, the fresh plating solution M is continuously supplied on the chip 11 and the plating solution M does not stay. Therefore, the copper plating 50 can be uniformly deposited in the through hole 13.
 そして、かかるめっき処理を連続的に行うことにより銅めっき60aが成長し、図18に示すように貫通孔13内に貫通電極60が形成される。 Then, by continuously performing such plating treatment, the copper plating 60a grows, and the through electrode 60 is formed in the through hole 13 as shown in FIG.
 以上の実施の形態によれば、ウェハ10の表面10a全面にアライメント液Pを供給した後、スクライブライン12に存するアライメント液Pのみが毛細管現象によりアライメント液排出孔23を介してアライメント液排出槽24に排出される。同時に空気供給溝22とスクライブライン12との間で形成される空間40に空気Aが供給されることで、チップ11の周縁部と処理領域21の周縁部との間に気液界面Fが形成される。そして、気液界面Fにおけるアライメント液Pの表面張力によって、テンプレート20を移動させる復元力が作用し、ウェハ10に対するテンプレート20の位置調整が高精度に行われる。このように本実施の形態では、ウェハ10の表面10a全面にアライメント液Pが供給されるので、従来のアライメント液供給の困難性が解消され、ウェハ10とテンプレート20の位置調整を適切且つ容易に行うことができる。 According to the above embodiment, after supplying the alignment liquid P to the entire surface 10 a of the wafer 10, only the alignment liquid P existing in the scribe line 12 is brought into alignment liquid discharge tank 24 through the alignment liquid discharge hole 23 by capillary action. To be discharged. At the same time, air A is supplied to the space 40 formed between the air supply groove 22 and the scribe line 12, thereby forming a gas-liquid interface F between the peripheral edge of the chip 11 and the peripheral edge of the processing region 21. Is done. And the restoring force which moves the template 20 acts with the surface tension of the alignment liquid P in the gas-liquid interface F, and the position adjustment of the template 20 with respect to the wafer 10 is performed with high accuracy. As described above, in the present embodiment, since the alignment liquid P is supplied to the entire surface 10a of the wafer 10, the difficulty in supplying the conventional alignment liquid is eliminated, and the position adjustment of the wafer 10 and the template 20 is appropriately and easily performed. It can be carried out.
 また、テンプレート20をウェハ10上に配置してから、チップ11と処理領域21の間に気液界面Fを形成するまでの間、保持機構30によってテンプレート20を保持している。このため、アライメント液Pがスクライブライン12からアライメント液排出槽24に排出される間も、アライメント液Pに生じる毛細管現象を維持することができ、気液界面Fを適切に形成することができる。 Further, the template 20 is held by the holding mechanism 30 after the template 20 is arranged on the wafer 10 until the gas-liquid interface F is formed between the chip 11 and the processing region 21. For this reason, while the alignment liquid P is discharged from the scribe line 12 to the alignment liquid discharge tank 24, the capillary phenomenon generated in the alignment liquid P can be maintained, and the gas-liquid interface F can be appropriately formed.
 また、ウェハ10とテンプレート20を位置調整するために用いられるアライメント液Pは純水である。本実施の形態のようにウェハ10に貫通電極60を形成する際には、事前にウェハ10の表面10aを洗浄する。表面10aの洗浄には例えば洗浄液として純水が用いられるが、この純水を利用することで、別途アライメント液を供給する必要がなくなる。したがって、ウェハ10とテンプレート20の位置調整を効率よく行うことができる。 Further, the alignment liquid P used for adjusting the position of the wafer 10 and the template 20 is pure water. When the through electrode 60 is formed on the wafer 10 as in the present embodiment, the surface 10a of the wafer 10 is cleaned in advance. For example, pure water is used as a cleaning liquid for cleaning the surface 10a. However, by using this pure water, it is not necessary to separately supply an alignment liquid. Therefore, the position adjustment of the wafer 10 and the template 20 can be performed efficiently.
 また、気液界面Fはスクライブライン12(チップ11の周縁部)を利用して形成されるので、ウェハ10上で素子が形成される領域に別途溝を形成する必要がない。したがって、ウェハ10上のスペースを有用活用でき、電子回路や配線等を含む半導体デバイスの設計の自由度が向上する。 Further, since the gas-liquid interface F is formed using the scribe line 12 (peripheral edge of the chip 11), it is not necessary to form a separate groove in a region where an element is formed on the wafer 10. Therefore, the space on the wafer 10 can be used effectively, and the degree of freedom in designing semiconductor devices including electronic circuits and wirings is improved.
 また、このようにウェハ10とテンプレート20の位置調整が適切に行われるので、その後チップ11上(貫通孔13内)にめっき液Mを適切に供給できる。そして、貫通孔13内のアライメント液Pをめっき液Mに置換して、めっき処理を適切に行うことができる。 In addition, since the position adjustment of the wafer 10 and the template 20 is appropriately performed as described above, the plating solution M can be appropriately supplied onto the chip 11 (in the through hole 13) thereafter. Then, the alignment solution P in the through hole 13 is replaced with the plating solution M, and the plating process can be performed appropriately.
 ここで、従来においては、貫通孔内に貫通電極を形成する際、貫通孔内部に空気があるため、当該空気をめっき液に溶解させる必要があった。このめっき液に空気を溶解させる工程は困難で時間がかかるものであった。これに対して、本実施の形態においては、アライメント液Pをめっき液Mに置換することになるため、従来の空気を溶解させる工程を省略することができ、めっき処理を効率よく行うことができる。 Here, conventionally, when the through electrode is formed in the through hole, since the air is inside the through hole, it is necessary to dissolve the air in the plating solution. The process of dissolving air in this plating solution was difficult and time consuming. On the other hand, in this embodiment, since the alignment liquid P is replaced with the plating liquid M, the conventional step of dissolving air can be omitted, and the plating process can be performed efficiently. .
 また近年、半導体デバイスでは、パターンの微細化、高アスペクト化が進み、ウェハを洗浄する工程において洗浄液の表面張力で発生する、いわゆるパターン倒れ欠陥が懸念されている。本実施の形態では、純水であるアライメント液Pをめっき液Mに置換することにより、ウェハ10の洗浄から貫通電極60の形成までを一気通貫で行うことができる。したがって、上述したようなパターン倒れを抑制することができる。 In recent years, in semiconductor devices, pattern miniaturization and high aspect ratio have progressed, and there is a concern about so-called pattern collapse defects that occur due to the surface tension of the cleaning liquid in the wafer cleaning process. In the present embodiment, by replacing the alignment solution P, which is pure water, with the plating solution M, it is possible to perform from the cleaning of the wafer 10 to the formation of the through electrode 60 all at once. Therefore, the pattern collapse as described above can be suppressed.
 以上の実施の形態では、テンプレート側電極29をテンプレート20のウェハ10に対向する面に設けていたが、テンプレート側電極29の配置はこれに限られない。図19に示すように、めっき液供給槽27の細溝27aの底面に、テンプレート側電極29を設けてもよい。すなわち、テンプレート20のウェハ10に対向する面の反対側に配置される。図20を見ても分かるように、めっき液供給槽27の細溝27aはめっき液Mに対して比較的大きな表面積を有する。したがって、細溝27aの底面に配置されたテンプレート側電極29は、めっき液Mとの電荷交換(めっき処理)をより効率よく行うことができる。 In the above embodiment, the template side electrode 29 is provided on the surface of the template 20 facing the wafer 10, but the arrangement of the template side electrode 29 is not limited to this. As shown in FIG. 19, a template side electrode 29 may be provided on the bottom surface of the narrow groove 27 a of the plating solution supply tank 27. That is, the template 20 is disposed on the opposite side of the surface facing the wafer 10. As can be seen from FIG. 20, the narrow groove 27 a of the plating solution supply tank 27 has a relatively large surface area with respect to the plating solution M. Therefore, the template side electrode 29 disposed on the bottom surface of the narrow groove 27a can perform charge exchange (plating treatment) with the plating solution M more efficiently.
 さらに、図21に示すようにテンプレート側電極29の下方に、間接電極70を設けてもよい。間接電極70は、電極71を絶縁体72で覆うことにより形成されている。間接電極70は、スイッチ73によって、テンプレート側電極29の接続と直流電源50の接続を切り替えられる。かかる場合、先ず、図22に示すようにテンプレート側電極29を電気的にフロートの状態にしておいた上で、間接電極70を直流電源50の正極側に接続する。間接電極70とウェハ側電極14との間に電界がかかるので、めっき液M中の正のイオンと負のイオンが、それぞれウェハ側電極14と間接電極70に引き寄せられる。しかしながら、間接電極70は電極71が絶縁体72で覆われていることから、引き寄せられたイオンは電荷交換が行われず、テンプレート側電極29とウェハ側電極14の表面に堆積する。次いで、図23に示すように、スイッチ73を切り替えることにより、間接電極70とテンプレート側電極29とを接続する。すると、間接電極70に蓄積されていた正の電荷がテンプレート側電極29に移動し、テンプレート側電極29の表面に堆積している負のイオンが電荷交換される。ウェハ側電極14においても電荷交換が行われる為、正のイオンが還元されて、銅めっき60aがウェハ側電極14の表面に析出する。このように制御すれば、めっき液中のイオンをウェハ側電極14に効率よく搬送できるので、めっき処理を加速させることができる。 Furthermore, an indirect electrode 70 may be provided below the template side electrode 29 as shown in FIG. The indirect electrode 70 is formed by covering the electrode 71 with an insulator 72. The indirect electrode 70 can be switched between the connection of the template side electrode 29 and the connection of the DC power source 50 by a switch 73. In such a case, first, the template side electrode 29 is electrically floated as shown in FIG. 22, and then the indirect electrode 70 is connected to the positive electrode side of the DC power supply 50. Since an electric field is applied between the indirect electrode 70 and the wafer side electrode 14, positive ions and negative ions in the plating solution M are attracted to the wafer side electrode 14 and the indirect electrode 70, respectively. However, since the electrode 71 of the indirect electrode 70 is covered with the insulator 72, the attracted ions are not subjected to charge exchange and are deposited on the surfaces of the template side electrode 29 and the wafer side electrode 14. Next, as shown in FIG. 23, the indirect electrode 70 and the template side electrode 29 are connected by switching the switch 73. Then, the positive charges accumulated in the indirect electrode 70 move to the template side electrode 29, and negative ions deposited on the surface of the template side electrode 29 are exchanged. Since charge exchange is also performed on the wafer side electrode 14, positive ions are reduced, and the copper plating 60 a is deposited on the surface of the wafer side electrode 14. By controlling in this way, ions in the plating solution can be efficiently transported to the wafer-side electrode 14, so that the plating process can be accelerated.
 以上の実施の形態のテンプレート20には、図24及び図25に示すようにアライメント液逃がし孔80とアライメント液逃がし槽81が設けられていてもよい。アライメント液逃がし孔80は、表面20aから裏面20bに厚み方向に貫通する細管であり、表面20aにおいて開口している。また、アライメント液逃がし孔80は、処理領域21毎に1箇所ずつ設けられている。 In the template 20 of the above embodiment, an alignment liquid escape hole 80 and an alignment liquid escape tank 81 may be provided as shown in FIGS. The alignment liquid escape hole 80 is a thin tube that penetrates from the front surface 20a to the back surface 20b in the thickness direction, and is open at the front surface 20a. One alignment liquid escape hole 80 is provided for each processing region 21.
 アライメント液逃がし槽81は、アライメント液逃がし孔80に連通し、テンプレート20の裏面20bに設けられている。アライメント液逃がし槽81は、アライメント液Pを排出するために貯留可能な槽である。本実施の形態においては、図26に示すようにアライメント液逃がし槽81は、アライメント液逃がし孔80から複数の細溝81aに分岐した構成を有している。このように、アライメント液逃がし孔80からアライメント液逃がし槽81に至るまでを細管もしくは細溝で構成することにより、その内部にあるアライメント液Pに毛細管現象を生じせしめる。なお、アライメント液逃がし槽81の内部の構成はこれに限定されず、任意に設計できる。例えばアライメント液逃がし槽81を多孔質体により構成してもよい。 The alignment liquid escape tank 81 communicates with the alignment liquid escape hole 80 and is provided on the back surface 20 b of the template 20. The alignment liquid escape tank 81 is a tank that can be stored for discharging the alignment liquid P. In the present embodiment, as shown in FIG. 26, the alignment liquid escape tank 81 has a configuration branched from the alignment liquid escape hole 80 into a plurality of narrow grooves 81a. In this way, by forming the alignment liquid escape hole 80 to the alignment liquid escape tank 81 with a narrow tube or a narrow groove, a capillary phenomenon is caused in the alignment liquid P inside. In addition, the internal structure of the alignment liquid escape tank 81 is not limited to this, and can be designed arbitrarily. For example, the alignment liquid escape tank 81 may be formed of a porous body.
 上述したようにチップ11と処理領域21の間に気液界面Fが形成されると、保持機構30によるテンプレート20の保持を解除し、ウェハ10とテンプレート20の位置調整をする。すなわち、その後に行われるめっき処理においては、テンプレート20は保持機構30に保持されていないが、当該めっき処理においてもテンプレート20の位置を維持する必要がある。しかしながら、保持機構30によるテンプレート20の保持を解除すると、テンプレート20の自重によってチップ11と処理領域21との間のアライメント液P(めっき液M)に圧力が作用し、気液界面Fが陽圧になる場合がある。かかる場合、テンプレート20の位置が維持されない。 When the gas-liquid interface F is formed between the chip 11 and the processing region 21 as described above, the holding of the template 20 by the holding mechanism 30 is released, and the position of the wafer 10 and the template 20 is adjusted. That is, in the subsequent plating process, the template 20 is not held by the holding mechanism 30, but it is necessary to maintain the position of the template 20 also in the plating process. However, when the holding of the template 20 by the holding mechanism 30 is released, pressure acts on the alignment liquid P (plating liquid M) between the chip 11 and the processing region 21 due to the weight of the template 20, and the gas-liquid interface F is positive pressure. It may become. In such a case, the position of the template 20 is not maintained.
 これを回避するため、本実施の形態では、図27に示すようにチップ11と処理領域21の間のアライメント液P(めっき液M)を毛細管現象によってアライメント液逃がし孔80からアライメント液逃がし槽81まで流通させる。そうすると、気液界面Fが陽圧になるのを抑制して、チップ11と処理領域21の間のアライメント液P(めっき液M)に適切な保持力を発生させることができる。この保持力によって、テンプレート20はウェハ10に吸着され、当該テンプレート20の位置が維持される。 In order to avoid this, in the present embodiment, as shown in FIG. 27, the alignment liquid P (plating liquid M) between the chip 11 and the processing region 21 is discharged from the alignment liquid escape hole 80 by the capillary phenomenon, and the alignment liquid escape tank 81. To distribute. Then, it is possible to suppress the gas-liquid interface F from becoming a positive pressure and generate an appropriate holding force for the alignment liquid P (plating liquid M) between the chip 11 and the processing region 21. With this holding force, the template 20 is attracted to the wafer 10 and the position of the template 20 is maintained.
 本実施の形態によれば、テンプレート20にアライメント液逃がし孔80とアライメント液逃がし槽81を設けることによって、めっき処理を行う間、テンプレート20の位置を適切に維持することができる。したがって、当該めっき処理を適切に行うことができる。 According to the present embodiment, by providing the alignment liquid escape hole 80 and the alignment liquid escape tank 81 in the template 20, the position of the template 20 can be appropriately maintained during the plating process. Therefore, the plating process can be performed appropriately.
 以上の実施の形態では、アライメント液Pとして純水を用いたが、他のアライメント液、例えばめっき液やエッチング液等を用いてもよい。 In the above embodiment, pure water is used as the alignment liquid P, but other alignment liquids such as a plating liquid and an etching liquid may be used.
 以上の実施の形態では、チップ11毎に、めっき液供給槽27、めっき液排出槽28、アライメント液逃がし槽81を設けていたが、これらを複数のチップ11に共通の槽としてもよい。 In the above embodiment, the plating solution supply tank 27, the plating solution discharge tank 28, and the alignment liquid escape tank 81 are provided for each chip 11, but these may be shared by the plurality of chips 11.
 以上の実施の形態では、テンプレート20に空気供給溝22が形成されていたが、当該空気供給溝22を省略してもよい。要は、テンプレート20とウェハ10との間において、スクライブライン12上に空気が供給される空間が形成されればよく、かかる場合、当該空間に空気が進入して、チップ11の周縁部と処理領域21の周縁部の間に気液界面Fが形成されるのである。 In the embodiment described above, the air supply groove 22 is formed in the template 20, but the air supply groove 22 may be omitted. In short, it is sufficient that a space for supplying air is formed on the scribe line 12 between the template 20 and the wafer 10. In such a case, the air enters the space and the peripheral portion of the chip 11 and the processing are performed. A gas-liquid interface F is formed between the peripheral portions of the region 21.
 以上の実施の形態では、ウェハ10の所定の処理としてめっき処理をする場合について説明したが、本発明は種々の液処理に適用できる。例えばエッチング液を用いたエッチング処理等の他の電界処理にも本発明を適用できるし、例えば洗浄液を用いた洗浄処理等の電解処理以外の液処理にも本発明を適用できる。また、半導体デバイスの検査にも本発明を適用でき、例えば微細且つ複数の貫通電極にコンタクト液を一括コンタクトさせ、ウェハ単位で当該貫通電極を検査することができる。さらには、例えば基板同士を接合する際の基板の位置調整にも本発明を適用できる。この場合、基板処理治具としてのテンプレート20は、ウェハ10に接合される対向基板として機能する。また、基板同士の位置合わせを行った後、赤外線等の照射により基板同士の接触する面を活性化することもできる。 Although the case where the plating process is performed as the predetermined process of the wafer 10 has been described in the above embodiment, the present invention can be applied to various liquid processes. For example, the present invention can be applied to other electric field processes such as an etching process using an etching liquid, and the present invention can also be applied to a liquid process other than an electrolytic process such as a cleaning process using a cleaning liquid. The present invention can also be applied to inspection of semiconductor devices. For example, contact liquid can be contacted at once with a plurality of fine through electrodes, and the through electrodes can be inspected in wafer units. Furthermore, for example, the present invention can be applied to the position adjustment of the substrates when the substrates are bonded to each other. In this case, the template 20 as the substrate processing jig functions as a counter substrate bonded to the wafer 10. In addition, after aligning the substrates, the surfaces of the substrates in contact with each other can be activated by irradiation with infrared rays or the like.
 以上、添付図面を参照しながら本発明の好適な実施の形態について説明したが、本発明はかかる例に限定されない。当業者であれば、請求の範囲に記載された思想の範疇内において、各種の変更例または修正例に想到し得ることは明らかであり、それらについても当然に本発明の技術的範囲に属するものと了解される。 The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to such examples. It is obvious for those skilled in the art that various changes or modifications can be conceived within the scope of the idea described in the claims, and these are naturally within the technical scope of the present invention. It is understood.
  10  ウェハ
  11  チップ
  12  スクライブライン
  12a ウェハ側面開口部
  13  貫通孔
  14  ウェハ側電極
  20  テンプレート
  21  処理領域
  22  空気供給溝
  22a テンプレート側面開口部
  23  アライメント液排出孔
  24  アライメント液排出槽
  25  めっき液供給孔
  26  めっき液排出孔
  27  めっき液供給槽
  28  めっき液排出槽
  29  テンプレート側電極
  30  保持機構
  40  空間
  50  直流電源
  60a 銅めっき
  60  貫通電極
  80  アライメント液逃がし孔
  81  アライメント液逃がし槽
  A   空気
  F   気液界面
  M   めっき液
  P   アライメント液
DESCRIPTION OF SYMBOLS 10 Wafer 11 Chip 12 Scribe line 12a Wafer side opening 13 Through-hole 14 Wafer side electrode 20 Template 21 Processing area 22 Air supply groove 22a Template side opening 23 Alignment liquid discharge hole 24 Alignment liquid discharge tank 25 Plating liquid supply hole 26 Plating Liquid discharge hole 27 Plating liquid supply tank 28 Plating liquid discharge tank 29 Template side electrode 30 Holding mechanism 40 Space 50 DC power supply 60a Copper plating 60 Through electrode 80 Alignment liquid escape hole 81 Alignment liquid escape tank A Air F Gas-liquid interface M Plating liquid P alignment liquid

Claims (12)

  1. 複数の半導体チップが形成された基板に所定の処理を行う基板処理方法であって、
    前記複数の半導体チップが形成された基板の表面全面にアライメント液を供給する第1工程と、
    厚み方向に貫通するアライメント液排出孔が形成された対向基板を、前記アライメント液を挟んで基板上に配置する第2工程と、
    前記半導体チップ間のスクライブラインから前記アライメント液排出孔を介して前記対向基板の上面側に毛細管現象によって前記アライメント液を排出すると共に、前記対向基板と基板との間において前記スクライブライン上に形成される空間に空気が供給されて、前記半導体チップの周縁部と前記対向基板との間に気液界面を形成する第3工程と、
    前記気液界面における前記アライメント液の表面張力によって、基板に対する前記対向基板の位置調整を行う第4工程と、を有する。
    A substrate processing method for performing predetermined processing on a substrate on which a plurality of semiconductor chips are formed,
    A first step of supplying an alignment liquid to the entire surface of the substrate on which the plurality of semiconductor chips are formed;
    A second step of disposing the counter substrate on which the alignment liquid discharge hole penetrating in the thickness direction is formed on the substrate with the alignment liquid interposed therebetween;
    The alignment liquid is discharged by capillary action from the scribe line between the semiconductor chips to the upper surface side of the counter substrate through the alignment liquid discharge hole, and is formed on the scribe line between the counter substrate and the substrate. A third step in which air is supplied to a space to form a gas-liquid interface between a peripheral portion of the semiconductor chip and the counter substrate;
    And a fourth step of adjusting the position of the counter substrate with respect to the substrate by the surface tension of the alignment liquid at the gas-liquid interface.
  2. 請求項1に記載の基板処理方法において、
    前記対向基板には、面方向に貫通する空気供給溝が前記スクライブラインに対応する位置に形成され、
    前記アライメント液排出孔は前記空気供給溝に連通して形成されている。
    The substrate processing method according to claim 1,
    In the counter substrate, an air supply groove penetrating in the surface direction is formed at a position corresponding to the scribe line,
    The alignment liquid discharge hole is formed in communication with the air supply groove.
  3. 請求項1に記載の基板処理方法において、
    前記対向基板の上面には、前記アライメント液排出孔に連通するアライメント液排出槽が設けられ、
    前記第3工程において、前記スクライブラインから前記アライメント液排出孔を介して前記アライメント液排出槽に毛細管現象によって前記アライメント液を排出する。
    The substrate processing method according to claim 1,
    An alignment liquid discharge tank communicating with the alignment liquid discharge hole is provided on the upper surface of the counter substrate,
    In the third step, the alignment liquid is discharged from the scribe line to the alignment liquid discharge tank through the alignment liquid discharge hole by capillary action.
  4. 請求項1に記載の基板処理方法において、
    前記第2工程において、保持機構によって前記対向基板を所定の高さに保持して、当該対向基板を基板上に配置し、
    前記第3工程において、前記保持機構による前記対向基板の保持が継続され、
    前記第4工程において、前記保持機構による前記対向基板の保持を解除して、基板に対する前記対向基板の位置調整を行う。
    The substrate processing method according to claim 1,
    In the second step, the counter substrate is held at a predetermined height by a holding mechanism, the counter substrate is disposed on the substrate,
    In the third step, the holding of the counter substrate by the holding mechanism is continued,
    In the fourth step, the holding of the counter substrate by the holding mechanism is released, and the position of the counter substrate with respect to the substrate is adjusted.
  5. 請求項1に記載の基板処理方法において、
    前記対向基板には、厚み方向に貫通する処理液供給孔と、厚み方向に貫通する処理液排出孔とが形成され、
    前記対向基板の上面には、前記処理液供給孔に連通する処理液供給槽と、前記処理液排出孔に連通する処理液排出槽とが設けられ、
    前記第4工程の後、前記処理液供給槽から前記処理液供給孔、前記半導体チップ上、前記処理液排出孔を介して前記処理液排出槽に毛細管現象によって処理液を流通させ、前記半導体チップと前記対向基板との間の前記アライメント液を前記処理液に置換して、当該処理液によって前記半導体チップに所定の処理を行う第5工程を有する。
    The substrate processing method according to claim 1,
    The counter substrate is formed with a processing liquid supply hole penetrating in the thickness direction and a processing liquid discharging hole penetrating in the thickness direction,
    On the upper surface of the counter substrate, a treatment liquid supply tank communicating with the treatment liquid supply hole and a treatment liquid discharge tank communicating with the treatment liquid discharge hole are provided,
    After the fourth step, a processing liquid is circulated by capillary action from the processing liquid supply tank to the processing liquid supply hole, the semiconductor chip, and the processing liquid discharge hole through the processing liquid discharge hole, and the semiconductor chip. And a fifth step of performing predetermined processing on the semiconductor chip with the processing liquid by replacing the alignment liquid between the substrate and the counter substrate with the processing liquid.
  6. 請求項5に記載の基板処理方法において、
    前記対向基板には、厚み方向に貫通する液逃がし孔が形成され、
    前記対向基板の上面には、前記液逃がし孔に連通する液逃がし槽が設けられ、
    前記第5工程において、前記半導体チップ上から前記液逃がし孔を介して前記液逃がし槽に毛細管現象によって前記アライメント液又は前記処理液を排出して、基板に対する前記対向基板の配置を維持する。
    The substrate processing method according to claim 5,
    In the counter substrate, a liquid escape hole penetrating in the thickness direction is formed,
    On the upper surface of the counter substrate, a liquid escape tank communicating with the liquid escape hole is provided,
    In the fifth step, the alignment liquid or the processing liquid is discharged by capillarity from the semiconductor chip through the liquid escape hole to the liquid escape tank to maintain the arrangement of the counter substrate with respect to the substrate.
  7. 請求項1に記載の基板処理方法において、
    前記アライメント液は純水である。
    The substrate processing method according to claim 1,
    The alignment liquid is pure water.
  8. 複数の半導体チップが形成された基板に所定の処理を行うための基板処理治具であって、
    厚み方向に貫通するアライメント液排出孔が形成され、
    前記複数の半導体チップが形成された基板の表面全面にアライメント液が供給され、さらに基板処理治具が前記アライメント液を挟んで基板上に配置された状態で、前記半導体チップ間のスクライブラインから前記アライメント液排出孔を介して基板処理治具の上面側に毛細管現象によって前記アライメント液が排出されると共に、前記基板処理治具と基板との間において前記スクライブライン上に形成される空間に空気が供給されて、前記半導体チップの周縁部と基板処理治具との間に気液界面が形成されるように、前記アライメント液排出孔は形成されている。
    A substrate processing jig for performing predetermined processing on a substrate on which a plurality of semiconductor chips are formed,
    An alignment liquid discharge hole penetrating in the thickness direction is formed,
    The alignment liquid is supplied to the entire surface of the substrate on which the plurality of semiconductor chips are formed, and the substrate processing jig is disposed on the substrate with the alignment liquid interposed therebetween, and the scribe line between the semiconductor chips The alignment liquid is discharged by capillarity to the upper surface side of the substrate processing jig through the alignment liquid discharge hole, and air is formed in the space formed on the scribe line between the substrate processing jig and the substrate. The alignment liquid discharge hole is formed so that a gas-liquid interface is formed between the peripheral edge of the semiconductor chip and the substrate processing jig.
  9. 請求項8に記載の基板処理治具において、
    面方向に貫通する空気供給溝が前記スクライブラインに対応する位置に形成され、
    前記アライメント液排出孔は前記空気供給溝に連通して形成されている。
    The substrate processing jig according to claim 8,
    An air supply groove penetrating in the surface direction is formed at a position corresponding to the scribe line,
    The alignment liquid discharge hole is formed in communication with the air supply groove.
  10. 請求項8に記載の基板処理治具において、
    基板処理治具の上面に設けられ、前記アライメント液排出孔に連通するアライメント液排出槽をさらに有し、
    前記スクライブラインから前記アライメント液排出孔を介して前記アライメント液排出槽に毛細管現象によって前記アライメント液が排出されるように、前記アライメント液排出槽は設けられている。
    The substrate processing jig according to claim 8,
    An alignment liquid discharge tank provided on the upper surface of the substrate processing jig and communicating with the alignment liquid discharge hole;
    The alignment liquid discharge tank is provided so that the alignment liquid is discharged from the scribe line through the alignment liquid discharge hole to the alignment liquid discharge tank by capillary action.
  11. 請求項8に記載の基板処理治具において、
    厚み方向に貫通する処理液供給孔と、
    厚み方向に貫通する処理液排出孔と、
    基板処理治具の上面に設けられ、前記処理液供給孔に連通する処理液供給槽と、
    基板処理治具の上面に設けられ、前記処理液排出孔に連通する処理液排出槽と、をさらに有し、
    前記処理液供給槽、前記処理液供給孔、前記処理液排出孔及び前記処理液排出槽は、前記半導体チップに所定の処理を行う処理液を毛細管現象によって流通させるように設けられている。
    The substrate processing jig according to claim 8,
    A treatment liquid supply hole penetrating in the thickness direction;
    A treatment liquid discharge hole penetrating in the thickness direction;
    A processing liquid supply tank provided on the upper surface of the substrate processing jig and communicating with the processing liquid supply hole;
    A processing liquid discharge tank provided on the upper surface of the substrate processing jig and communicating with the processing liquid discharge hole;
    The treatment liquid supply tank, the treatment liquid supply hole, the treatment liquid discharge hole, and the treatment liquid discharge tank are provided so as to circulate a treatment liquid for performing a predetermined treatment on the semiconductor chip by a capillary phenomenon.
  12. 請求項11に記載の基板処理治具において、
    厚み方向に貫通する液逃がし孔と、
    基板処理治具の上面に設けられ、前記液逃がし孔に連通する液逃がし槽と、をさらに有し、
    前記半導体チップ上から前記液逃がし孔を介して前記液逃がし槽に毛細管現象によって前記アライメント液又は前記処理液が排出されて、基板に対する基板処理治具の配置が維持されるように、前記液逃がし孔と前記液逃がし槽はそれぞれ設けられている。
    The substrate processing jig according to claim 11, wherein
    A liquid escape hole penetrating in the thickness direction;
    A liquid escape tank provided on the upper surface of the substrate processing jig and communicating with the liquid escape hole;
    The liquid escape so that the alignment liquid or the processing liquid is discharged by capillary action from the semiconductor chip to the liquid escape tank through the liquid escape hole, and the arrangement of the substrate processing jig with respect to the substrate is maintained. The hole and the liquid escape tank are respectively provided.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111916357A (en) * 2020-06-24 2020-11-10 江苏长电科技股份有限公司 Process method for filling TSV (through silicon via) by utilizing capillary effect

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* Cited by examiner, † Cited by third party
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CN111613529B (en) * 2020-05-27 2023-05-23 华天慧创科技(西安)有限公司 Wafer packaging technology

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008280558A (en) * 2007-05-08 2008-11-20 Hiroshima Industrial Promotion Organization Local surface treatment method using liquid
JP2013108111A (en) * 2011-11-18 2013-06-06 Tokyo Electron Ltd Method for treating substrate and template

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008280558A (en) * 2007-05-08 2008-11-20 Hiroshima Industrial Promotion Organization Local surface treatment method using liquid
JP2013108111A (en) * 2011-11-18 2013-06-06 Tokyo Electron Ltd Method for treating substrate and template

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111916357A (en) * 2020-06-24 2020-11-10 江苏长电科技股份有限公司 Process method for filling TSV (through silicon via) by utilizing capillary effect

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