JP2007071561A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To remove melting components from a mold material to a plating solution in a dip plating method of probe sheets etc. <P>SOLUTION: When contact terminals to be formed in a probe sheet is formed by dip plating, plating is performed as removing volatile impurities and nonvolatile impurities which melt out from a mold material to a plating solution, from the plating solution. Volatile impurities are, for example, removed by setting both the probe sheet and the mold material in a wafer holder 155 and heating the plating solution 163 of a liquid-reservoir temperature-controlled tank 164 without a lid. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technique for manufacturing a semiconductor device. In particular, when a contact terminal of a thin film probe sheet is immersed in a plating solution, the film thickness is made uniform by removing components eluted from the resist into the plating solution. It is an effective technology when applied to.

  The technology described below has been studied by the present inventors in researching and completing the present invention, and the outline thereof is as follows.

  In the manufacturing process of a semiconductor device, a wafer inspection is performed in which a semiconductor integrated circuit and electrodes are formed on a wafer, and a conduction state and an electrical signal state of a semiconductor element are grasped. This inspection is performed while contacting a plurality of electrodes formed on the wafer with contact terminals formed on the probe sheet of the probe card and grasping the state with a tester. Such contact terminals are formed by plating by immersing a probe sheet in a plating solution using a silicon wafer as a mold material.

  Patent Document 1 describes a technique for reusing and using a plating solution. That is, when metal thin films are plated on electrical components such as circuit boards and semiconductor wafers, organic substances such as wetting agents, brighteners, organic acids and complexing agents contained in the plating solution deteriorate or decompose, resulting in plating efficiency. It becomes an organic pollutant that adversely affects the plating rate, film form, and the like. Therefore, a configuration is described in which such organic pollutants are oxidized and removed by an oxidizing agent. In this oxidation step, it is also described that heating or the like is used in combination. Furthermore, Patent Document 1 also describes removal of inorganic impurities such as iron, sodium, and potassium, and non-copper metal ion impurities.

Patent Document 2 describes that copper plating of a wafer is performed in a cell filled with a plating substance containing both an inorganic additive and an organic additive. In such a plating process, an organic additive or the like is described. Techniques for removing the by-products are disclosed.
Special table 2003-535223 gazette JP 2002-206200 A

  However, the present inventors have found that the conventional plating techniques have the following problems.

  That is, Patent Documents 1 and 2 aim to remove organic substances such as additives originally contained in the plating solution, but the present inventor is a step of forming contact terminals on the thin film probe sheet by a dip method. Thus, the present inventors have found that when a silicon wafer used as a mold material is immersed, organic substances brought from the photoresist formed on the silicon wafer adversely affect the plating.

  In the thin-film probe card, a (100) -plane silicon wafer is anisotropically etched to form a quadrangular pyramid hole, and the contact terminal is formed by plating using the hole as a mold and a resist as a mask. As the plating film for forming such contact terminals, for example, a two-layer structure of Rh / Ni and a three-layer structure of Ni / Rh / Ni are employed.

  The plating process is performed by forming a conductive film for plating power supply on the contact terminal forming surface of the silicon wafer of the mold material, setting the conductive film on the wafer holder, and inserting it into the plating tank. The wafer is connected to a cathode electrode and an anode electrode installed in the processing tank, and plating is performed by a dip method in which a current is applied.

  In this dip method, when the plating process for forming the contact terminals of the thin film probe card is repeated, the resist on the wafer surface is eluted, and the organic components of the eluted resist are combined with Rh ions necessary for plating, It was found to reduce the supply. The reduction in the supply amount of Rh ions is particularly likely to occur at the contact tip forming portion where contact with the plating solution is unlikely to occur.

  Since the supply of Rh ions becomes insufficient at the needle tip forming portion, it has been found that the plating film is inevitably thin at the needle tip portion of the contact terminal. When the plating film becomes thin, the life of the thin film probe card is reduced as compared with the target film thickness.

  The Rh plating film is characterized by high hardness, but if the organic solvent and resin components in the resist are eluted in the plating solution, the stress of the plating film becomes higher and the plating film cracks and peels off (floats). Etc. also occur. Since the plating film becomes thin at the needle tip portion, cracks are apt to easily occur in the vicinity of the boundary with the thick portion other than the needle tip portion.

  Further, regarding the potential, the potential concentrates on the flat portion, but the potential decreases in the hole. Such a phenomenon becomes prominent each time the processing is repeated, and causes a variation between thin film probe card products.

  An object of the present invention is to remove an elution component from a mold material into a plating solution in a dipping method.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

That is, the method for manufacturing a semiconductor device according to the present invention includes the following steps.
(A) A semiconductor wafer partitioned into a plurality of chip regions, each having a semiconductor integrated circuit formed in each of the plurality of chip regions, and a plurality of electrodes electrically connected to the semiconductor integrated circuit formed on a main surface Preparing the process,
(B) Volatility from the resist that elutes into the plating solution when the contact terminals that are in electrical contact with the plurality of electrodes are formed by immersing a silicon wafer as a mold material of the contact terminals in the plating solution. A step of preparing a probe card having a probe sheet formed while removing impurities by volatilization of the plating solution, a fixing jig for fixing the probe sheet, and a pressing mechanism for pressing the probe sheet to the electrode side ,
(C) A step of performing electrical inspection of the semiconductor integrated circuit by bringing the plurality of contact terminals into contact with the plurality of electrodes.

The method for manufacturing a semiconductor device according to the present invention includes the following steps.
(A) A semiconductor wafer partitioned into a plurality of chip regions, each having a semiconductor integrated circuit formed in each of the plurality of chip regions, and a plurality of electrodes electrically connected to the semiconductor integrated circuit formed on a main surface Preparing the process,
(B) Non-volatile from the resist that elutes into the plating solution when the contact terminals that are in electrical contact with the plurality of electrodes are formed by immersing a silicon wafer as a mold material of the contact terminals in the plating solution. Preparing a probe card having a probe sheet formed by adsorbing and removing the impurity component, a fixing jig for fixing the probe sheet, and a pressing mechanism for pressing the probe sheet toward the electrode;
(C) A step of performing electrical inspection of the semiconductor integrated circuit by bringing the plurality of contact terminals into contact with the plurality of electrodes.

  In the above configuration of the present invention, in the step of preparing the probe card of (b), when the probe card is formed by immersing a silicon wafer as a mold material of the contact terminal in the plating solution, The volatile impurity components eluted from the resist may be removed by volatile evaporation of the plating solution, and the non-volatile impurity components eluted from the resist into the plating solution by adsorption. Absent.

  In the step of preparing the probe card of (b), the volatile impurity component from the resist eluted in the plating solution when the silicon wafer as the contact terminal mold material is immersed in the plating solution is formed. The plating solution may be volatilized by at least one of heating and vacuum exhaust. In the step (b) of preparing the probe card, the nonvolatile impurity component from the resist eluted in the plating solution may be adsorbed and removed by at least one of activated carbon and ion exchange resin.

  The other outlines disclosed in the present application will be briefly described as follows.

  The contact terminal formed on the probe sheet of the probe card has a uniform film thickness up to the protrusion of the contact terminal. In such a configuration, the Rh plating film and the Ni plating film are uniformly formed.

  A plating method or a plating apparatus for plating a contact terminal of a probe sheet, which is provided with a liquid storage temperature control tank that can be evaporated without a lid or exhausted under reduced pressure so that the plating solution can be evaporated. The liquid storage temperature control tank is provided with an adsorption removal device using activated carbon or ion exchange resin.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  When forming the probe sheet by the dip method, the volatile impurities eluted from the resist in the plating solution can be removed by evaporating and evaporating the plating solution by heating or evacuating the vacuum. The adverse effect on the plating formation can be eliminated.

  When forming the probe sheet by the dip method, the non-volatile impurities eluted from the resist in the plating solution can be removed by adsorption with the activated carbon or ion exchange resin. Negative effects on formation can be eliminated.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof may be omitted.

  In addition, before describing the present invention in detail, the meaning of terms in the present application will be described as follows.

A wafer is a single crystal silicon substrate (generally a generally planar circular shape) used in the manufacture of integrated circuits,
An SOI (Silicon On Insulator) substrate, a sapphire substrate, a glass substrate, other insulating, anti-insulating, or semiconductor substrates, and a composite substrate thereof. In addition, in this application, the term “semiconductor integrated circuit device” refers to not only those manufactured on a semiconductor or insulator substrate such as a silicon wafer or a sapphire substrate, but also TFT (Thin) unless otherwise specified.
Film transistors) and STN (Super-Twisted-Nematic) liquid crystal and the like made on other insulating substrates such as glass are also included.

The device surface is a main surface of a wafer on which a device pattern corresponding to a plurality of chip regions is formed by lithography.

Contact terminals are the same as those used in the manufacture of semiconductor integrated circuits for silicon wafers. Wiring is performed by a patterning method that combines photolithography, CVD (Chemical Vapor Deposition), sputtering, and etching. A layer and a tip electrically connected thereto are integrally formed.

  The thin film probe (membrane probe) and the thin film probe card are provided with the contact terminal (protruding needle) that comes into contact with the object to be inspected and a wiring drawn from the contact terminal, and an electrode for external contact is formed on the wiring. A thin film, for example, a thickness of about 10 μm to 100 μm.

The probe card refers to a structure having contact terminals that contact a wafer to be inspected, a multilayer wiring board, and the like, and the semiconductor inspection apparatus refers to an inspection apparatus having a sample support system on which the probe card and the wafer to be inspected are placed. Say.

The probe inspection is an electrical test performed with a prober on a wafer for which a wafer process has been completed. The semiconductor integrated circuit is configured by applying the tip of the contact terminal to an electrode formed on the main surface of the chip region. In other words, a non-defective product / defective product is discriminated by performing a function test for confirming whether or not the device operates in accordance with a predetermined function and a DC operation characteristic and an AC operation characteristic test. This is distinguished from a screening test (final test) that is performed after dividing into chips (or after packaging is completed).

  Regardless of its form, the semiconductor device may be in the form of a wafer on which a circuit is formed, a semiconductor element, or a package after that.

In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. There are some or all of the modifications, details, supplementary explanations, and the like.

Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say.

Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numerical values and ranges.

(Embodiment 1)
FIG. 1A is a cross-sectional view showing an embodiment of the configuration of a probe card according to the present invention, and FIG. 1B is an exploded perspective view showing an exploded main part thereof.

  In the probe card 100 according to the present embodiment, as shown in FIG. 1A, a support member (upper fixing plate) 10 and an intermediate plate 20 screwed to the support member 10 are provided. A push piece 40 that is fixed to the center of the intermediate plate 20 so as to be adjustable in the height direction, has a protrusion 30a at the lower end, serves as a center pivot, and is movable with the end of the protrusion 30a as a fulcrum. Is provided. A spring probe 30 loaded with a spring 30b for applying a pressing force is provided on the probe sheet 100a via the pushing piece 40.

  A frame 50 bonded and fixed to the back surface is provided so as to surround an area where the plurality of contact terminals 110 of the probe sheet 100a are formed. The intermediate plate 20 screwed to the frame 50 is provided, and the cushioning material 51 such as a silicon sheet and the push piece 40 are provided in the center between the back surface of the region where the contact terminal 110 of the probe sheet 100a is formed. It has been.

  Further, the support member 10 corresponds to the surface of the contact terminal 110 formed on the probe sheet 100a of the probe card 100 and the semiconductor device to be measured by a parallel adjustment screw 52 provided on the support member 10. Paralleling with the electrode surface is performed.

  A plurality of pressing pieces 40 are pressed by the spring probe 30 with a desired substantially constant pressing force against the pushing piece 40 held by the protrusion 30a at the tip of the spring probe 30 installed at the center of the intermediate plate 20 so as to be slightly tiltable. A compliance mechanism having a structure that applies a substantially constant pressing force to the region where the contact terminals 110 are formed is provided. A conical groove 31 that engages with the protrusion 30 a is formed at the center of the upper surface of the push piece 40.

  In the probe sheet 100a, a plurality of contact terminals 110 for making contact with the electrodes of the semiconductor device are formed in the center area of the sheet. The metal film 60a is surrounded around the contact terminals 110 so as to be doubled. A metal film 60 b is formed in a region corresponding to the frame 50.

  Further, as shown in FIG. 1B, a plurality of peripheral electrodes 80 for exchanging signals with the multilayer wiring board 70 are formed in the peripheral portions of the four sides of the probe sheet 100a. A metal film 60 c is formed in a region corresponding to the peripheral electrode fixing plate 81 so as to surround the peripheral electrode 80. Between the contact terminal 110 and the peripheral electrode 80, a probe sheet 100a having a large number of lead wires 82 is formed.

  In this way, the frame 50 is bonded and fixed to the back surface of the probe sheet 100a in the region where the contact terminals 110 are formed, and the peripheral electrode is formed on the back surface of the portion where the peripheral electrode 80 of the probe sheet 100a for signal transmission / reception is formed. A fixed plate 81 is fixed by adhesion.

  The peripheral electrode fixing plate 81 is fixed to the lower pressing plate 90 with screws. The peripheral electrode 80 is fixed to the lower electrode plate 90 by screwing the peripheral electrode plate 84 to the lower electrode plate 90 with the buffer material 83 sandwiched between the peripheral electrode fixing plate 81 fixed so as to surround the peripheral electrode 80 on the probe sheet 100a. A connection is made by pressing against the electrode 71 of the substrate 70.

  On the other hand, in the probe card 100 used for the probe inspection of the semiconductor device having such a configuration, as shown in FIG. 2A, a probe sheet 100a is configured. That is, as shown in FIG. 2A, a thin probe sheet 100a has contact terminals (also referred to as probes or contactors) 110 formed on an insulating film 120 such as polyimide 120a. The contact terminal 110 includes, for example, a high-hardness plating film 111 made of Rh plating film 111a and the like, and a plating film 112 such as Ni plating film 112a. In addition, in the structure shown to Fig.2 (a), a part of probe sheet 100a is shown.

  A part of the contact terminal 110 is formed on the protrusion 110 a and is connected to the wiring metal 130 through the through hole 140. FIG. 2B shows a state where the contact terminal 110 is viewed from the side of the protrusion 110a provided with the Rh plating film 111a. The contact terminals 110 having such a configuration are formed by the number of electrodes of the semiconductor device.

  To form the contact terminal 110 having such a configuration, first, as shown in FIG. 3A, the silicon wafer 150 is anisotropically etched to form a square pyramid hole 151 as shown in FIG. 3B. . In addition, a photoresist 152 is formed. The contact terminal 110 is formed by plating using the hole 151 as a mold material and the photoresist 152 as a mask.

  For plating, an oxide film 153 and a conductive film 154 for plating power feeding are formed on the contact terminal forming surface of the silicon wafer 150 as shown in FIG. 3A, and set on the wafer holder 155 shown in FIG. Then, it is inserted into the plating tank 160. The silicon wafer 150 is set on the wafer holder 155 and connected to the cathode electrode (−) 161 side, and an electric current is applied between the silicon wafer 150 and the anode electrode 162 (+) in the plating bath 160 to form a plating by a dip method.

  With this dipping method, as shown in FIG. 3C, the Rh plating film 111 a and the Ni plating film 112 a are formed as the contact terminals 110. FIG. 3D shows a state in which the holes 151 of the quadrangular pyramid are plated.

  Adjacent to the plating treatment tank 160, as shown in FIG. 4B, a storage liquid temperature adjustment tank 164 for adjusting the temperature of the plating solution 163 is provided. The liquid storage temperature adjustment tank 164 is provided with a heater 165 so that the temperature of the plating solution 163 can be adjusted freely. The plating solution 163 adjusted in temperature by the liquid storage temperature adjustment tank 164 passes through the circulation filter 166 and is circulated and supplied to the plating treatment tank 160 by the circulation pump 167. Further, the overflowed plating solution 163 is returned from the plating treatment tank 160 to the liquid storage temperature control tank 164 and circulated.

  With such a configuration, the temperature of the plating solution 163 in the liquid storage temperature control tank 164 is maintained at a temperature at which volatile impurities dissolved from the photoresist 152 are easily volatilized, for example, a high temperature of 55 ° C. or more, and the plating solution is easily volatilized. As described above, the plating process is performed with the upper portion of the liquid storage temperature control tank 164 opened.

  Further, in this configuration, water that is the solvent of the plating solution 163 is also volatilized, and the concentration of the plating solution 163 is changed. Therefore, for example, a plating solution level control sensor 168 is provided, and water of the solvent is supplied from the nozzle 169 as needed, and the concentration of the plating solution 163 is kept constant by keeping the solution level constant. .

  In this manner, organic substances as volatile impurities from the photoresist 152 which is a mask for forming the contact terminal 110 can be volatilized and effectively removed by heating the plating solution 163 at a high temperature. As a volatile impurity of the photoresist 152, for example, propylene glycol monomethyl ether acetate (PEGMEA) contained in 60 to 70% can be cited as an example.

  Therefore, it is possible to prevent such volatile impurities from accumulating in the plating solution 163 and gradually being combined with Rh ions, so that the replacement of the plating solution 163 in the hole 151 is difficult to occur. Therefore, when the Rh plating film 111a is formed by this plating method, the film thickness of the protrusion 110a portion is not reduced, and a uniform film thickness can be formed. Therefore, the life of the contact terminal 110 can be extended. That is, in the thin film probe card product, the thickness of the protrusion 110a used as the probe can be increased to the limit while preventing the cracking of the contact terminal 110, so that the lifetime can be extended.

  In addition, since volatile impurities do not accumulate in the plating solution 163, deterioration of the plating film can be suppressed by mixing volatile impurities into the plating film. As a result, cracking and peeling of the plating film can be prevented.

  Up to now, as shown in FIG. 5, lids 171 and 172 were provided above the plating treatment tank 160 side and the liquid storage temperature adjustment tank 164 side adjacent thereto, and were operated with the lids on. . Therefore, the volatile impurities eluted from the photoresist 152 in the plating solution 163 were not removed.

  Therefore, as shown in FIG. 6 (a), the eluted organic substance of volatile impurities and Rh ions are combined, and particularly in the hole at the tip of the contact terminal 110 of the mold material, new supply of Rh ions is reduced. The plating film 111a was thinly formed. As for the potential, as shown in FIG. 6B, the potential at the flat portion is concentrated, and the potential at the hole portion is lowered. Therefore, film thickness uniformity, cracks, peeling, and the like of the Rh plating film 111a occurred.

  However, in the present invention, as shown in FIG. 7A, for example, the occurrence of cracks in the probe can be prevented with a simple configuration. FIG. 7B shows the state of cracks that have occurred in the conventional method.

  Using the contact terminals 110 formed in this way, a probe inspection of the semiconductor device is performed. The probe sheet 100a on which the contact terminals 110 are formed is inspected by holding the probe sheet 100a and pressing the contact terminals 110 against the electrode side of the semiconductor device with an appropriate force. That is, in the probe card 100, the load of the spring probe 30 on the back side of the probe sheet 100a is applied to the contact terminal 110 as a whole, and contacts the electrode of the semiconductor device to be measured. An inspection electrical signal is transmitted to and received from a tester of the semiconductor device via the contact terminal 110, the lead wire 82, the peripheral electrode 80, the electrode 71 of the multilayer wiring board 70, and the like, and the inspection is performed. .

  Examples of the semiconductor device 200 to be inspected include a chip on which an LCD (Liquid Crystal Display) driver 200a is formed. A probe test (electrical test) is performed on the semiconductor device 200 using the probe card 100.

  FIG. 8 illustrates a plane of the chip (chip region) 210 and an enlarged part thereof. The chip 210 is made of, for example, a single crystal silicon substrate, and an LCD driver circuit is formed on the main surface thereof.

  In addition, a large number of pads (first electrodes) 211 and 212 that are electrically connected to the LCD driver circuit are disposed on the periphery of the main surface of the chip 210. The pads 211 arranged along the long side and both short sides on the right side of the chip 210 in FIG. 8 are output terminals, and the pads 212 arranged along the long side on the left side of the chip 210 in FIG. 8 are input terminals. ing.

  Since the number of output terminals of the LCD driver 200a is larger than the number of input terminals, the pads 211 are arranged in two rows along the long side and both short sides of the chip 210 in order to widen the interval between the adjacent pads 211 as much as possible. The pads 211 are arranged in a staggered manner along the long side and both short sides of the chip 210.

  The pads 211 and 212 are bump electrodes formed of, for example, Au (gold), and are formed on the input / output terminals (bonding pads) of the chip 210 by a method such as electrolytic plating, electroless plating, vapor deposition, or sputtering. Is.

  In the chip 210, an LCD driver circuit (semiconductor integrated circuit) and input / output terminals (bonding pads) are formed in a large number of chip areas defined on the main surface of the wafer by using a semiconductor manufacturing technique. After the pads 211 are formed by the above method, the wafer can be diced to divide the chip region into pieces.

  In such a configuration, the probe inspection is performed on each chip area before dicing the wafer.

  The LCD driver 200 a having such a configuration is connected to the liquid crystal panel 213 of the chip 210. As shown in FIG. 9, the liquid crystal panel 213 is disposed so as to face the glass substrate 216 through the glass substrate 216, the liquid crystal layer 217, and the liquid crystal layer 217 with the pixel electrodes 214 and 215 formed on the main surface, for example. The glass substrate 218 and the like are formed. The chip 210 is face-down bonded so that the pads 211 and 212 are connected to the pixel electrodes 214 and 215 of the glass substrate 216 of the liquid crystal panel 213, respectively, and the chip 210 is connected to the liquid crystal panel 213.

(Embodiment 2)
In the present embodiment, lids 171 and 172 are provided on the plating treatment tank 160 and the liquid storage temperature adjustment tank 164 side in the same manner as in the previous configuration. However, as shown in FIG. 10, the lid 172 provided above the storage temperature control tank 164 is provided with a decompression exhaust port 173 connected to a decompression exhaust pump or the like.

  Therefore, even when it is expected that the organic component of volatile impurities eluting from the photoresist 152 will increase in a continuous process or when the temperature of the solution is not suitable due to the nature of the plating solution 163, the plating solution 163 is used. Volatile impurities from the photoresist 152 eluted therein can be efficiently volatilized and removed.

  In addition, by using this configuration in combination with the first embodiment, it is possible to further improve the efficiency of volatile impurity volatilization removal.

(Embodiment 3)
In this embodiment, as shown in FIG. 11, a circulation system 180 that performs an adsorption removal process of impurities using activated carbon, ion exchange resin, or the like is provided in the liquid storage temperature adjustment tank 164 described in the first embodiment. It has been. Such impurities are non-volatile impurities, unlike volatile impurities.

  The plating solution 163 in the liquid storage temperature control tank 164 is passed through the circulation system 180 including the impurity adsorption removal filter 182 and the foreign matter removal filter 183 by the filter pump 181 at a constant or arbitrarily set timing to remove impurities. . In parallel with the removal of the impurities, the heating temperature is adjusted to remove the volatile impurities.

  The portion that performs the adsorption removal process of impurities is processed into a filter shape so as to prevent the diffusion of foreign substances and the like and can be easily installed in the circulation system 180, and a granular or fibrous impurity adsorption removal filter 182 is used. Further, the plating solution 163 that has passed through the foreign matter removal filter 183 returns to the storage temperature control tank 164.

  In such a configuration, resin-based organic components with low volatility and other unnecessary impurity components can be always removed by selecting various activated carbons and ion exchange resins. Moreover, in the installation method of the activated carbon treatment system of the present embodiment, it is possible to perform the treatment without affecting the flow rate of the circulation system to the plating treatment tank 160 that affects the plating performance.

  Examples of nonvolatile impurities from the photoresist 152 include novolak resins and photosensitizers.

(Embodiment 4)
In the present embodiment, as shown in FIG. 12, the configuration of the circulation system 180 that performs the activated carbon treatment of the above-described embodiment is provided between the plating treatment tank 160 and the liquid storage temperature adjustment tank 164. In such a configuration, the plating treatment can always be performed with the plating solution 163 that has passed through the activated carbon treatment system. In addition, the plating process is not affected by nonvolatile impurities. Further, since the circulation system is also shared with the treatment liquid circulation system, the cost of the apparatus can be reduced.

(Embodiment 5)
In the configuration of the present embodiment, as shown in FIG. 13, an impurity adsorption / removal substance 185 is provided below the storage temperature adjustment tank 164 of the plating solution 163 via the filter film 184. As the adsorption removing substance 185, for example, activated carbon or ion exchange resin is used. The plating solution 163 is separated and filtered through the filter film 184 installed on the bottom surface side, and supplied to the plating treatment tank 160.

  In such a configuration, a stirrer 186 may be provided in the portion of the liquid storage temperature adjustment tank 164 into which the impurity adsorption removing substance 185 is charged in order to increase the removal efficiency. If comprised in this way, the adsorption removal substance 185 of impurities, such as activated carbon and an ion exchange resin, can be thrown into a circulation system in large quantities, and even when unnecessary impurities increase in large quantities by continuous construction etc., it was commensurate with it. Removal ability can be obtained.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  In the above embodiment, the LCD driver is described as an example of the inspection target by the probe card, but it goes without saying that the inspection target may be other than the LCD driver.

  The present invention can be effectively used in the plating process in the manufacturing field of the semiconductor device of the present invention.

(A) is sectional drawing which showed typically the whole structure of the probe card of this invention, (b) is the perspective view which decomposed | disassembled and showed typically the structure of the main part. (A) is sectional drawing which showed a part of probe sheet typically, (b) is the perspective view which showed typically the structure of the projection part. (A), (c) is sectional drawing which showed typically a part of manufacturing process of a probe sheet | seat, (b), (d) is a top view which shows the mode of a hole. (A) is a top view which shows the mode of a wafer holder, (b) is sectional drawing which showed typically the structure of one Example of the plating apparatus of this Embodiment. It is sectional drawing which shows the structure of the conventional plating apparatus typically. (A) is explanatory drawing which shows the influence of the organic substance in a hole part, (b) is explanatory drawing which shows the imbalance of the electric potential in a hole part and a flat part. (A) is a top view which shows a normal probe, (b) is a top view which shows the condition of the abnormal probe in which the crack generate | occur | produced. It is a top view which shows a LCD driver typically. It is sectional drawing which shows typically the connection condition to the liquid crystal side of a LCD driver. It is sectional drawing which shows typically the modification of the apparatus which performs the plating process of this invention. It is sectional drawing which shows typically the modification of the apparatus which performs the plating process of this invention. It is sectional drawing which shows typically the modification of the apparatus which performs the plating process of this invention. It is sectional drawing which shows typically the modification of the apparatus which performs the plating process of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Support member 20 Intermediate | middle board 30 Spring probe 30a Protrusion part 30b Spring 31 Conical groove 40 Pushing piece 50 Frame 51 Buffer material 52 Parallel adjustment screw 60a Metal film 60b Metal film 60c Metal film 70 Multilayer wiring board 71 Electrode 80 Peripheral electrode 81 Periphery Electrode fixing plate 82 Lead wire 83 Buffer material 84 Peripheral pressing plate 90 Lower pressing plate 100 Probe card 100a Probe sheet 110 Contact terminal (probe)
110a Protrusion 111 High hardness plating film 111a Rh plating film 112 Plating film 112a Ni plating film 120 Insulating film 120a Polyimide 130 Metal for wiring 140 Through hole 150 Silicon wafer 151 Hole 152 Photoresist 153 Oxide film 154 Plating power supply conductive film 155 Wafer holder 160 Plating Treatment Tank 161 Cathode Electrode 162 Anode Electrode 163 Plating Solution 164 Storage Temperature Control Tank 165 Heater 166 Circulating Filter 167 Circulating Pump 168 Liquid Level Control Sensor 169 Nozzle 171 Lid 172 Lid 173 Depressurization Exhaust Port 180 Circulating System 181 Filter Pump 182 Impurity Adsorption removal filter 183 Foreign matter removal filter 184 Filter film 185 Adsorption removal substance 186 Stirrer 200 Semiconductor device 200a LCD driver 10 chip 211 pads 212 pads 213 liquid crystal panel 214 pixel electrode 215 pixel electrode 216 a glass substrate

Claims (5)

A semiconductor device manufacturing method including the following steps:
(A) A semiconductor wafer partitioned into a plurality of chip regions, each having a semiconductor integrated circuit formed in each of the plurality of chip regions, and a plurality of electrodes electrically connected to the semiconductor integrated circuit formed on a main surface Preparing the process,
(B) Volatility from the resist that elutes into the plating solution when the contact terminals that are in electrical contact with the plurality of electrodes are formed by immersing a silicon wafer as a mold material of the contact terminals in the plating solution. Preparing a probe card having a probe sheet formed while removing impurities by volatilization of the plating solution, and a pressing mechanism that holds the probe sheet and presses the probe sheet toward the electrode;
(C) A step of performing electrical inspection of the semiconductor integrated circuit by bringing the plurality of contact terminals into contact with the plurality of electrodes. A semiconductor device manufacturing method including the following steps:
(A) A semiconductor wafer partitioned into a plurality of chip regions, each having a semiconductor integrated circuit formed in each of the plurality of chip regions, and a plurality of electrodes electrically connected to the semiconductor integrated circuit formed on a main surface Preparing the process,
(B) Non-volatile from the resist that elutes into the plating solution when the contact terminals that are in electrical contact with the plurality of electrodes are formed by immersing a silicon wafer as a mold material of the contact terminals in the plating solution. Preparing a probe card having a probe sheet formed by adsorbing and removing the impurity component and a pressing mechanism for holding the probe sheet and pressing the probe sheet toward the electrode;
(C) A step of performing electrical inspection of the semiconductor integrated circuit by bringing the plurality of contact terminals into contact with the plurality of electrodes. A semiconductor device manufacturing method including the following steps:
(A) A semiconductor wafer partitioned into a plurality of chip regions, each having a semiconductor integrated circuit formed in each of the plurality of chip regions, and a plurality of electrodes electrically connected to the semiconductor integrated circuit formed on a main surface Preparing the process,
(B) Volatility from the resist that elutes into the plating solution when the contact terminals that are in electrical contact with the plurality of electrodes are formed by immersing a silicon wafer as a mold material of the contact terminals in the plating solution. The probe component formed by removing the impurity component of the plating solution by volatilization and removing the non-volatile impurity component eluted from the resist by the adsorption by adsorption, and holding the probe sheet and the probe Preparing a probe card having a pressing mechanism for pressing the sheet to the electrode side;
(C) A step of performing electrical inspection of the semiconductor integrated circuit by bringing the plurality of contact terminals into contact with the plurality of electrodes. A semiconductor device manufacturing method including the following steps:
(A) A semiconductor wafer partitioned into a plurality of chip regions, each having a semiconductor integrated circuit formed in each of the plurality of chip regions, and a plurality of electrodes electrically connected to the semiconductor integrated circuit formed on a main surface Preparing the process,
(B) Volatility from the resist that elutes into the plating solution when the contact terminals that are in electrical contact with the plurality of electrodes are formed by immersing a silicon wafer as a mold material of the contact terminals in the plating solution. A probe sheet formed while heating the plating solution and evaporating and evaporating the impurity component by at least one of reduced-pressure exhaust, and a pressing mechanism for holding the probe sheet and pressing the probe sheet toward the electrode side The process of preparing a card,
(C) A step of performing electrical inspection of the semiconductor integrated circuit by bringing the plurality of contact terminals into contact with the plurality of electrodes. A semiconductor device manufacturing method including the following steps:
(A) A semiconductor wafer partitioned into a plurality of chip regions, each having a semiconductor integrated circuit formed in each of the plurality of chip regions, and a plurality of electrodes electrically connected to the semiconductor integrated circuit formed on a main surface Preparing the process,
(B) Non-volatile from the resist that elutes into the plating solution when the contact terminals that are in electrical contact with the plurality of electrodes are formed by immersing a silicon wafer as a mold material of the contact terminals in the plating solution. A probe card having a probe sheet formed by adsorbing and removing the impurity component of at least one of activated carbon and ion exchange resin, and a pressing mechanism for holding the probe sheet and pressing the probe sheet toward the electrode side The process to prepare,
(C) A step of performing electrical inspection of the semiconductor integrated circuit by bringing the plurality of contact terminals into contact with the plurality of electrodes.

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