WO2006011426A1 - Receiving device, receiving program and recording medium with receiving program recorded therein - Google Patents

Receiving device, receiving program and recording medium with receiving program recorded therein Download PDF

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Publication number
WO2006011426A1
WO2006011426A1 PCT/JP2005/013494 JP2005013494W WO2006011426A1 WO 2006011426 A1 WO2006011426 A1 WO 2006011426A1 JP 2005013494 W JP2005013494 W JP 2005013494W WO 2006011426 A1 WO2006011426 A1 WO 2006011426A1
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WO
WIPO (PCT)
Prior art keywords
data
amount
speed
predetermined
buffer
Prior art date
Application number
PCT/JP2005/013494
Other languages
French (fr)
Japanese (ja)
Inventor
Makoto Adachi
Original Assignee
Sharp Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Kabushiki Kaisha filed Critical Sharp Kabushiki Kaisha
Publication of WO2006011426A1 publication Critical patent/WO2006011426A1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/16Analogue secrecy systems; Analogue subscription systems
    • H04N7/162Authorising the user terminal, e.g. by paying; Registering the use of a subscription channel, e.g. billing
    • H04N7/163Authorising the user terminal, e.g. by paying; Registering the use of a subscription channel, e.g. billing by receiver means only
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/234Processing of video elementary streams, e.g. splicing of video streams or manipulating encoded video stream scene graphs
    • H04N21/23406Processing of video elementary streams, e.g. splicing of video streams or manipulating encoded video stream scene graphs involving management of server-side video buffer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/433Content storage operation, e.g. storage operation in response to a pause request, caching operations
    • H04N21/4331Caching operations, e.g. of an advertisement for later insertion during playback
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/44Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs
    • H04N21/44004Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving video buffer management, e.g. video decoder buffer or video display buffer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/442Monitoring of processes or resources, e.g. detecting the failure of a recording device, monitoring the downstream bandwidth, the number of times a movie has been viewed, the storage space available from the internal hard disk
    • H04N21/44209Monitoring of downstream path of the transmission network originating from a server, e.g. bandwidth variations of a wireless network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/60Network structure or processes for video distribution between server and client or between remote clients; Control signalling between clients, server and network components; Transmission of management data between server and client, e.g. sending from server to client commands for recording incoming content stream; Communication details between server and client 
    • H04N21/63Control signaling related to video distribution between client, server and network components; Network processes for video distribution between server and clients or between remote clients, e.g. transmitting basic layer and enhancement layers over different transmission paths, setting up a peer-to-peer communication via Internet between remote STB's; Communication protocols; Addressing
    • H04N21/637Control signals issued by the client directed to the server or network components
    • H04N21/6373Control signals issued by the client directed to the server or network components for rate control, e.g. request to the server to modify its transmission rate

Definitions

  • the present invention relates to a receiving device, a receiving program, and a recording medium recording the receiving program, and in particular, a receiving device, a receiving program, and a receiving device that receive data transmitted from a transmitting device via a communication network.
  • the present invention relates to a recording medium on which a program is recorded.
  • a synchronization signal called a PCR signal is transmitted from a transmission device 51 to a reception device 52 together with data. Send.
  • the decoder in the receiving device 52 uses a clock synchronization circuit called a PLL circuit based on the value included in the PCR signal and the information about the time when the PCR signal is input. To reproduce. As a result, the clock difference between the transmitting device 51 and the receiving device 52 is eliminated.
  • the synchronization method using the PLL circuit is effective when the delay variation (jitter) in the network is small, and is not effective in a network with a large jitter such as an IP data communication network.
  • a method called the adaptive clock method is generally used.
  • the receiving side clock (generally a decoder).
  • the clock is input to the decoder in synchronization with a clock different from the internal clock.
  • the decoder is synchronized with time information for driving the reception buffer of the reception device 53.
  • the transmission device 51 transmits the data and the reception device 53 This is different from the speed at which the data is output to the decoder.
  • the data in the receive buffer increases or decreases over the long term, but the data accumulated in the buffer is monitored and the data output speed is increased when the accumulated data amount exceeds the upper limit.
  • FIG. 19 is a time chart illustrating a change in the buffer amount of the reception buffer.
  • the buffer capacity of the receive buffer increases at a constant rate.
  • the buffer amount decreases. If this is left as it is, an underrun will occur, so the data output speed will be slower than the input speed in response to the amount of nother reaching the lower limit to avoid underrun. If the data output speed is slower than the input speed, the buffer amount increases. If this is left unattended, an overrun occurs, so the output speed of the data is made faster than the input speed in response to the amount of nother reaching the upper limit to avoid overrun. In this way, overruns and underruns are avoided.
  • Patent Document 1 Japanese Patent Laid-Open No. 2002-165148
  • the buffer amount decrease due to the clock shift is very small compared to the buffer fluctuation due to the network jitter, so it is difficult to detect the clock shift within the range where the buffer amount moves with the network jitter increase / decrease.
  • the state of the network suddenly deteriorates locally due to various factors, and the arrival of a packet.
  • the amount of data will be lost from the buffer, resulting in an underrun. Therefore, in order to avoid the occurrence of underrun, it is generally necessary to buffer a larger amount of data before starting playback so that underrun does not occur due to clock misalignment. Then, as shown in Fig. 20, the required buffer amount is double that when there is no clock shift.
  • a main object of the present invention is to provide a receiving apparatus, a receiving program, and a recording medium on which the receiving program is recorded, capable of reducing the amount of data stored before starting reproduction. .
  • a receiving device is a receiving device that receives data transmitted from a transmitting device via a communication network, and includes a data storage unit that sequentially stores received data, and a data storage unit.
  • the data output means for sequentially taking out the data accumulated in the data accumulating means and the data accumulating means increase in response to the accumulated data amount exceeding a predetermined first reference value.
  • a control means for increasing the data extraction speed of the data output means by time.
  • a reception program is a reception program for causing a computer to execute a reception method in a reception apparatus that receives data transmitted from a transmission apparatus via a communication network, and that receives the received data.
  • the first step of sequential storage in the device buffer and the amount of data stored in the buffer exceeded a predetermined first reference value.
  • the data extraction speed in the second step is set to a predetermined speed so that the amount of data of the buffer increases.
  • the third step of increasing the data extraction speed of the second step for a predetermined time is executed.
  • a computer-readable recording medium records the above reception program.
  • the data extraction speed is set to a predetermined speed so as to increase the data accumulation amount. Therefore, if data is accumulated by absorbing the jitter of the communication network. It ’s enough. Therefore, the amount of data stored before the start of playback can be reduced compared to the conventional case of storing the amount of data necessary to avoid underrun due to jitter and clock shift in the communication network. Therefore, since the data accumulation time before the start of reproduction can be shortened, the response to the user's operation becomes faster. In addition, since the data storage capacity is small, low cost can be achieved.
  • FIG. 1 is a block diagram showing a configuration of a network system according to an embodiment of the present invention.
  • FIG. 2 is a block diagram showing a configuration of a transmission device and a reception device shown in FIG.
  • FIG. 3 is a diagram for explaining the operation of the processing means shown in FIG. 2.
  • FIG. 4 is a block diagram for explaining the operation of the reception processing unit shown in FIG. 2.
  • FIG. 5 is a flowchart showing data reception processing shown in FIG.
  • FIG. 6 is a diagram showing a notor included in the data storage means shown in FIG. 4.
  • FIG. 7 is a flowchart showing the buffering process shown in FIG.
  • FIG. 8 is a flowchart showing the data output process shown in FIG.
  • FIG. 9 is a part of a flowchart showing a clock count process shown in FIG. 4.
  • FIG. 10 is the remaining part of the flowchart shown in FIG.
  • FIG. 11 is a time chart for explaining a method of calculating a correction end time shown in FIG.
  • FIG. 12 is another time chart for explaining a method of calculating the correction end time shown in FIG.
  • FIG. 13 is a time chart illustrating the operation of the receiving apparatus shown in FIGS.
  • FIG. 14 is another time chart illustrating the operation of the receiving apparatus shown in FIGS.
  • FIG. 15 is a time chart illustrating the operation of a receiving device as a comparative example.
  • FIG. 16 is a diagram showing a modification of this embodiment.
  • FIG. 17 is a block diagram showing a configuration of a conventional network system.
  • FIG. 18 is a block diagram showing a configuration of another conventional network system.
  • FIG. 19 is a time chart illustrating the buffer amount of the reception buffer shown in FIG.
  • FIG. 20 is a time chart for explaining problems of the network system shown in FIG.
  • the present invention passes through an IP (Internet Protocol) network.
  • IP Internet Protocol
  • RTP Real Time Protocol
  • FIG. 1 is a block diagram showing a configuration of a network system according to an embodiment of the present invention.
  • This network system is a network to which various household devices such as a television, a hard disk recorder (hereinafter referred to as HDR), and a digital tuner are connected.
  • HDR hard disk recorder
  • a digital tuner for example, communication is performed using a network protocol such as IP (Internet Protocol).
  • IP Internet Protocol
  • the transmission device 1 is a real-time data transmission device that performs real-time stream transmission with a reception device (for example, a television) 2, and is, for example, a video, HDR, digital tuner, or the like having a communication function.
  • the transmission device 1 is connected to the reception device 2 via the communication network 3.
  • Devices 4 and 5 are other devices connected to the communication network 3.
  • FIG. 2 is a block diagram showing configurations of the transmission device 1 and the reception device 2.
  • the transmission device 1 includes an encoder 11 and a transmission processing unit 14, and the reception device 2 includes a reception processing unit 21 and a decoder 27.
  • the encoder 11 is a coding device that performs coding on a predetermined input according to a coding rule defined by MPEG2 and outputs MPEG2 data.
  • the encoder 11 includes clock generation means 12 that generates a clock signal that serves as a reference for the time of the encoder 11, and code key means 13 that performs data sign synchronization in synchronization with the clock signal.
  • the transmission processing unit 14 includes a processing unit 15 and a network connection unit 16, and converts the data output from the encoder 11 into a format that can be transmitted on the network 3, and outputs the data to the network 3.
  • the processing means 15 adds the RTP header, TCP header, and IP header to the MPEG2 data output from the encoder 11, as shown in FIG.
  • the RTP header includes a sequence number, a time stamp, and the like.
  • MPEG-2 data can be transmitted over the IP network.
  • the network connection means 16 outputs the IP packet generated by the processing means 15 to the communication network 3, and is, for example, an Ethernet (registered trademark) card.
  • the receiving device 2 receives real-time stream data from the transmitting device 1, and is, for example, a television or a liquid crystal equipped with a communication function. Such as a projector.
  • the reception device 2 includes a reception processing unit 21 that receives data transmitted from the network 3 and a decoder 27 that decodes the received data.
  • the reception processing unit 21 includes a network connection unit 22, a data storage unit 23, a data output unit 24, a clock generation unit 25 and a count unit 26, and the decoder 27 includes a decoding unit 28 and a clock generation unit 29.
  • the network connection means 22 is for connecting the receiving device 2 and the communication network 3, and is, for example, an Ethernet (registered trademark) card.
  • the data transmitted from the transmission device 1 is received by the network connection means 22.
  • the data storage means 23 includes a buffer for temporarily storing the data received by the network connection means 22 before outputting it to the decoder 27, and a control processing function for controlling the buffer.
  • the data output means 24 outputs the data stored in the data storage means 23 to the decoder 27 based on the count value counted by the count means 26 and the time information included in the received data.
  • the clock generation means 25 generates a clock signal used as a reference for determining the output time to the decoder 27.
  • the counting means 26 counts the number of pulses of the clock signal generated by the clock generating means 25 and provides the data output means 24 with a count value adjusted according to a predetermined rule.
  • the decoding unit 28 performs decoding of the data (MPEG2) output from the data output unit 24.
  • the clock generation means 29 generates time information included in the output data and timing power at which the data is input, and also generates a clock signal for reproducing the received data, and sends the clock signal to the decoding means 28. give.
  • each means of the reception processing unit 21 has a processing function for causing each means to function therein, and the reception processing is realized by operating in cooperation with each other.
  • reception processing unit 21 When the reception processing unit 21 is activated, data reception processing is activated in the data storage means 23, clock count processing is activated in the counting means 26, and buffering processing is performed in the data output means 24. It is activated. Data reception processing and clock count processing The buffering process is always executed, and the data output process is started and terminated when a predetermined condition is met.
  • the reception processing unit 21 includes a CPU (Central Processing Unit) and a recording medium.
  • the recording medium stores a program for causing the CPU to execute the above processes.
  • the CPU reads the recording medium power program and executes each process.
  • FIG. 5 is a flowchart showing data reception processing of the data storage means 23.
  • the data storage means 23 determines whether or not it has received a packet from the network connection means 22 (S1), and if received (YES in S1), proceeds to the next step S2. move on. If not received (NO in S1), the determination process in step S1 is performed again. The determination process in step S1 is continued until a packet is received. In step S2, the received packet data is written into the storage buffer.
  • step S3 the buffer write position (buffer_tail) is advanced by one, and the RTP header time stamp value of the received packet is written to the variable ta_rtp_ts.
  • FIG. 7 is a flowchart showing the buffering process of the data output means 24.
  • the data output means 24 determines whether or not the power confirmation that the data of the first packet is written in the buffer in the data storage means 23 is still available. To do.
  • the current count value COUNT obtained from the counting means 26 is written to the variable fr_rtp_ti (reception time of the first packet) (S 12),
  • the time stamp value included in the RTP header of the first packet is written to the variable fr_rtp_ts and the variable he_rtp_ts (time stamp value of the first packet in the buffer) (S13), and the output start time start_ti is calculated (S14).
  • the output start time start_ti is set after a predetermined time MAX_SAVE has elapsed since the first packet was received.
  • MAX_SAVE is normally set to the maximum jitter time expected on the network. For example, 300 msec. NO in step S11
  • step S15 when the count value COUNT obtained from the counting means 26 exceeds the output start time start_ti, the buffering process is terminated and the process proceeds to data output process. If the output start time start_ti is not reached, the process returns to step S11 Repeat a series of processes. Once the processing from step S12 to step S14 is completed, the confirmation of the first packet is completed, so the determination processing in step S11 is always NO.
  • FIG. 8 is a flowchart showing the data output process of the data output means 24.
  • the data output means 24 takes out the head position of the noffer (packet at the position of buffer_head) from the buffer.
  • the RTP time stamp of the extracted packet is compared with the count value COUNT acquired from the counting means 26 to confirm whether or not the extracted packet has reached the output start time starUi (S22).
  • step S22 When the output start time start_ti is reached (YES in S22), the extracted packet is written to the decoder 27 (S23). If the output start time start_ti is not reached, the process of step S22 is performed until the output start time starUi is reached. repeat.
  • the reading position (buffer_head) from the buffer is incremented, and the time stamp value of the data of the first packet is written to the variable he_rtp_ts (S24).
  • step S25 it is determined in step S25 whether or not the buffer correction operation is in progress, that is, whether or not the flag BUF_REVISE force STRUE. If the flag BUF_REVISE is TRUE! /, The count up speed is increased more than usual in order to prevent the buffer overrun in the clock counting process of the counting means 26 !. If BUF_REVISE force is TRUE (YES in S25), the process returns to step S21, and if FALSE (NO in S25), it is determined whether the amount of koffer exceeds a predetermined threshold (ADJUST_BORDER).
  • the buffer amount is calculated by subtracting the time stamp value he_rtp_ts of the first packet of the buffer from the time stamp value (ta_rtp_ts) of the last packet of the buffer. If the buffer amount exceeds the predetermined threshold (YES in S26), buffer correction is started by setting BUF_REVISE to TRUE in step S27. If not exceeded (FALSE in S26), go back to step S21.
  • FIG. 9 and FIG. 10 are flowcharts showing the clock count processing of the counting means 26. When the clock count process is started, the count unit 26 acquires the pulse of the reference clock signal from the clock generation unit 25 in step S31. When the reference clock signal pulse is obtained, the variable CO for counting the number of pulses of the reference clock signal is incremented in step S32.
  • the flag BUF_REVISE is checked to determine whether or not the buffer correction process is in operation (S33). If the flag BUF_REVISE is FALSE (NO in S33), the correction to avoid overrun is not performed and the adjustment amount totaLadjust per unit time for the reference clock count value CO is set to S_ADJUST. (S34).
  • S_ADJUST is a value calculated based on the error range between the clock generator 12 of the transmitter 1 and the clock generator 25 of the reception processor 21 of the receiver 2.
  • step S35 it is determined whether or not the variable end_adjust indicating the correction end time is zero. If end_adjust is zero, it is determined that the buffer amount needs to be corrected in step S26 of the data output process immediately before this step is executed, and the correction end time is determined from the current buffer status. Set to end_adjust (S36).
  • the number of bytes of data remaining in the buffer can be calculated by (ta_rtp_ts he_rtp_ts) X (number of bytes per time stamp). It is sufficient to leave enough data to absorb the data, that is, MAX_SAVE worth of data.
  • Dmax (ta_rtp_ts-he_rtp_ts MAX.SAVE) X (number of bytes per time stamp) data can be reduced from the buffer.
  • step S35 If YES is determined in step S35, or if the end time is set in step S36, the adjustment amount totaLadjust per unit time for the reference clock count CO is set to S_ADJUST—B_ADJUST in step S37. .
  • the count-up speed of the count value COUNT counted by the counting means 26 is adjusted so as to be faster than the count-up speed of the count value obtained by the output of the clock generating means 12 of the transmitter 1.
  • the for example, if the operation clock of the clock generation means 12 of the transmission device 1 is 27 MHz ⁇ 30 ppm specified in the MPEG2 specification, and the clock generation means 25 of the reception processing unit 21 of the reception device 2 is also the same 27 MHz ⁇ 30 ppm, B_A DJUST 3240 must be set.
  • step S38 a period T for correcting the clock is calculated.
  • FIG. 13 is a time chart illustrating an example of a change in the buffer amount of the reception buffer included in the data storage unit 23.
  • the buffer amount of the receive buffer increases at a constant rate.
  • the buffer amount reaches the playback start position, the data in the receive buffer is output to the decoder 27.
  • the playback start position is lower than before.
  • the data output speed is always set slower than the data input speed. Therefore, the buffer amount increases. If this is left unattended, an overrun occurs, so the data output speed is increased by a predetermined time according to the fact that the amount of koffa has reached the upper limit for avoiding overrun. As a result, the amount of koffa decreases. In this way, the amount of koffa is maintained near the upper limit.
  • FIG. 14 is a diagram showing a temporal change in the number of packets output from the data output means 24 to the decoder 27 per unit time (1 second).
  • FIG. 15 shows the time variation of the number of packets output to the reception buffer power decoder per unit time (1 second) in the conventional receiving apparatus shown in FIG. 18 and FIG. 19 as a comparative example.
  • FIG. 14 is a diagram showing a temporal change in the number of packets output from the data output means 24 to the decoder 27 per unit time (1 second).
  • FIG. 15 shows the time variation of the number of packets output to the reception buffer power decoder per unit time (1 second) in the conventional receiving apparatus shown in FIG. 18 and FIG. 19 as a comparative example.
  • FIG. 14 is a diagram showing a temporal change in the number of packets output from the data output means 24 to the decoder 27 per unit time (1 second).
  • FIG. 15 shows the time variation of the number of packets output to the reception buffer power decoder per unit time (1 second) in the conventional receiving
  • MPEG2-TS packets are used as packets, the content bit rate is 24 Mbps, the maximum frequency Fmax is 27 MHz + 1620 Hz, and the minimum frequency Fmin is 27 MHz-1620 Hz.
  • the initial buffering amount is 2.4 Mbit, and the upper threshold of the buffering amount is 2.88 Mbit.
  • the upper threshold of the buffering amount is 4.8 Mbit, and the lower limit of the buffering amount is 2.4 Mbit.
  • the output number S of packets per unit time is switched from the maximum value Smax to the minimum value Smin or from the minimum value Smin to the maximum value Smax in units of several minutes, whereas in the conventional technology, Switch in sufficient units.
  • the present invention controls the buffering amount in small increments in order to reduce the buffering amount as compared with the prior art.
  • the total buffering amount of the present invention is smaller than that of the prior art.
  • the time until the start of reproduction is shorter in the present invention than in the prior art.
  • the packet output speed at the start of playback is not particularly determined, whereas in the present invention, the packet output speed at the start of playback is determined to be the minimum value Smin.
  • the period for switching the packet output speed is shorter in the present invention than in the prior art.
  • the threshold of the upper limit of the buffering amount when switching the packet output speed is lower in the present invention than in the prior art.
  • the present invention is different from the prior art in these points.
  • the output speed is controlled by correcting the count value obtained by the clock signal power having a constant frequency generated by the clock generating means 25.
  • VCO voltage
  • An example of controlling the output speed by changing the operating frequency of the clock generating means 25 using a controlled oscillator is also conceivable.
  • the correction value per unit time is set for execution of the correction process.
  • the example of fixing and calculating the duration of correction has been shown, an example in which the correction time is fixed and the correction value is varied is also conceivable.
  • the receiving device 2 is exemplified as a television.
  • the receiving device 2 may be configured as a communication control circuit built in the television, or may be configured separately from the television. It may be configured as a device.
  • FIG. 16 is a diagram showing an external appearance of such a receiving device 30.
  • the receiving device 30 includes a computer main body 31, a display device 32, an FD drive 33 on which an FD (Flexible Disk) 34 is mounted, a keyboard 35, a mouse 36, a CD-ROM (Compact Disk-Read Only Memory). ) Includes CD-ROM device 37 on which 38 is installed, and network communication device 39.
  • a program for realizing the function of the receiving device 30 (hereinafter referred to as a receiving program) is supplied by a recording medium such as the FD 34 or the CD-ROM 38.
  • the reception program is executed by the computer main body 31, the above-described reception operation is executed.
  • the reception program may be supplied to the computer main body 31 from another computer via the communication line and the network communication device 39.
  • the reception method performed in the above-described reception device 30 can be provided as a program.
  • a program can be recorded on a computer-readable recording medium such as the FD 34 or CD-ROM 38 attached to the computer main body 31 and provided as a program product.
  • the program can be provided by being recorded on a recording medium such as a hard disk built in the computer main body 31.
  • the program can also be provided by downloading via a network.
  • the provided program product is installed in a program storage unit such as a hard disk and executed.
  • the program product includes the program itself and a recording medium on which the program is recorded.
  • the recording media are not limited to FD34 and CD-ROM38. Magnetic tape, MO (Magnetic Optical disk), MD (Mini Disk), DVD (Digital Versatile Disk), IC (Integrated Circuit) cards, etc. There may be.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Databases & Information Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Television Signal Processing For Recording (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)
  • Circuits Of Receivers In General (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

A receiving device (2) is provided with a data accumulating means (23) for sequentially accumulating received data, a data outputting means (24) for sequentially fetching the data when a data quantity of the data accumulating means (23) exceeds a first reference value, and a count means (26), which sets a data fetching speed to a prescribed speed so as to increase the data quantity of the data accumulating means (23) and increases the data fetching speed by a prescribed time when the data quantity of the data accumulating means (23) exceeds a second reference value. Therefore, since there is no need for avoiding underrun, the quantity of data accumulation prior to reproduction start can be small.

Description

受信装置、受信プログラム、および受信プログラムを記録した記録媒体 技術分野  RECEIVING DEVICE, RECEIVING PROGRAM, AND RECORDING MEDIUM CONTAINING RECEIVING PROGRAM
[0001] この発明は、受信装置、受信プログラム、および受信プログラムを記録した記録媒 体に関し、特に、送信装置から通信網を介して送信されたデータを受信する受信装 置、受信プログラム、および受信プログラムを記録した記録媒体に関する。  TECHNICAL FIELD [0001] The present invention relates to a receiving device, a receiving program, and a recording medium recording the receiving program, and in particular, a receiving device, a receiving program, and a receiving device that receive data transmitted from a transmitting device via a communication network. The present invention relates to a recording medium on which a program is recorded.
背景技術  Background art
[0002] 近年、ホームネットワークにおいて AVデータなどのリアルタイムデータを IP(Internet  [0002] In recent years, IP (Internet)
Protocol)パケットにより転送する技術が広がりつつある。この場合、エンコーダ (符 号ィ匕回路)とデコーダ (復号ィ匕回路)のクロックのズレによって、単位時間あたりに伝 送されるデータ量と、再生されるデータ量に違いがでてしまい画質の劣化等の問題 を起こしてしまう可能性があった。  Protocol) packet transfer technology is spreading. In this case, the amount of data transmitted per unit time differs from the amount of data to be reproduced due to the difference in clock between the encoder (code decoder) and the decoder (decoder circuit). There was a possibility of causing problems such as deterioration.
[0003] デジタルデータのリアルタイムストリーム伝送で一般的に用いられている MPEG2— TSでは、図 17に示すように、送信装置 51から受信装置 52に PCR信号とよばれる同 期信号をデータと一緒に送信する。受信装置 52内のデコーダでは、 PCR信号に含 まれる値および PCR信号が入力された時間の情報に基づき、 PLL回路と呼ばれるク ロックの同期を行う回路を用いて送信装置 51内のエンコーダのクロックを再現する。 これにより、送信装置 51と受信装置 52のクロックのズレをなくして 、る。  [0003] In MPEG2-TS, which is generally used in digital data real-time stream transmission, as shown in FIG. 17, a synchronization signal called a PCR signal is transmitted from a transmission device 51 to a reception device 52 together with data. Send. The decoder in the receiving device 52 uses a clock synchronization circuit called a PLL circuit based on the value included in the PCR signal and the information about the time when the PCR signal is input. To reproduce. As a result, the clock difference between the transmitting device 51 and the receiving device 52 is eliminated.
[0004] しかし、 PLL回路を使った同期方式は、ネットワークにおける遅延の変動(ジッタ)が 小さ 、場合に有効な技術であり、 IPデータ通信網のようなジッタが大きなネットワーク においては有効ではない。このような問題を解決するために、一般に用いられている のがァダプティブクロック法と呼ばれる方法である。  [0004] However, the synchronization method using the PLL circuit is effective when the delay variation (jitter) in the network is small, and is not effective in a network with a large jitter such as an IP data communication network. In order to solve such problems, a method called the adaptive clock method is generally used.
[0005] この方法では、図 18に示すように、受信装置 53側で、受信データをデコーダに入 力する前に、すべてのデータをー且バッファリングし、受信側のクロック(一般にデコ ーダ内部のクロックとは別のクロック)に合わせて、デコーダに入力する。これにより、 デコーダは、受信装置 53の受信バッファを駆動する時間情報に同期することになる 。そのため、送信装置 51がデータを送出するクロックと、受信装置 53においてバッフ ァがデコーダにデータを出力する速度とは異なることになる。そのため、受信バッファ 内のデータは、長期的にみると、増加又は減少していくが、ノ ッファに蓄積されたデ ータを監視し、蓄積データ量が上限値を超えたときデータ出力速度を速くし、データ 蓄積量が下限値よりも低下したとき出力速度を遅くすることにより、ノッファ溢れ (ォー バーラン)やデータが足りなくなる(アンダーラン)現象を回避している(たとえば特開 2 002— 165148号公報参照)。 In this method, as shown in FIG. 18, on the receiving device 53 side, before receiving the received data to the decoder, all the data is buffered and the receiving side clock (generally a decoder). The clock is input to the decoder in synchronization with a clock different from the internal clock. As a result, the decoder is synchronized with time information for driving the reception buffer of the reception device 53. For this reason, the transmission device 51 transmits the data and the reception device 53 This is different from the speed at which the data is output to the decoder. For this reason, the data in the receive buffer increases or decreases over the long term, but the data accumulated in the buffer is monitored and the data output speed is increased when the accumulated data amount exceeds the upper limit. By speeding up and slowing down the output speed when the amount of accumulated data falls below the lower limit, it is possible to avoid the phenomenon of overflow of noffer (overrun) and lack of data (underrun) (for example, Japanese Patent Laid-Open No. 20002). — See publication 165148).
[0006] 図 19は、受信バッファのバッファ量の変化を例示するタイムチャートである。図 19に おいて、受信データのバッファリングが開始されると、受信バッファのバッファ量は一 定の速度で増加する。ノ ッファ量が再生開始位置に到達すると、受信バッファのデー タはデコーダに出力される。データの出力速度が入力速度よりも速い場合は、バッフ ァ量が減少する。これを放置するとアンダーランが生じるので、ノ ッファ量がアンダー ラン回避のための下限に到達したことに応じてデータの出力速度を入力速度よりも遅 くする。データの出力速度を入力速度よりも遅くすると、バッファ量が増加する。これ を放置するとオーバーランが生じるので、ノ ッファ量がオーバーラン回避のための上 限に到達したことに応じてデータの出力速度を入力速度よりも速くする。このようにし てオーバーランとアンダーランが回避される。 FIG. 19 is a time chart illustrating a change in the buffer amount of the reception buffer. In Fig. 19, when buffering of received data is started, the buffer capacity of the receive buffer increases at a constant rate. When the buffer amount reaches the playback start position, the data in the receive buffer is output to the decoder. When the data output speed is faster than the input speed, the buffer amount decreases. If this is left as it is, an underrun will occur, so the data output speed will be slower than the input speed in response to the amount of nother reaching the lower limit to avoid underrun. If the data output speed is slower than the input speed, the buffer amount increases. If this is left unattended, an overrun occurs, so the output speed of the data is made faster than the input speed in response to the amount of nother reaching the upper limit to avoid overrun. In this way, overruns and underruns are avoided.
特許文献 1 :特開 2002— 165148号公報  Patent Document 1: Japanese Patent Laid-Open No. 2002-165148
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0007] このように、ネットワークにジッタがある通信網においては、再生データがなくなるこ とを防ぐためにバッファリングが必要となる。データの伝送速度と再生速度が全く同じ であれば、再生開始前にジッタの最大値に応じた量のデータをバッファリングし、再 生を開始するのが一般的である。  [0007] As described above, in a communication network having jitter in the network, buffering is necessary to prevent the reproduction data from being lost. If the data transmission speed and playback speed are exactly the same, it is common to start playback by buffering an amount of data according to the maximum jitter value before playback starts.
[0008] しかし、クロックのズレにより伝送速度よりも再生速度が速い場合は、長期的にみる とバッファ量は減少していく。実際ネットワークのジッタによるバッファの変動と比べて クロックのズレによるバッファ量の減少は非常に小さいため、バッファ量がネットワーク のジッタの増減で動く範囲内でクロックのズレを検知することは困難である。  However, when the reproduction speed is faster than the transmission speed due to clock shift, the buffer amount decreases in the long run. In fact, the buffer amount decrease due to the clock shift is very small compared to the buffer fluctuation due to the network jitter, so it is difficult to detect the clock shift within the range where the buffer amount moves with the network jitter increase / decrease.
[0009] 一方、ネットワークの状態は、様々な要因により、局所的に突然悪くなりパケットの到 着が遅れる(=ジッタが大きくなる)ことがあり、再生開始までに、ネットワークのジッタ 分しかデータをバッファリングしていないとすると、クロックのズレにより減少していた データ量 +ネットワークのジッタにより減少しデータ量がバッファからなくなってしまう ことになり、結果としてアンダーランが生じてしまう。そのため、一般にアンダーランの 発生を回避するために、再生開始前に、クロックのズレによりアンダーランの発生が 起こらないようにさらに多くの量のデータをバッファリングする必要があり、最悪の場合 を想定すると、必要なバッファ量は、図 20に示すように、クロックのズレがない場合の 2倍になる。 On the other hand, the state of the network suddenly deteriorates locally due to various factors, and the arrival of a packet. The arrival may be delayed (= jitter becomes large), and if data is buffered only for the jitter of the network by the time playback starts, the amount of data that has been reduced due to clock deviation + reduced by the jitter of the network However, the amount of data will be lost from the buffer, resulting in an underrun. Therefore, in order to avoid the occurrence of underrun, it is generally necessary to buffer a larger amount of data before starting playback so that underrun does not occur due to clock misalignment. Then, as shown in Fig. 20, the required buffer amount is double that when there is no clock shift.
[0010] したがって、従来の技術では、再生開始前に長時間のバッファリングが必要となり、 ユーザの操作に対するレスポンスが悪 、と 、う問題があった。  [0010] Therefore, in the conventional technique, there is a problem that a long buffering is required before the reproduction is started, and the response to the user operation is bad.
[0011] また、バッファリングを行うための大容量のバッファが必要となり、コスト高になってい た。  [0011] In addition, a large-capacity buffer for buffering is required, which increases the cost.
[0012] それゆえに、この発明の主たる目的は、再生開始前のデータ蓄積量の低減ィ匕を図 ることが可能な受信装置、受信プログラムおよび受信プログラムを記録した記録媒体 を提供することである。  [0012] Therefore, a main object of the present invention is to provide a receiving apparatus, a receiving program, and a recording medium on which the receiving program is recorded, capable of reducing the amount of data stored before starting reproduction. .
課題を解決するための手段  Means for solving the problem
[0013] この発明に係る受信装置は、送信装置から通信網を介して送信されたデータを受 信する受信装置であって、受信したデータを順次蓄積するデータ蓄積手段と、デー タ蓄積手段に蓄積されたデータ量が予め定められた第 1の基準値を超えたことに応 じてデータ蓄積手段に蓄積されたデータを順次取出すデータ出力手段と、データ蓄 積手段のデータ量が増加するようにデータ出力手段のデータ取出し速度を予め定め られた速度に設定し、データ蓄積手段のデータ量が第 1の基準値よりも高い予め定 められた第 2の基準値を超えた場合は所定の時間だけデータ出力手段のデータ取 出し速度を高くする制御手段とを備えたものである。  [0013] A receiving device according to the present invention is a receiving device that receives data transmitted from a transmitting device via a communication network, and includes a data storage unit that sequentially stores received data, and a data storage unit. The data output means for sequentially taking out the data accumulated in the data accumulating means and the data accumulating means increase in response to the accumulated data amount exceeding a predetermined first reference value. When the data output speed of the data output means is set to a predetermined speed and the data amount of the data storage means exceeds a predetermined second reference value higher than the first reference value, And a control means for increasing the data extraction speed of the data output means by time.
[0014] また、この発明に係る受信プログラムは、送信装置から通信網を介して送信された データを受信する受信装置における受信方法をコンピュータに実行させる受信プロ グラムであって、受信したデータを受信装置のバッファに順次蓄積する第 1のステツ プと、ノ ッファに蓄積されたデータ量が予め定められた第 1の基準値を超えたことに 応じてバッファに蓄積されたデータを順次取出す第 2のステップと、ノ ッファのデータ 量が増加するように第 2のステップにおけるデータ取出し速度を予め定められた速度 に設定し、ノ ッファのデータ量が第 1の基準値よりも高い予め定められた第 2の基準 値を超えた場合は所定の時間だけ第 2のステップのデータ取出し速度を高くする第 3 のステップを実行させるものである。 [0014] Further, a reception program according to the present invention is a reception program for causing a computer to execute a reception method in a reception apparatus that receives data transmitted from a transmission apparatus via a communication network, and that receives the received data. The first step of sequential storage in the device buffer and the amount of data stored in the buffer exceeded a predetermined first reference value. In response to the second step of sequentially extracting the data stored in the buffer, the data extraction speed in the second step is set to a predetermined speed so that the amount of data of the buffer increases. When the value exceeds a predetermined second reference value higher than the first reference value, the third step of increasing the data extraction speed of the second step for a predetermined time is executed.
[0015] また、この発明に係るコンピュータ読み取り可能な記録媒体は、上記受信プロダラ ムを記録したものである。 [0015] Further, a computer-readable recording medium according to the present invention records the above reception program.
発明の効果  The invention's effect
[0016] この発明に係る受信装置および受信プログラムでは、データ蓄積量が増加するよう にデータ取出し速度を予め定められた速度に設定するので、通信網のジッタを吸収 する分だけデータを蓄積すれば足りる。したがって、通信網のジッタとクロックずれに よるアンダーランを回避するために必要なデータ量を蓄積していた従来に比べ、再 生開始前のデータ蓄積量が小さくて済む。よって、再生開始前のデータ蓄積時間で 短くて済むので、ユーザの操作に対するレスポンスが速くなる。また、データ蓄積容 量が小さくて済むので、低コストィ匕を図ることができる。  [0016] In the receiving apparatus and the receiving program according to the present invention, the data extraction speed is set to a predetermined speed so as to increase the data accumulation amount. Therefore, if data is accumulated by absorbing the jitter of the communication network. It ’s enough. Therefore, the amount of data stored before the start of playback can be reduced compared to the conventional case of storing the amount of data necessary to avoid underrun due to jitter and clock shift in the communication network. Therefore, since the data accumulation time before the start of reproduction can be shortened, the response to the user's operation becomes faster. In addition, since the data storage capacity is small, low cost can be achieved.
[0017] また、データ蓄積量が第 2の基準値を超えた場合は所定の時間だけデータ取出し 速度を高くするので、ジッタの影響によってデータ蓄積量の変動が激しい場合でも、 データ取出し速度を頻繁に制御する必要がない。  [0017] In addition, when the data accumulation amount exceeds the second reference value, the data retrieval speed is increased for a predetermined time. Therefore, even when the data accumulation amount fluctuates greatly due to the influence of jitter, the data retrieval speed is frequently increased. There is no need to control.
図面の簡単な説明  Brief Description of Drawings
[0018] [図 1]この発明の一実施の形態によるネットワークシステムの構成を示すブロック図で ある。  FIG. 1 is a block diagram showing a configuration of a network system according to an embodiment of the present invention.
[図 2]図 1に示した送信装置および受信装置の構成を示すブロック図である。  2 is a block diagram showing a configuration of a transmission device and a reception device shown in FIG.
[図 3]図 2に示した処理手段の動作を説明するための図である。  3 is a diagram for explaining the operation of the processing means shown in FIG. 2.
[図 4]図 2に示した受信処理部の動作を説明するためのブロック図である。  4 is a block diagram for explaining the operation of the reception processing unit shown in FIG. 2.
[図 5]図 4に示したデータ受信処理を示すフローチャートである。  FIG. 5 is a flowchart showing data reception processing shown in FIG.
[図 6]図 4に示したデータ蓄積手段に含まれるノ ッファを示す図である。  FIG. 6 is a diagram showing a notor included in the data storage means shown in FIG. 4.
[図 7]図 4に示したバッファリング処理を示すフローチャートである。  7 is a flowchart showing the buffering process shown in FIG.
[図 8]図 4に示したデータ出力処理を示すフローチャートである。 [図 9]図 4に示したクロックカウント処理を示すフローチャートの一部分である。 8 is a flowchart showing the data output process shown in FIG. FIG. 9 is a part of a flowchart showing a clock count process shown in FIG. 4.
[図 10]図 9に示したフローチャートの残りの部分である。  FIG. 10 is the remaining part of the flowchart shown in FIG.
[図 11]図 9に示した補正終了時刻の算出方法を説明するためのタイムチャートである  FIG. 11 is a time chart for explaining a method of calculating a correction end time shown in FIG.
[図 12]図 9に示した補正終了時刻の算出方法を説明するための他のタイムチャート である。 FIG. 12 is another time chart for explaining a method of calculating the correction end time shown in FIG.
[図 13]図 1〜図 12に示した受信装置の動作を例示するタイムチャートである。  FIG. 13 is a time chart illustrating the operation of the receiving apparatus shown in FIGS.
[図 14]図 1〜図 12に示した受信装置の動作を例示する他のタイムチャートである。  FIG. 14 is another time chart illustrating the operation of the receiving apparatus shown in FIGS.
[図 15]比較例となる受信装置の動作を例示するタイムチャートである。  FIG. 15 is a time chart illustrating the operation of a receiving device as a comparative example.
[図 16]この実施の形態の変更例を示す図である。  FIG. 16 is a diagram showing a modification of this embodiment.
[図 17]従来のネットワークシステムの構成を示すブロック図である。  FIG. 17 is a block diagram showing a configuration of a conventional network system.
[図 18]従来の他のネットワークシステムの構成を示すブロック図である。  FIG. 18 is a block diagram showing a configuration of another conventional network system.
[図 19]図 17に示した受信バッファのバッファ量を例示するタイムチャートである。  FIG. 19 is a time chart illustrating the buffer amount of the reception buffer shown in FIG.
[図 20]図 17に示したネットワークシステムの問題点を説明するためのタイムチャートで ある。  FIG. 20 is a time chart for explaining problems of the network system shown in FIG.
符号の説明  Explanation of symbols
[0019] 1, 51 送信装置、 2, 30, 52, 53 受信装置、 3 通信ネットワーク、 4, 5 機器、 1 1 エンコーダ、 12, 25, 29 クロック発生手段、 13 符号化手段、 14 送信処理部 、 15 処理手段、 16, 22 ネットワーク接続手段、 21 受信処理部、 23 データ蓄積 手段、 24 データ出力手段、 26 カウント手段、 27 デコーダ、 28 復号化手段、 31 コンピュータ本体、 32 ディスプレイ装置、 33 FDドライブ、 34 FD、 35 キーボ ード、 36 マウス、 37 CD— ROM装置、 38 CD-ROM, 39 ネットワーク通信装 置。  [0019] 1, 51 transmitting device, 2, 30, 52, 53 receiving device, 3 communication network, 4, 5 device, 1 1 encoder, 12, 25, 29 clock generating means, 13 encoding means, 14 transmission processing unit , 15 processing means, 16, 22 network connection means, 21 reception processing section, 23 data storage means, 24 data output means, 26 counting means, 27 decoder, 28 decoding means, 31 computer main body, 32 display device, 33 FD drive , 34 FD, 35 keyboard, 36 mouse, 37 CD-ROM device, 38 CD-ROM, 39 Network communication device.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0020] 以下、本発明の一実施の形態によるネットワークシステムについて説明する。本実 施の形態は、遅延変動が大きな通信網を経由するリアルタイム通信において、通信 を開始して力も再生開始までの時間を短縮させるものである。 Hereinafter, a network system according to an embodiment of the present invention will be described. In this embodiment, in real-time communication via a communication network with large delay variation, the time from the start of communication to the start of playback is shortened.
[0021] なお、本実施の形態においては、本発明が IP (Internet Protocol)ネットワークを通 じて RTP (Real Time Protocol)を用いた MPEG2のリアルタイムストリーム伝送に適 用された例について述べる。ただし、本発明はこれに限定されるものではない。 In the present embodiment, the present invention passes through an IP (Internet Protocol) network. Next, an example applied to MPEG2 real-time stream transmission using RTP (Real Time Protocol) is described. However, the present invention is not limited to this.
[0022] 図 1は、本発明の一実施の形態によるネットワークシステムの構成を示すブロック図 である。このネットワークシステムは、たとえば、テレビやハードディスクレコーダ(以下 、 HDR)、デジタルチューナーなどの様々な家庭内の機器が接続されたネットワーク である。このネットワークシステムでは、たとえば、 IP (Internet Protocol)のようなネッ トワークプロトコルを用いて通信が行われる。  FIG. 1 is a block diagram showing a configuration of a network system according to an embodiment of the present invention. This network system is a network to which various household devices such as a television, a hard disk recorder (hereinafter referred to as HDR), and a digital tuner are connected. In this network system, for example, communication is performed using a network protocol such as IP (Internet Protocol).
[0023] 送信装置 1は、受信装置 (たとえばテレビ) 2との間でリアルタイムストリーム伝送を行 うリアルタイムデータの送信装置であり、たとえば、通信機能を備えたビデオ、 HDR、 デジタルチューナーなどである。送信装置 1は、通信ネットワーク 3を介して受信装置 2と接続される。機器 4, 5は、通信ネットワーク 3に接続されるその他の機器である。  [0023] The transmission device 1 is a real-time data transmission device that performs real-time stream transmission with a reception device (for example, a television) 2, and is, for example, a video, HDR, digital tuner, or the like having a communication function. The transmission device 1 is connected to the reception device 2 via the communication network 3. Devices 4 and 5 are other devices connected to the communication network 3.
[0024] 図 2は、送信装置 1および受信装置 2の構成を示すブロック図である。図 2において 、送信装置 1はエンコーダ 11および送信処理部 14を含み、受信装置 2は受信処理 部 21およびデコーダ 27を含む。  FIG. 2 is a block diagram showing configurations of the transmission device 1 and the reception device 2. In FIG. 2, the transmission device 1 includes an encoder 11 and a transmission processing unit 14, and the reception device 2 includes a reception processing unit 21 and a decoder 27.
[0025] エンコーダ 11は、所定の入力に対して、 MPEG2で規定されている符号ィ匕規則に 従って符号ィ匕を行い、 MPEG2のデータを出力する符号ィ匕装置である。エンコーダ 1 1は、エンコーダ 11の時刻の基準となるクロック信号を発生するクロック発生手段 12と 、そのクロック信号に同期してデータの符号ィ匕を行う符号ィ匕手段 13とを含む。  The encoder 11 is a coding device that performs coding on a predetermined input according to a coding rule defined by MPEG2 and outputs MPEG2 data. The encoder 11 includes clock generation means 12 that generates a clock signal that serves as a reference for the time of the encoder 11, and code key means 13 that performs data sign synchronization in synchronization with the clock signal.
[0026] 送信処理部 14は、処理手段 15およびネットワーク接続手段 16を含み、エンコーダ 11から出力されたデータをネットワーク 3上で伝送可能なフォーマットにし、ネットヮー ク 3に出力するものである。処理手段 15は、図 3の示すように、エンコーダ 11から出 力される MPEG2データに対して、 RTPヘッダ, TCPヘッダ, IPヘッダの各ヘッダを 付加する。 RTPヘッダは、シーケンス番号、タイムスタンプなどを含む。これ〖こより、 M PEG2のデータが IPネットワーク上で伝送可能になる。図 2に戻って、ネットワーク接 続手段 16は、処理手段 15で生成された IPパケットを通信ネットワーク 3へ出力するも のであり、たとえば、イーサネット (Ethernet) (登録商標)カードである。  [0026] The transmission processing unit 14 includes a processing unit 15 and a network connection unit 16, and converts the data output from the encoder 11 into a format that can be transmitted on the network 3, and outputs the data to the network 3. The processing means 15 adds the RTP header, TCP header, and IP header to the MPEG2 data output from the encoder 11, as shown in FIG. The RTP header includes a sequence number, a time stamp, and the like. As a result, MPEG-2 data can be transmitted over the IP network. Returning to FIG. 2, the network connection means 16 outputs the IP packet generated by the processing means 15 to the communication network 3, and is, for example, an Ethernet (registered trademark) card.
[0027] 次に、受信装置 2について説明する。受信装置 2は、送信装置 1からのリアルタイム ストリームデータの受信を行うものであり、たとえば、通信機能を備えたテレビや液晶 プロジェクタなどである。受信装置 2は、ネットワーク 3から伝送されたデータを受信す る受信処理部 21と、受信したデータの復号化を行うデコーダ 27とを含む。受信処理 部 21はネットワーク接続手段 22、データ蓄積手段 23、データ出力手段 24、クロック 発生手段 25およびカウント手段 26を含み、デコーダ 27は復号化手段 28およびクロ ック発生手段 29を含む。 Next, the receiving device 2 will be described. The receiving device 2 receives real-time stream data from the transmitting device 1, and is, for example, a television or a liquid crystal equipped with a communication function. Such as a projector. The reception device 2 includes a reception processing unit 21 that receives data transmitted from the network 3 and a decoder 27 that decodes the received data. The reception processing unit 21 includes a network connection unit 22, a data storage unit 23, a data output unit 24, a clock generation unit 25 and a count unit 26, and the decoder 27 includes a decoding unit 28 and a clock generation unit 29.
[0028] ネットワーク接続手段 22は、受信装置 2と通信ネットワーク 3を接続するためのもの であり、たとえば、イーサネット (登録商標)カードである。送信装置 1から送信された データはネットワーク接続手段 22で受信される。データ蓄積手段 23は、ネットワーク 接続手段 22にて受信したデータをデコーダ 27に出力する前に、一時的に蓄積する ためのバッファと、ノ ッファ制御するための制御処理機能とを含む。  [0028] The network connection means 22 is for connecting the receiving device 2 and the communication network 3, and is, for example, an Ethernet (registered trademark) card. The data transmitted from the transmission device 1 is received by the network connection means 22. The data storage means 23 includes a buffer for temporarily storing the data received by the network connection means 22 before outputting it to the decoder 27, and a control processing function for controlling the buffer.
[0029] データ出力手段 24は、データ蓄積手段 23で蓄積されたデータを、カウント手段 26 でカウントされるカウント値と受信データに含まれる時刻情報とに基いてデコーダ 27 に出力する。  The data output means 24 outputs the data stored in the data storage means 23 to the decoder 27 based on the count value counted by the count means 26 and the time information included in the received data.
[0030] クロック発生手段 25は、デコーダ 27への出力時間を決定するための基準として用 いるクロック信号を発生する。カウント手段 26は、クロック発生手段 25で発生されたク ロック信号のパルス数をカウントし、所定の規則に従って調整したカウント値をデータ 出力手段 24に提供する。  The clock generation means 25 generates a clock signal used as a reference for determining the output time to the decoder 27. The counting means 26 counts the number of pulses of the clock signal generated by the clock generating means 25 and provides the data output means 24 with a count value adjusted according to a predetermined rule.
[0031] 復号化手段 28は、データ出力手段 24から出力されたデータ (MPEG2)の復号ィ匕 を行う。クロック発生手段 29は、出力されたデータに含まれる時刻情報とデータが入 力されたタイミング力も受信したデータの再生を行うためのクロック信号を生成し、そ のクロック信号を復号ィ匕手段 28に与える。  The decoding unit 28 performs decoding of the data (MPEG2) output from the data output unit 24. The clock generation means 29 generates time information included in the output data and timing power at which the data is input, and also generates a clock signal for reproducing the received data, and sends the clock signal to the decoding means 28. give.
[0032] 次に、受信装置 2がリアルタイムデータを受信する際の詳細な動作について説明す る。図 4に示すように、受信処理部 21の各手段は、その内部にそれぞれの手段を機 能させるための処理機能を有しており、それぞれが協調して動作することにより受信 処理が実現される。  Next, a detailed operation when the receiving device 2 receives real-time data will be described. As shown in FIG. 4, each means of the reception processing unit 21 has a processing function for causing each means to function therein, and the reception processing is realized by operating in cooperation with each other. The
[0033] 受信処理部 21が起動されると、データ蓄積手段 23においてデータ受信処理が起 動され、カウント手段 26においてクロックカウント処理が起動され、データ出力手段 2 4にお ヽてバッファリング処理が起動される。データ受信処理とクロックカウント処理は 常時実行され、バッファリング処理は、所定の条件になればデータ出力処理を起動し 終了される。受信処理部 21は、 CPU (Central Processing Unit)と、記録媒体とを含 んでいる。記録媒体には、上記各処理を CPUに実行させるためのプログラムが格納 されている。 CPUは、記録媒体力 プログラムを読み出して各処理を実行する。 [0033] When the reception processing unit 21 is activated, data reception processing is activated in the data storage means 23, clock count processing is activated in the counting means 26, and buffering processing is performed in the data output means 24. It is activated. Data reception processing and clock count processing The buffering process is always executed, and the data output process is started and terminated when a predetermined condition is met. The reception processing unit 21 includes a CPU (Central Processing Unit) and a recording medium. The recording medium stores a program for causing the CPU to execute the above processes. The CPU reads the recording medium power program and executes each process.
[0034] 図 5は、データ蓄積手段 23のデータ受信処理を示すフローチャートである。データ 受信処理が起動されると、ステップ S1においてデータ蓄積手段 23は、ネットワーク接 続手段 22からパケットを受信した力否かを判定し (S1)、受信したら (S1で YES)次 のステップ S2に進む。受信していなければ(S1で NO)再度ステップ S1の判定処理 を行う。ステップ S1の判定処理は、パケットを受信するまで続けられる。ステップ S2で は、受信したパケットのデータを蓄積用のバッファへ書込む。  FIG. 5 is a flowchart showing data reception processing of the data storage means 23. When the data reception process is activated, in step S1, the data storage means 23 determines whether or not it has received a packet from the network connection means 22 (S1), and if received (YES in S1), proceeds to the next step S2. move on. If not received (NO in S1), the determination process in step S1 is performed again. The determination process in step S1 is continued until a packet is received. In step S2, the received packet data is written into the storage buffer.
[0035] データは、図 6に示すように、バッファの指定された書込位置 (buffer_tail)に書き込 まれ、ノ ッファの指定された読出位置 (buffer_head)力 読み出される。図 5に戻って、 データの書込みが完了したら、ステップ S3に進む。ステップ S3では、バッファの書込 位置(buffer_tail)を 1つ進めるとともに、受信したパケットの RTPヘッダのタイムスタン プ値を変数 ta_rtp_tsに書込む。ステップ S3が終了するとステップ S1に戻り、一連の処 理を繰り返す。  [0035] As shown in FIG. 6, the data is written into the designated write position (buffer_tail) of the buffer, and is read out by the designated read position (buffer_head) of the buffer. Returning to FIG. 5, when the data writing is completed, the process proceeds to step S3. In step S3, the buffer write position (buffer_tail) is advanced by one, and the RTP header time stamp value of the received packet is written to the variable ta_rtp_ts. When step S3 ends, the process returns to step S1 and a series of processing is repeated.
[0036] 図 7は、データ出力手段 24のバッファリング処理を示すフローチャートである。バッ ファリング処理が起動されると、ステップ S 11においてデータ出力手段 24は、データ 蓄積手段 23内のバッファに最初のパケットのデータが書き込まれている力 確認がま だである力否かを判定する。最初のパケットのデータがバッファに書き込まれている が確認がまだである場合は、カウント手段 26から取得した現在のカウント値 COUNT を変数 fr_rtp_ti (最初のパケットの受信時間)に書込み(S 12)、最初のパケットの RTP ヘッダに含まれるタイムスタンプ値を変数 fr_rtp_tsおよび変数 he_rtp_ts (バッファの先 頭のパケットのタイムスタンプ値)に書込み(S13)、出力開始時間 start_tiの算出を行 う(S14)。  FIG. 7 is a flowchart showing the buffering process of the data output means 24. When the buffering process is started, in step S11, the data output means 24 determines whether or not the power confirmation that the data of the first packet is written in the buffer in the data storage means 23 is still available. To do. If the data of the first packet has been written to the buffer but has not yet been confirmed, the current count value COUNT obtained from the counting means 26 is written to the variable fr_rtp_ti (reception time of the first packet) (S 12), The time stamp value included in the RTP header of the first packet is written to the variable fr_rtp_ts and the variable he_rtp_ts (time stamp value of the first packet in the buffer) (S13), and the output start time start_ti is calculated (S14).
[0037] 出力開始時間 start_tiは、最初のパケットを受信してから、所定の時間 MAX_SAVE 経過後に設定する。 MAX_SAVEは、通常ネットワーク上で想定される最大のジッタ分 の時間が設定される。たとえば、 300msecである。ステップ S11の判定で NOとなる かステップ S14の処理が完了したら、ステップ S15に進む。ステップ S15では、カウン ト手段 26から取得したカウント値 COUNTが出力開始時間 start_tiを越えたらバッファリ ング処理を終了してデータ出力処理へ移り、出力開始時間 start_tiになっていなけれ ばステップ S 11に戻り、一連の処理を繰り返す。 1度ステップ S 12からステップ S 14の 処理を完了した後は、最初のパケットの確認は完了したことになるので、ステップ S11 での判定処理は常に NOになる。 [0037] The output start time start_ti is set after a predetermined time MAX_SAVE has elapsed since the first packet was received. MAX_SAVE is normally set to the maximum jitter time expected on the network. For example, 300 msec. NO in step S11 If the process of step S14 is completed, the process proceeds to step S15. In step S15, when the count value COUNT obtained from the counting means 26 exceeds the output start time start_ti, the buffering process is terminated and the process proceeds to data output process.If the output start time start_ti is not reached, the process returns to step S11 Repeat a series of processes. Once the processing from step S12 to step S14 is completed, the confirmation of the first packet is completed, so the determination processing in step S11 is always NO.
[0038] 図 8は、データ出力手段 24のデータ出力処理を示すフローチャートである。データ 出力処理が起動されると、ステップ S21においてデータ出力手段 24は、ノ ッファの先 頭位置(buffer_headの位置にあるパケット)をバッファから取り出す。次に、取り出した パケットの RTPのタイムスタンプと、カウント手段 26から取得したカウント値 COUNTを 比較し、取り出したパケットが出力開始時間 starUiになった力否かを確認する(S22) FIG. 8 is a flowchart showing the data output process of the data output means 24. When the data output process is started, in step S21, the data output means 24 takes out the head position of the noffer (packet at the position of buffer_head) from the buffer. Next, the RTP time stamp of the extracted packet is compared with the count value COUNT acquired from the counting means 26 to confirm whether or not the extracted packet has reached the output start time starUi (S22).
[0039] 出力開始時間 start_tiになったら(S22で YES)、取り出したパケットをデコーダ 27に 書込み(S23)、出力開始時間 start_tiになっていなければ、出力開始時間 starUiに なるまで、ステップ S22の処理を繰り返す。パケットをデコーダ 27に書き込んだらバッ ファからの読出位置(buffer_head)をインクリメントし、先頭のパケットのデータのタイム スタンプ値を変数 he_rtp_tsに書込む(S24)。 [0039] When the output start time start_ti is reached (YES in S22), the extracted packet is written to the decoder 27 (S23). If the output start time start_ti is not reached, the process of step S22 is performed until the output start time starUi is reached. repeat. When the packet is written to the decoder 27, the reading position (buffer_head) from the buffer is incremented, and the time stamp value of the data of the first packet is written to the variable he_rtp_ts (S24).
[0040] ステップ S24の処理が完了したら、ステップ S25においてバッファ補正動作中か否 力 すなわちフラグ BUF_REVISE力 STRUEか否かの判定を行う。フラグ BUF_REVISEが TRUEでな!/、場合は、カウント手段 26のクロックカウント処理にお!、てバッファのォー バーランを防ぐためにカウントアップの速度が通常よりもアップして 、る。 BUF_REVIS E力 TRUEであれば(S25で YES)、ステップ S21に戻り、 FALSEであれば(S25で NO )、 ノッファ量が所定の閾値 (ADJUST_BORDER)を超えているか否かの判定を行う。 ここで、バッファ量は、バッファの最後のパケットのタイムスタンプ値 (ta_rtp_ts)からバッ ファの先頭のパケットのタイムスタンプ値 he_rtp_tsを減算して算出する。バッファ量が 所定の閾値を超えている場合は(S26で YES)、ステップ S27において BUF_REVISE を TRUEに設定してバッファ補正を開始する。超えていない場合(S26で FALSE)は、 ステップ S 21〖こ戻る。 [0041] 図 9および図 10は、カウント手段 26のクロックカウント処理を示すフローチャートで ある。クロックカウント処理が起動されると、ステップ S31においてカウント手段 26は、 クロック発生手段 25からの基準クロック信号のパルスを取得する。基準クロック信号の パルスを取得したら、ステップ S32において、基準クロック信号のパルス数をカウント する変数 COをインクリメントする。 [0040] When the processing in step S24 is completed, it is determined in step S25 whether or not the buffer correction operation is in progress, that is, whether or not the flag BUF_REVISE force STRUE. If the flag BUF_REVISE is TRUE! /, The count up speed is increased more than usual in order to prevent the buffer overrun in the clock counting process of the counting means 26 !. If BUF_REVISE force is TRUE (YES in S25), the process returns to step S21, and if FALSE (NO in S25), it is determined whether the amount of koffer exceeds a predetermined threshold (ADJUST_BORDER). Here, the buffer amount is calculated by subtracting the time stamp value he_rtp_ts of the first packet of the buffer from the time stamp value (ta_rtp_ts) of the last packet of the buffer. If the buffer amount exceeds the predetermined threshold (YES in S26), buffer correction is started by setting BUF_REVISE to TRUE in step S27. If not exceeded (FALSE in S26), go back to step S21. FIG. 9 and FIG. 10 are flowcharts showing the clock count processing of the counting means 26. When the clock count process is started, the count unit 26 acquires the pulse of the reference clock signal from the clock generation unit 25 in step S31. When the reference clock signal pulse is obtained, the variable CO for counting the number of pulses of the reference clock signal is incremented in step S32.
[0042] 次に、フラグ BUF_REVISEのチェックを行い、バッファ補正処理が動作中か否かの 判定を行う(S33)。フラグ BUF_REVISEが FALSE (S33で NO)であれば、オーバーラ ン回避のための補正は行われていない状態であり、基準クロックカウント値 COに対す る単位時間当たりの調整量 totaLadjustを S_ADJUSTに設定する(S34)。  Next, the flag BUF_REVISE is checked to determine whether or not the buffer correction process is in operation (S33). If the flag BUF_REVISE is FALSE (NO in S33), the correction to avoid overrun is not performed and the adjustment amount totaLadjust per unit time for the reference clock count value CO is set to S_ADJUST. (S34).
[0043] この補正は、データ出力手段 24による出力開始後にデータ蓄積手段 23において バッファアンダーランが発生するのを防止するために行なわれる。 S_ADJUSTは、送 信装置 1のクロック発生手段 12と受信装置 2の受信処理部 21のクロック発生手段 25 との誤差の範囲を元に算出される値であり、これにより、カウント手段 26のカウントす るカウント値 COUNTのカウントアップの速度が送信装置 1のクロック発生手段 12の出 力によって得られるカウント値のカウントアップの速度よりも遅くなるように調整される。 たとえば、送信装置 1のクロック発生手段 12の動作クロックが MPEG2の仕様で規定 されている 27MHz± 30ppmで、受信装置 2の受信処理部 21のクロック発生手段 25 も同じ 27MHz± 30ppmであるならば、 S_ADJUST=1620以上に設定する必要があ る。ステップ S34の終了後はステップ S38に進む。  This correction is performed to prevent a buffer underrun from occurring in the data storage means 23 after the output from the data output means 24 is started. S_ADJUST is a value calculated based on the error range between the clock generator 12 of the transmitter 1 and the clock generator 25 of the reception processor 21 of the receiver 2. The count-up speed of the count value COUNT is adjusted so as to be slower than the count-up speed of the count value obtained by the output of the clock generation means 12 of the transmitter 1. For example, if the operation clock of the clock generator 12 of the transmitter 1 is 27 MHz ± 30 ppm specified in the MPEG2 specification, and the clock generator 25 of the reception processor 21 of the receiver 2 is also the same 27 MHz ± 30 ppm, S_ADJUST = 1620 or more must be set. After step S34 ends, the process proceeds to step S38.
[0044] 一方、 BUF_REVISE力 TRUE (S33で YES)であれば、オーバーラン回避のための 補正の実行が必要となる。まずステップ S35において、補正終了時刻を表す変数 end _adjustがゼロか否かを判定する。 end_adjustがゼロの場合は、本ステップが実行され る直前にデータ出力処理のステップ S26においてバッファ量の補正が必要だと判定 されたということであり、現在のバッファの状態から、補正の終了時刻を end_adjustに 設定する(S36)。  [0044] On the other hand, if the BUF_REVISE force is TRUE (YES in S33), correction to avoid overrun is required. First, in step S35, it is determined whether or not the variable end_adjust indicating the correction end time is zero. If end_adjust is zero, it is determined that the buffer amount needs to be corrected in step S26 of the data output process immediately before this step is executed, and the correction end time is determined from the current buffer status. Set to end_adjust (S36).
[0045] 補正の終了時刻の算出は、例えば、次のように行う。図 11に示すように、補正の継 続時間を tとし、クロックのアップの速度変化に伴うバッファからの出力速度の変化を ΔΥとすると、補正を行わない場合と比べた出力量の増加分 Dは、 D= AV X tで与え られる。また、補正時の単位時間当たりのクロックカウントの変化量は B_ADJUSTであ るので、 AV=B_ADUST X (1タイムスタンプあたりのバイト数)とすることが可能とな る。 The correction end time is calculated as follows, for example. As shown in Fig. 11, assuming that the correction duration is t and the change in the output speed from the buffer accompanying the change in the clock increase speed is Δ 増 加, the increase in the output amount compared to the case without correction D Is given by D = AV X t It is done. Since the amount of change in the clock count per unit time during correction is B_ADJUST, AV = B_ADUST X (number of bytes per time stamp) can be set.
[0046] 一方、バッファに残っているデータのバイト数は、(ta_rtp_ts he_rtp_ts) X (1タイム スタンプあたりのバイト数)で算出可能である力 補正後アンダーランを起こさないた めには、ネットワークジッタを吸収できるだけのデータ、すなわち MAX_SAVE分のデー タ残しておけばよい。つまり、図 12に示すように、最大で Dmax= (ta_rtp_ts - he_rtp_t s MAX.SAVE) X (1タイムスタンプあたりのバイト数)分のデータをバッファから減 少、させてちょいことになる。  [0046] On the other hand, the number of bytes of data remaining in the buffer can be calculated by (ta_rtp_ts he_rtp_ts) X (number of bytes per time stamp). It is sufficient to leave enough data to absorb the data, that is, MAX_SAVE worth of data. In other words, as shown in Figure 12, Dmax = (ta_rtp_ts-he_rtp_ts MAX.SAVE) X (number of bytes per time stamp) data can be reduced from the buffer.
[0047] ここで、補正を行うことによる出力データ量の増加分 Dが Dmaxとなるときが最大の補 正継続時間 tとなるときであり、 AVXt = Dより、補正継続時間 t=DmaxZ AVを得る 。これによつて得られた tを現在時刻に加算することで補正終了時刻の算出を行う。  [0047] Here, when the increase D in the output data amount due to correction becomes Dmax, the maximum correction duration t is obtained. From AVXt = D, the correction duration t = DmaxZ AV is set to Get. The correction end time is calculated by adding t obtained in this way to the current time.
[0048] ステップ S35で YESと判定された場合、またはステップ S36で終了時間の設定が 終わった場合は、ステップ S37において基準クロックカウント COに対する単位時間当 たりの調整量 totaLadjustを S_ADJUST— B_ADJUSTに設定する。  [0048] If YES is determined in step S35, or if the end time is set in step S36, the adjustment amount totaLadjust per unit time for the reference clock count CO is set to S_ADJUST—B_ADJUST in step S37. .
[0049] これにより、カウント手段 26のカウントするカウント値 COUNTのカウントアップの速度 が送信装置 1のクロック発生手段 12の出力によって得られるカウント値のカウントアツ プの速度よりも速くなるように調整される。たとえば、送信装置 1のクロック発生手段 12 の動作クロックが MPEG2の仕様で規定されている 27MHz± 30ppmで、受信装置 2の受信処理部 21のクロック発生手段 25も同じ 27MHz± 30ppmであるならば、 B_A DJUST=3240以上に設定する必要がある。  [0049] Thereby, the count-up speed of the count value COUNT counted by the counting means 26 is adjusted so as to be faster than the count-up speed of the count value obtained by the output of the clock generating means 12 of the transmitter 1. The For example, if the operation clock of the clock generation means 12 of the transmission device 1 is 27 MHz ± 30 ppm specified in the MPEG2 specification, and the clock generation means 25 of the reception processing unit 21 of the reception device 2 is also the same 27 MHz ± 30 ppm, B_A DJUST = 3240 must be set.
[0050] 次いでステップ S 38において、クロックを補正する周期 Tを計算する。周期 Tは、基 準クロックにてカウントされる 1秒あたりのカウント数 Kを 1秒あたりのクロックの調整数 t otaLadjustで除算することによって得られる(T=K/total_adjust)。ステップ S39にお!/ヽ て、基準クロックのカウント値 COを周期 Tで割った余りがゼロ力否かを判別し、ゼロで ない場合はステップ S40において補正せずにカウントし(COUNT=COUNT+ l)、ゼ 口の場合はステップ S41に進む。  [0050] Next, in step S38, a period T for correcting the clock is calculated. The period T is obtained by dividing the count number K per second counted by the reference clock by the clock adjustment number t otaLadjust per second (T = K / total_adjust). In step S39, it is determined whether the remainder obtained by dividing the reference clock count value CO by the period T is zero or not. If it is not zero, it is counted without correction in step S40 (COUNT = COUNT + l ), If it is not, go to step S41.
[0051] ステップ S41では、クロックを速めるのか遅くするの力、すなわち T>0か否かを判別 し、 T>0でない場合はステップ S42においてクロックを通常よりも速く進め(COUNT= COUNT + 2)てステップ S43に進み、 T > 0である場合はステップ S43に進む。 [0051] In step S41, it is determined whether or not the clock speed is increased or decreased, that is, whether T> 0. If T> 0 is not satisfied, the clock is advanced faster than usual in step S42 (COUNT = COUNT + 2), and the process proceeds to step S43. If T> 0, the process proceeds to step S43.
[0052] ステップ S43では補正終了時刻になった(COUNT〉end_adjustかつ BUF_REVISE=T RUE)力否かを判別し、補正終了時刻でない場合はステップ S31に戻り、補正終了時 刻である場合はステップ S44で補正を終了し(end_adjust=0,BUF_REVISE=FALSE)、 ステップ S31〖こ戻る。 [0052] In step S43, it is determined whether the correction end time is reached (COUNT> end_adjust and BUF_REVISE = TRUE). If it is not the correction end time, the process returns to step S31, and if it is the correction end time, step S44 is performed. To complete the correction (end_adjust = 0, BUF_REVISE = FALSE) and return to step S31.
[0053] 図 13は、データ蓄積手段 23に含まれる受信バッファのバッファ量の変化を例示す るタイムチャートである。図 13において、受信データのバッファリングが開始されると、 受信バッファのバッファ量は一定の速度で増加する。ノ ッファ量が再生開始位置に 到達すると、受信バッファのデータはデコーダ 27に出力される。再生開始位置は、従 来よりち低くなる。  FIG. 13 is a time chart illustrating an example of a change in the buffer amount of the reception buffer included in the data storage unit 23. In FIG. 13, when buffering of received data is started, the buffer amount of the receive buffer increases at a constant rate. When the buffer amount reaches the playback start position, the data in the receive buffer is output to the decoder 27. The playback start position is lower than before.
[0054] データの出力速度は、必ずデータの入力速度よりも遅く設定される。したがって、バ ッファ量が増大する。これを放置するとオーバーランが生じるので、ノ ッファ量がォー バーラン回避のための上限に到達したことに応じてデータの出力速度を所定時間だ け高くする。これにより、ノ ッファ量は下降する。このようにして、ノ ッファ量は上限付 近に維持される。  The data output speed is always set slower than the data input speed. Therefore, the buffer amount increases. If this is left unattended, an overrun occurs, so the data output speed is increased by a predetermined time according to the fact that the amount of koffa has reached the upper limit for avoiding overrun. As a result, the amount of koffa decreases. In this way, the amount of koffa is maintained near the upper limit.
[0055] 図 14は、単位時間(1秒)当たりにデータ出力手段 24からデコーダ 27に出力される パケットの数の時間変化を示す図である。また図 15は、比較例となる図 18および図 1 9で示した従来の受信装置において、単位時間(1秒)当たりに受信バッファ力 デコ ーダに出力されるパケットの数の時間変化を示す図である。  FIG. 14 is a diagram showing a temporal change in the number of packets output from the data output means 24 to the decoder 27 per unit time (1 second). FIG. 15 shows the time variation of the number of packets output to the reception buffer power decoder per unit time (1 second) in the conventional receiving apparatus shown in FIG. 18 and FIG. 19 as a comparative example. FIG.
[0056] 図 14および図 15では、パケットとして MPEG2—TSパケットを採用し、コンテンツ のビットレートを 24Mbpsとし、最大の周波数 Fmaxを 27MHz+ 1620Hzとし、最小 の周波数 Fminを 27MHz— 1620Hzとした。また図 14では、初期のバッファリング量 を 2. 4Mbitとし、バッファリング量の上限のしきい値を 2. 88Mbitとした。また図 15で は、バッファリング量の上限のしきい値を 4. 8Mbitとし、バッファリング量の下限のし き!ヽ値を 2. 4Mbitとした。  In FIG. 14 and FIG. 15, MPEG2-TS packets are used as packets, the content bit rate is 24 Mbps, the maximum frequency Fmax is 27 MHz + 1620 Hz, and the minimum frequency Fmin is 27 MHz-1620 Hz. In Fig. 14, the initial buffering amount is 2.4 Mbit, and the upper threshold of the buffering amount is 2.88 Mbit. In Fig. 15, the upper threshold of the buffering amount is 4.8 Mbit, and the lower limit of the buffering amount is 2.4 Mbit.
[0057] 1秒当りのパケットの個数 Sは、 S= (本来の周波数) Z (出力に用いる周波数) X (コ ンテンッのビットレート) Z (パケット 1個当りのバイト数) Z8となる。したがって、 1秒当 りのパケットの個数 Sの最大値 Smaxは、 Smax= 27 (MHz) /Fmin X 24 (Mbps) /1 88 (byte) Z8 (bit) = 133868 (個 Z秒)となる。また、 1秒当りのパケットの個数 Sの 最小値 Sminは、 Smin= 27 (MHz) /Fmax X 24 (Mbps) /188 (byte) /8 (bit) = 133854 (個 Z秒)となる。 [0057] The number of packets per second S is S = (original frequency) Z (frequency used for output) X (content bit rate) Z (number of bytes per packet) Z8. Therefore, 1 second The maximum value Smax of S is Smax = 27 (MHz) / Fmin X 24 (Mbps) / 1 88 (byte) Z8 (bit) = 133868 (number of Z seconds). The minimum value Smin of the number of packets S per second is Smin = 27 (MHz) / Fmax X 24 (Mbps) / 188 (byte) / 8 (bit) = 133854 (number of Z seconds).
[0058] また、図 14において、パケットの個数が増減する周期 T1は、 Tl ={ [ (上限のしきい 値) (初期のノ ッファリング量)] Ζ2}Ζ (コンテンツのビットレート) Z(l秒当りの時間 のずれ) X 2 = 0. 24 (Mbit) Ζ24 (Mbps) Ζ60 s) X 2 = 333 (s)となる。また、図 15において、パケットの個数が増減する周期 T2は、 T2={ (上限のしきい値) (下 限のしきい値) }Ζ (コンテンツのビットレート) Z(l秒当りの時間のずれ) X 2 = 2. 4 ( Mbit) /24 (Mbps) /60 ( s) X 2 = 3333 (s)となる。  [0058] In FIG. 14, the period T1 at which the number of packets increases or decreases is Tl = {[(upper threshold) (initial amount of noffering)] Ζ2} Ζ (content bit rate) Z (l Deviation of time per second) X 2 = 0.24 (Mbit) Ζ 24 (Mbps) Ζ 60 s) X 2 = 333 (s). In Fig. 15, the period T2 when the number of packets increases or decreases is T2 = {(upper threshold) (lower threshold)} Ζ (content bit rate) Z (time per second) Deviation) X 2 = 2.4 (Mbit) / 24 (Mbps) / 60 (s) X 2 = 3333 (s).
[0059] したがって、本願発明では、単位時間当りのパケットの出力個数 Sは数分単位で最 大値 Smaxから最小値 Sminまたは最小値 Sminから最大値 Smaxに切換わるのに対し 、従来技術では数十分単位で切換わる。これは、本願発明は従来技術よりも、バッフ アリング量を少なくするために、バッファリング量を小刻みに制御していることを意味し ている。  Therefore, in the present invention, the output number S of packets per unit time is switched from the maximum value Smax to the minimum value Smin or from the minimum value Smin to the maximum value Smax in units of several minutes, whereas in the conventional technology, Switch in sufficient units. This means that the present invention controls the buffering amount in small increments in order to reduce the buffering amount as compared with the prior art.
[0060] 従来技術と本願発明を比較すると、トータルのバッファリング量は従来技術よりも本 願発明の方が少ない。再生開始までの時間は、従来技術よりの本願発明の方が短 い。従来技術では再生開始時におけるパケットの出力速度は特に決められていない のに対し、本願発明では再生開始時におけるパケットの出力速度は最小値 Sminに 決められている。パケットの出力速度を切換える周期は、従来技術よりも本願発明の 方が短い。パケットの出力速度を切換えるときのバッファリング量の上限のしきい値は 、従来技術よりも本願発明の方が低い。本願発明は、これらの点で従来技術と相違 する。  [0060] When comparing the prior art and the present invention, the total buffering amount of the present invention is smaller than that of the prior art. The time until the start of reproduction is shorter in the present invention than in the prior art. In the prior art, the packet output speed at the start of playback is not particularly determined, whereas in the present invention, the packet output speed at the start of playback is determined to be the minimum value Smin. The period for switching the packet output speed is shorter in the present invention than in the prior art. The threshold of the upper limit of the buffering amount when switching the packet output speed is lower in the present invention than in the prior art. The present invention is different from the prior art in these points.
[0061] なお、本実施の形態では、クロック発生手段 25で生成された一定周波数のクロック 信号力 得られるカウント値を補正することで、出力速度の制御を行っていた力 例 えば、 VCO (電圧制御発振器)を用いて、クロック発生手段 25の動作周波数を変動 させることにより、出力速度の制御を行う例も考えられる。  [0061] In the present embodiment, the output speed is controlled by correcting the count value obtained by the clock signal power having a constant frequency generated by the clock generating means 25. For example, VCO (voltage An example of controlling the output speed by changing the operating frequency of the clock generating means 25 using a controlled oscillator) is also conceivable.
[0062] また、本実施の形態では、補正処理の実行にお!、て、単位時間あたりの補正値を 固定し、補正の継続時間を算出する例について示したが、補正時間を固定し、補正 値を変動させるような例も考えられる。 [0062] In the present embodiment, the correction value per unit time is set for execution of the correction process. Although the example of fixing and calculating the duration of correction has been shown, an example in which the correction time is fixed and the correction value is varied is also conceivable.
[0063] また、本実施の形態では、受信装置 2をテレビとして例示して 、るが、たとえば、テ レビに内蔵される通信制御回路として構成される場合もあるし、テレビとは別個の装 置として構成される場合もある。  [0063] In the present embodiment, the receiving device 2 is exemplified as a television. However, for example, the receiving device 2 may be configured as a communication control circuit built in the television, or may be configured separately from the television. It may be configured as a device.
[0064] 図 16は、そのような受信装置 30の外観を示す図である。図 16において、この受信 装置 30は、コンピュータ本体 31、ディスプレイ装置 32、 FD (Flexible Disk) 34が装 着される FDドライブ 33、キーボード 35、マウス 36、 CD-ROM (Compact Disk- Rea d Only Memory) 38が装着される CD— ROM装置 37、およびネットワーク通信装 置 39を含む。受信装置 30の機能を実現するプログラム(以下、受信プログラムと呼ぶ 。)は、 FD34または CD— ROM38等の記録媒体によって供給される。受信プロダラ ムがコンピュータ本体 31によって実行されることにより、上述した受信動作が実行さ れる。また、受信プログラムは他のコンピュータより通信回線およびネットワーク通信 装置 39を経由し、コンピュータ本体 31に供給されてもよい。  FIG. 16 is a diagram showing an external appearance of such a receiving device 30. In FIG. 16, the receiving device 30 includes a computer main body 31, a display device 32, an FD drive 33 on which an FD (Flexible Disk) 34 is mounted, a keyboard 35, a mouse 36, a CD-ROM (Compact Disk-Read Only Memory). ) Includes CD-ROM device 37 on which 38 is installed, and network communication device 39. A program for realizing the function of the receiving device 30 (hereinafter referred to as a receiving program) is supplied by a recording medium such as the FD 34 or the CD-ROM 38. When the reception program is executed by the computer main body 31, the above-described reception operation is executed. The reception program may be supplied to the computer main body 31 from another computer via the communication line and the network communication device 39.
[0065] また、上述の受信装置 30にお 、て行なわれる受信方法を、プログラムとして提供す ることもできる。このようなプログラムは、コンピュータ本体 31に付属する FD34、 CD —ROM38などのコンピュータ読取り可能な記録媒体に記録して、プログラム製品と して提供することもできる。あるいは、コンピュータ本体 31に内蔵するハードディスク などの記録媒体に記録させて、プログラムを提供することもできる。また、ネットワーク を介したダウンロードによって、プログラムを提供することもできる。  [0065] In addition, the reception method performed in the above-described reception device 30 can be provided as a program. Such a program can be recorded on a computer-readable recording medium such as the FD 34 or CD-ROM 38 attached to the computer main body 31 and provided as a program product. Alternatively, the program can be provided by being recorded on a recording medium such as a hard disk built in the computer main body 31. The program can also be provided by downloading via a network.
[0066] 提供されるプログラム製品は、ハードディスクなどのプログラム格納部にインストール されて実行される。なお、プログラム製品は、プログラム自体と、プログラムが記録され た記録媒体とを含む。また、記録媒体は FD34、 CD—ROM38に限定されるもので はなぐ磁気テープ、 MO (Magnetic Optical disk)、 MD (Mini Disk)、 DVD (Digit al Versatile Disk)、 IC (Integrated Circuit)カードなどであってもよい。  [0066] The provided program product is installed in a program storage unit such as a hard disk and executed. The program product includes the program itself and a recording medium on which the program is recorded. The recording media are not limited to FD34 and CD-ROM38. Magnetic tape, MO (Magnetic Optical disk), MD (Mini Disk), DVD (Digital Versatile Disk), IC (Integrated Circuit) cards, etc. There may be.
[0067] 今回開示された実施の形態はすべての点で例示であって制限的なものではないと 考えられるべきである。本発明の範囲は上記した説明ではなくて請求の範囲によって 示され、請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが 意図される。 [0067] The embodiments disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description but by the scope of claims, and includes meanings equivalent to the scope of claims and all modifications within the scope. Intended.

Claims

請求の範囲 The scope of the claims
[1] 送信装置(1)から通信網 (3)を介して送信されたデータを受信する受信装置 (2)で あって、  [1] A receiving device (2) for receiving data transmitted from a transmitting device (1) via a communication network (3),
受信したデータを順次蓄積するデータ蓄積手段 (23)、  Data storage means for sequentially storing received data (23),
前記データ蓄積手段 (23)に蓄積されたデータ量が予め定められた第 1の基準値 を超えたことに応じて前記データ蓄積手段 (23)に蓄積されたデータを順次取出す データ出力手段(24)、および  Data output means (24) for sequentially taking out the data stored in the data storage means (23) in response to the amount of data stored in the data storage means (23) exceeding a predetermined first reference value ),and
前記データ蓄積手段(23)のデータ量が増加するように前記データ出力手段(24) のデータ取出し速度を予め定められた速度に設定し、前記データ蓄積手段(23)の データ量が前記第 1の基準値よりも高い予め定められた第 2の基準値を超えた場合 は所定の時間だけ前記データ出力手段(24)のデータ取出し速度を高くする制御手 段 (25, 26)を備える、受信装置。  The data output speed of the data output means (24) is set to a predetermined speed so that the data amount of the data storage means (23) increases, and the data amount of the data storage means (23) is set to the first value. And a control means (25, 26) for increasing the data output speed of the data output means (24) for a predetermined time when a second predetermined reference value higher than the reference value is exceeded. apparatus.
[2] 前記第 1の基準値は、前記通信網(3)のジッタを吸収するために必要なデータ量で ある、請求項 1に記載の受信装置。 [2] The receiving device according to claim 1, wherein the first reference value is a data amount necessary to absorb jitter of the communication network (3).
[3] 前記予め定められた速度は、前記データ蓄積手段(23)のデータ量が時間比例し て増加するように設定されて 、る、請求項 1に記載の受信装置。 [3] The receiving device according to claim 1, wherein the predetermined speed is set so that a data amount of the data storage means (23) increases in proportion to time.
[4] 前記所定の時間だけ高くされた前記データ出力手段(24)のデータ取出し速度は、 前記送信装置(1)のデータ送信速度よりも速!、、請求項 1に記載の受信装置。 [4] The receiving device according to claim 1, wherein the data output speed of the data output means (24) increased by the predetermined time is faster than the data transmission speed of the transmitting device (1).
[5] 前記所定の時間は、前記データ蓄積手段(23)のデータ量と前記第 1の基準値との 差に応じて長くなる、請求項 1に記載の受信装置。 [5] The receiving device according to claim 1, wherein the predetermined time becomes longer according to a difference between a data amount of the data storage means (23) and the first reference value.
[6] 前記所定の時間と前記データ出力手段(24)のデータ取出し速度の増加量との積 は、前記データ蓄積手段(23)のデータ量と前記第 1の基準値との差に等しい、請求 項 5に記載の受信装置。 [6] The product of the predetermined time and the increase amount of the data output speed of the data output means (24) is equal to the difference between the data amount of the data storage means (23) and the first reference value. The receiving device according to claim 5.
[7] 前記制御手段(25, 26)は、 [7] The control means (25, 26)
予め定められた周波数のクロック信号を発生するクロック発生手段(25)、 前記クロック信号のパルス数をカウントし、そのカウント値に基づいてデータの取出 しタイミングを決定するカウント手段(26)、および  A clock generating means (25) for generating a clock signal having a predetermined frequency, a counting means (26) for counting the number of pulses of the clock signal and determining a data extraction timing based on the count value;
前記所定の時間だけ前記カウント手段(26)のカウント値を増加させて前記データ の取出しタイミングを早くするカウント値変更手段(26)を含む、請求項 1に記載の受 信装置。 The count value of the counting means (26) is increased by the predetermined time and the data The receiving device according to claim 1, further comprising: a count value changing means (26) for accelerating the take-out timing.
[8] 前記予め定められた速度は、前記送信装置(1)のデータ送信速度の誤差範囲と前 記クロック信号の周波数の誤差範囲とに基づいて、前記データ蓄積手段(23)のデ ータ量が増加するように定められている、請求項 7に記載の受信装置。  [8] The predetermined speed is determined based on the data transmission speed error range of the transmission device (1) and the clock signal frequency error range, based on the data storage means (23). The receiving device according to claim 7, wherein the amount is determined to increase.
[9] 前記制御手段(25, 26)は、 [9] The control means (25, 26)
予め定められた周波数のクロック信号を発生するクロック発生手段(25)、 前記クロック信号のパルス数をカウントし、そのカウント値に基づいてデータの取出 しタイミングを決定するカウント手段(26)、および  A clock generating means (25) for generating a clock signal having a predetermined frequency, a counting means (26) for counting the number of pulses of the clock signal and determining a data extraction timing based on the count value;
前記所定の時間だけ前記クロック信号の周波数を増加させて前記データの取出し タイミングを早くするクロック変更手段(26)を含む、請求項 1に記載の受信装置。  The receiving apparatus according to claim 1, further comprising clock changing means (26) for increasing the frequency of the clock signal by the predetermined time to thereby advance the data extraction timing.
[10] 前記受信装置(1)が受信するデータは所定のデータ単位ごとにタイムスタンプ値を 含み、 [10] The data received by the receiving device (1) includes a time stamp value for each predetermined data unit,
前記データ蓄積手段(23)に蓄積されたデータ量は、蓄積された先頭のデータのタ ィムスタンプ値と最後尾のデータのタイムスタンプ値との差に基づいて求められる、請 求項 1に記載の受信装置。  The amount of data stored in the data storage means (23) is determined based on a difference between a time stamp value of the stored first data and a time stamp value of the last data, according to claim 1. Receiver device.
[11] 送信装置(1)から通信網(3)を介して送信されたデータを受信する受信装置 (2)に おける受信方法をコンピュータに実行させる受信プログラムであって、 [11] A reception program for causing a computer to execute a reception method in a reception device (2) that receives data transmitted from a transmission device (1) via a communication network (3),
受信したデータを前記受信装置 (2)のバッファ(23)に順次蓄積する第 1のステップ (S11〜S15)、  A first step (S11 to S15) for sequentially storing received data in the buffer (23) of the receiver (2);
前記バッファ(23)に蓄積されたデータ量が予め定められた第 1の基準値を超えた ことに応じて前記バッファ(23)に蓄積されたデータを順次取出す第 2のステップ (S2 1〜S27)、および  A second step (S21 to S27) for sequentially taking out the data stored in the buffer (23) in response to the amount of data stored in the buffer (23) exceeding a predetermined first reference value. ),and
前記バッファ(23)のデータ量が増加するように前記第 2のステップにおけるデータ 取出し速度を予め定められた速度に設定し、前記バッファ(23)のデータ量が前記第 1の基準値よりも高い予め定められた第 2の基準値を超えた場合は所定の時間だけ 前記第 2のステップのデータ取出し速度を高くする第 3のステップ (S31〜S44)を実 行させる、受信プログラム。 請求項 11に記載の受信プログラム(SI 1〜S15, S21-S27, S31〜S44)を記録 した、コンピュータ読み取り可能な記録媒体。 The data extraction speed in the second step is set to a predetermined speed so that the data amount of the buffer (23) increases, and the data amount of the buffer (23) is higher than the first reference value A reception program for executing a third step (S31 to S44) for increasing the data extraction speed of the second step for a predetermined time when a predetermined second reference value is exceeded. A computer-readable recording medium on which the receiving program (SI 1 to S15, S21 to S27, S31 to S44) according to claim 11 is recorded.
PCT/JP2005/013494 2004-07-30 2005-07-22 Receiving device, receiving program and recording medium with receiving program recorded therein WO2006011426A1 (en)

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