1293189. ’九、發明說明： -【發明所屬之技術領域】 本發明係有關於一種半導體元件之薄化方法，尤指一 種晶圓薄化方法。 【先前技術】 随著电子產業的蓬勃發展，電子產品亦逐漸邁入多功 能、高性能的研發方向’以滿足半導體封裝件高積集度 (Integration)及微型 t(Miniaturizati〇n)的封裝需 ^， 為求提昇單—半導體封裝件之性能與容量，以符電子產 σσ小型化、大容量與高速化之趨勢，習知多半係將半導體 封衣件以多晶片杈組化（Multi Chip M〇dule ;河⑽）的形 式呈現，此種封裝件亦可縮減整體封裝件體積並提昇電性 功能，遂而成為一種封裝的主流，其係在單一封裝件之晶 片承載件上接置至少兩半導體晶片（semi c〇nduct〇r ΘΒ chip) ’且每一晶片與晶片承載件（chiper)間均係以 鲁垂直堆豐（stack)方式接置。如美國專利第5, 793, 1 〇8所揭 示者，為提供可在現有封裝結構下堆疊多晶片，即需將晶 片進行磨薄至2〜4mils，藉以達到高積集度及微型化之需 求。 请蒼閱第1A至1D係圖，係為美國專利第6, 159, 〇71 及6, 527, 627號所揭示之傳統晶片研磨方法。首先將一欲 進行薄化之晶圓10主動面（active surface)1〇1接置於一 胗片（tape)141上（如第ία圖所示）；接著利用研磨輪a 研磨該晶圓10非主動面102(如第1B圖所示）；再將研磨 5 18965 1293189 •完成之晶圓ίο以其非主動面102黏置於切割框架15之膠 片14 2上，接著將黏貼於晶圓1 〇主動面1 〇 1上之膠片141 移7 (如f 1C圖所示）；之後即可將該黏置於切割框架15 之二圓10廷至切割機具進行切單（如第1D圖所示），以供 後續形成複數晶片。 二准於岫述製程中，在晶圓1 〇非主動面1 02研磨後， /日日圓10吊因應力殘留問題而發生翹曲現象（如第i C及 1D圖所不），如此不僅造成後續移除膠片及晶圓切割等作 業困擾’甚者造成晶圓破裂等問題。 。。再者，凊蒼閱第2圖所示，於該晶圓1〇完成研磨並 切早形成複數晶片1QQ後，即可進行置晶（dieb。⑹作業， 其主要將複數完成切單且黏貼於膠片142上之晶片1〇〇, 頁針16頂抵黏貼於該晶片1〇〇背面之膠片Η?，藉 二，忒Βθ片侍以脫離膠片142，同時於該晶片上利用 =取頭Π ’以吸取該晶片⑽，以供將其接置於晶片承 _ 。相關技術係可參閱美國專利第5, 41 U21號所揭 示者。 、—.隹在上述置晶過程中，因該晶片1〇〇經研磨後之厚度 過涛’因此在置晶過程中頂針16將晶片外頂出谬片⑷ 以1、擷取頭17吸取時，極易導致晶片刚產生破裂$，甚 而因該晶片過薄，亦可能在該擷取頭17將晶片100接置於 晶片承載件上時發生裂損問題。 另明筝閱第3A至3D圖，係為美國專利第5, 888, 883、 ’ 〇83’ 381、6, 264, 535號所揭露另-種晶圓研磨技術，首 18965 6 1293189 片24:日:圓’°以其非主動面202 *置於切割框架25之膠 ’亚於該晶圓20主動面2〇1對應各晶片2〇〇間進 订切吾丨j至預定浮声，柏火土 +1293189. </ RTI> </ RTI> </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; [Prior Art] With the rapid development of the electronics industry, electronic products are gradually entering the multi-functional, high-performance research and development direction to meet the high integration of semiconductor packages and the packaging requirements of micro-t (Miniaturizati〇n) ^, In order to improve the performance and capacity of single-semiconductor packages, the trend of miniaturization, large capacity, and high speed of electronic products σσ is common. Multi-chip semiconductor packages are often grouped (Multi Chip M). In the form of 〇dule; River (10)), such a package can also reduce the volume of the overall package and enhance the electrical function, thereby becoming a mainstream of the package, which is connected to at least two of the wafer carriers of the single package. A semiconductor wafer (semi-c〇nduct〇r ΘΒ chip)' and each wafer and a chip carrier are connected in a vertical vertical stack. As disclosed in U.S. Patent No. 5,793,1,8, in order to provide a multi-wafer stack under the existing package structure, the wafer needs to be thinned to 2 to 4 mils, thereby achieving high integration and miniaturization. . Please refer to Figures 1A to 1D for a conventional wafer polishing method disclosed in U.S. Patent Nos. 6, 159, 〇 71 and 6,527, 627. First, an active surface of the wafer 10 to be thinned is placed on a tape 141 (as shown in FIG. 355); then the wafer 10 is polished by the grinding wheel a. Inactive surface 102 (as shown in FIG. 1B); then polished 5 18965 1293189 • Finished wafer ί is adhered to film 14 2 of cutting frame 15 with its inactive surface 102, and then adhered to wafer 1胶片The film 141 on the active surface 1 〇1 is moved 7 (as shown in f 1C); then it can be placed on the cutting frame 15 to the cutting machine to cut the sheet (as shown in Figure 1D). ) for subsequent formation of a plurality of wafers. In the process of narration, after the wafer 1 〇 inactive surface 102 is ground, the Japanese yen 10 crane is warped due to stress residual problems (such as in the iC and 1D figures), so Subsequent removal of film and wafer cutting operations has caused problems such as wafer rupture. . . Furthermore, as shown in Fig. 2, after the wafer 1 is finished and the plurality of wafers 1QQ are formed early, the crystal can be crystallized (dieb. (6), which mainly performs the dicing and pasting on the plurality of wafers. On the film 142, the wafer 1 is affixed to the film 黏 on the back side of the wafer 1 , and the θ θ film is used to detach the film 142 while using the head on the wafer. The wafer (10) is sucked to be attached to the wafer carrier. The related art is disclosed in U.S. Patent No. 5,41 U21, which is incorporated in the above-mentioned crystallizing process. The thickness of the crucible after grinding is too high. Therefore, during the crystallization process, the ejector pin 16 is ejected from the wafer outside the wafer (4), and the picking head 17 is sucked, which easily causes the wafer to be cracked, even because the wafer is too thin. It is also possible that the chipping problem occurs when the wafer head 100 is attached to the wafer carrier by the picking head 17. The other drawings are 3A to 3D, which are U.S. Patent No. 5, 888, 883, '〇83'. Another type of wafer grinding technology is disclosed in 381, 6, 264, 535, the first 18965 6 1293189 piece 24: day: round '° is not Gum * 202 disposed movable surface 25 of the cutting frame 'in the sub-active surface of the wafer 20 into the custom 2〇〇 2〇1 correspondence between each wafer cut to a predetermined float j I Shu sound, fire clay Bo +
、二一。未元王为離各該晶片200(如第3A • ” 妾者於該晶圓20主動面201上黏貼一膠片 2曰42圓斤示);再將該切割框架25移除，並進行該 Γ非主動面202之研磨至對應先前切割之預定深度， ==離各該晶片2〇。(如第3C圖所示);之後將全部 之膠片置晶框架252之勝片243上，並移除先前 42(如弟3D®所示），以利後續置晶作業之進行。 7於雨述製程中，雖可利用先切割晶圓至預定厚度再進 订研磨方式，來減少研磨薄化後所造成晶圓龜曲及破裂問 題^然當晶片已薄化至2〜4心時，或更薄至㈣時，由 於，片厚度過薄，因此將膠片自晶片主動面移除時即易造 成晶片裂損。 況且’後續於置晶作業時，仍需利用頂針將經薄化之 晶片外頂出膠片以供擷取頭吸取，是以依舊無法解決過薄 晶片於置晶過程中所造成之晶片破裂問題。 θ因此，如何提供晶圓有效進行薄化作業之技術，以達 提升$程信賴性及、簡化製程步驟及降低製程成本之目 的’貫為目前亟待處理之課題。 【發明内容】 鑒於以上所述習知技術之缺點，本發明之主要目的係 提供-種晶圓薄化方法’避免晶圓非主動面研磨後，因應 力殘留問題而發生翹曲及破裂等問題。 18965 7 Ϊ293189 本毛月之另目的係提供一種晶圓薄化方法，避免因 該晶片經研磨後之厚度過薄，而在置晶過程中發生晶片破 裂問題。 本發明之又一目的係提供一種晶圓薄化方法，避免薄 化完成後，將膠片移除時造成晶片裂損問題。 本毛月之#目的係提供—種晶圓薄化方法，係可處 理極薄化至lmi 1之晶片。 為達上揭及其它目的，本發明之晶圓薄化方法，係包 括：提供-具有主動面及相對非主動面之晶圓，且該晶圓 係包含有稷數晶片，以將—透光載體與該晶圓主動面進行 黏合’沿各該晶片間切割該透光載體及晶圓至晶圓之預定 ，度^讀化該晶圓之非主動面至先前所切割之預定深 度，進而分離各該晶片。 其後即可將表面黏著有透光載體之晶片直接接置於 ;;η: ί:稭以避免過薄晶片於置晶過程中發生破裂 問通’接者再絲韻絲—進行晶韵晶：承載件間 之電性連接。《中，該透光載體可為透明塑膠板、玻璃板 或透明與™外線光固化膠⑽膠）或熱收== 主動面上，故在移除該透光載體時僅需透過 外光知、射或加熱方式即可輕易移除。 ’、 因此，本發明之晶圓薄化方法，主要 承載;圓，以提供晶圓穩固支禮，避免晶圓在傳ΐ:: f研“=產生破裂，再對該透光載體及晶圓^行^ 告j進而將曰曰圓切剔至預定之深度，而後再進行如研磨之 18965 8 1293189 薄化程序，藉以避免晶圓研磨後，因應力殘留問題而發生 輕曲及破裂等問題，同時可處理極薄化至1 m i 1之晶片，而 無因晶片過薄所造成處理上之困擾及晶片破損等情況。 【實施方式】 以下係藉由特定的具體實施例說明本發明之實施方 式，熟習此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點與功效。本發明亦可藉由其他不同 的具體實施例加以施行或應用，本說明書中的各項細節亦 _可基於不同觀點與應用，在不悖離本發明之精神下進行各 種修飾與變更。 請參閱第4A至4D圖所示，係為本發明之晶圓薄化方 法剖面示意圖。 如第4A圖所示，首先提供一具主動面4〇1及相對非 面402之晶圓40,該晶圓40係包含有複數晶片4〇〇， 該晶圓40主動面401上對應各晶片4〇〇處形成有複數連接 上400a，以作為該晶片4〇〇内部電路之輸入/輸出端，並 =一透光載體41與該晶圓40主動面4〇1間藉由—例如紫 夕線光固化膠（uv膠）或熱收縮膠之黏著層42進行黏人， ::晶圓4。係以其非主動面而貼合於—膠片:心。 八13亥透光载體41可例如為硬質之透明塑脒;^ # 板’亦或為透明膠等，該透光載體41之厚;:板為或〇玻:丨 較佳為0.6_。 勺為0.4〜1_’ 如第4B圖所示，利用切割刀且48 VL夂 切到贫方+ a ” 8 /口各该晶片400間 〜、光載體41及晶圓4 0，以切割至哕a n 口』王々日日圓4〇之預定 18965 9 1293189 珠度’其中該晶圓4G預定切割形成之深度約為後續所 得溥化晶片之厚度。其中由於使用該透光载體Ο，因料 供便於進行辯識晶片4〇〇位置以利切割作業進行。 如第4C圖所心移除該切割完成晶圓40非主動面4〇2 上之膠#441，並於該透光載體41上貼附另-膠片442, =用研磨輪43等方式對該晶圓4〇之非主動面術進行 離各;二Γ:厚其度 二’㈣一研二 貝接置於♦片上而於研磨後因應 曲及破裂等問題。 1等致之日日囡翘 接置Γ二_示’將該完成薄化且相互分離之晶片400 ^ 5 5之㈣443上’並移除切黏附於透 先载體^上之膠片442，以便進行後續置晶製程。 相互:::：A，至進5:置::顯示將本發明中完成薄化且 將f面#^古* 衣程之刮面示意圖，其係直接 之晶片接置於晶片承載件上，藉《 透光#/、置"過程中發生破裂問題，接著再移除該 精晶#與晶片承载件社電性連接。 體:β :Γ，將該完成分離且黏著有透光載 背面之膠片：Γ頁針 β寺於哕曰片4ηη稭玄晶# 400得以脫離膠片443,同 丁、0系日日片4 0 〇上利用一姻而1 d。 將其透過—如妒 °碩7吸取該晶片400，以供 •之黏著劑51而接置於晶片承載件5〇 ]〇 18965 1293189 上，該2片承載件5〇可例如為基板或導線架等。 :第5C及5D圖所示，對應該透光載體“黏著於晶 用之例如紫外線光固化膠⑽冑）或熱收縮膠 質’而使用紫外光照射或加熱等方式，以使 口亥部占者層4 2之黏性彝生 _ . 曰ΰ 〜 '"失，俾進一步將該透光載體41自該 Β曰曰Ηιηη ί分離亚加以移除’以供後續利用鲜線52而將該 日曰 包性連接至該晶片承載件5〇上。 接接：：曰^明係先將該表面預黏有透光載體之晶片直 /曰；曰曰纟載件上，之後再移除該透光載體’以供後 ^打晶片與晶片承載件間之電性連接，藉 =過針直接將過薄晶片黏置於W承載上時發生破裂問 碭。冋日守透過該透光載體之承載使用係可供處理極薄化至 11之:曰^ ’以避免過薄晶片於製程中發生破損問題。 另明蒼閱第6A及6B圖，係為顯示將本發明中完成薄 化且相互分離之晶片’進行置晶及疊晶製程之剖面示音圖。 如第6A圖所示，其係以如同第5A至5C圖之方^， 先將-完成薄化之第一晶片611接置於一晶片承編〇 上，並移除設於該第-晶片611主動面上之透光載體621。 如弟6B圖所示，再將另一完成薄化之第二晶片612 接置於該第一晶片611上，並移除設於該第二晶片⑽主 ，面上=透光載體622,之後即可透過打線作業，以使該 第-及第二晶片61 電性連接至該晶片承載件⑽〇 " 另外，應特別注意者’在完成晶圓薄化製程後，並於 進行置晶作業前’係可在對應該晶圓非主動面上預貼一黏 ]] 18965 1293189 著層，如此即可在進行晶片置晶作業時 於晶片承載件上。 受竹日日月黏者 氣葡曰鬥“明之Βθ圓薄化方法，主要係利用透光载體 承載b曰圓，以提供晶圓穩固支撐，避免晶 版 及研磨薄化中產生破裂， 、，廷、切割 叫^ 座玍反衣再對该透光載體及晶圓進 u將:②圓切割至預定之深度，而後再進行如研磨之 ;專私序，猎以避免晶圓研磨後，因應 麵曲及破裂等問題，同時可處理極薄化至㈤之曰/§生 -因晶片過薄所造成處理上之困擾及晶片破損等;況。而 月首ΓΓ’於後續$程中即可將表面黏著有透光载，之曰 " 置於晶片承載件上’藉以避免過薄晶片於置曰： =生破裂問題，接著再移除該透光载體以進行曰;： 日日片承載件間之電性連接。 日日片舁 4上述實施例僅係例示性說明本發明之原理及 :不限制本發明’任何熟習此項： 在不延背本發明之精 士均丁 與改變。_ h施例進行修掷 Γ 本發明之權利保護範圍，>如#心由主 專利範圍所列。I如後述之申請 【圖式簡單說明】 圖係為習知晶圓薄化方法之剖面示意圖； :圖如為“口置晶作業之剖面示意圖； 圖;弟3A至3D圖係為另—f知晶圓薄化方法之剖面示意 第4A至4D圖係為本發明之晶圓薄化方法之剖面示意 18965 12 1293189 圖； 中完成薄化且相互分 ;以及 中完成薄化且相互分 示意圖。 第5A至5D圖係為顯示將本發明 離之晶片進行置晶製程之剖面示意圖 第6A及6B圖係為顯示將本發明 離之晶片進行置晶及疊晶製程之剖面 【主要元件符號說明】 10 晶圓 101 主動面 馨1〇2非主動面 研磨輪 141，142 膠片 15 切割框架 16 頂針 17 擷取頭 S 破裂 20 晶圓 200 晶片 201 主動面 202 非主動面 241，242, 243 膠片 25 切割框架 252 置晶框架 401 主動面 402 非主動面 18965 13 1293189 41 透光載體 42 黏著層 441，442, 443 膠片 43 研磨輪 45 置晶框架 46 頂針 47 操取頭 48 切割工具 • 50 晶片承載件 51 黏著劑 52 銲線 60 晶片承載件 611 第一晶片 612 笫二晶片 621，622 透光載體Two ones. The unfinished king removes a film 2曰42 from the wafer 200 (such as the 3A • ” on the active surface 201 of the wafer 20; and then removes the cutting frame 25 and performs the Γ The non-active surface 202 is ground to a predetermined depth corresponding to the previous cut, == 2 离 from each of the wafers (as shown in FIG. 3C); then all of the film is crystallized on the winning frame 243 of the frame 252 and removed. Previous 42 (as shown by the brother 3D®), in order to facilitate the subsequent crystallizing operation. 7 In the rain process, although the wafer can be cut to a predetermined thickness and then the grinding method can be used to reduce the grinding and thinning. Causes the problem of wafer tort and rupture. However, when the wafer has been thinned to 2 to 4 hearts, or thinner to (4), since the thickness of the sheet is too thin, it is easy to cause the wafer to be removed from the active surface of the wafer. Cracking. Moreover, in the subsequent crystallizing operation, it is still necessary to use a thimble to eject the film from the thinned wafer for the extraction head to take up, so that the wafer caused by the thin wafer in the crystallization process cannot be solved. The problem of rupture. θ Therefore, how to provide the technology for effective wafer thinning operation The purpose of reliability, simplification of process steps, and reduction of process cost is a problem to be solved at present. [Disclosed] In view of the above disadvantages of the prior art, the main object of the present invention is to provide a wafer thinning method. 'Avoiding warpage and cracking due to stress residual problems after wafer inactive surface grinding. 18965 7 Ϊ293189 Another objective of this month is to provide a wafer thinning method to avoid the thickness of the wafer after grinding. The problem of wafer rupture occurs during the crystallization process. Another object of the present invention is to provide a wafer thinning method which avoids the problem of wafer cracking when the film is removed after the thinning is completed. The purpose of the present invention is to provide a wafer thinning method for processing wafers that are extremely thinned to lmi 1. For the purpose of achieving the above and other objects, the wafer thinning method of the present invention comprises: providing - having an active surface and a wafer that is relatively inactive, and the wafer includes a number of wafers to bond the light-transmissive carrier to the active surface of the wafer. The light-transmissive carrier and the wafer are cut along the wafers. To the predetermined time of the wafer, the inactive surface of the wafer is read to a predetermined depth previously cut, thereby separating the wafers. Thereafter, the wafer having the light-transmitting carrier adhered to the surface is directly placed; η: ί: straw to avoid cracking of the thin wafer during the crystallizing process. The contact is followed by the silk thread - the crystal crystal: the electrical connection between the carriers. In the light transmission carrier can be transparent Plastic plate, glass plate or transparent and TM external light curing adhesive (10) glue) or heat receiving == active surface, so when removing the light-transmitting carrier, it can be easily removed by external light, radiation or heating. Therefore, the wafer thinning method of the present invention mainly carries; round to provide a stable support for the wafer, and avoids the wafer being transferred:: f research "= cracking, and then the transparent carrier and crystal The circle ^ line ^ tells j to cut the circle to the predetermined depth, and then the thinning process of 18965 8 1293189, such as grinding, to avoid problems such as light bending and cracking due to stress residual after wafer polishing. At the same time, it can process wafers that are extremely thin to 1 mi 1 without the wafer being too thin Cause distress situation on the processing and wafer breakage. [Embodiment] The embodiments of the present invention will be described by way of specific examples, and those skilled in the art can readily understand other advantages and effects of the present invention from the disclosure of the present disclosure. The present invention may be embodied or applied in various other specific embodiments, and various modifications and changes may be made without departing from the spirit and scope of the invention. Please refer to Figures 4A to 4D for a cross-sectional view of the wafer thinning method of the present invention. As shown in FIG. 4A, a wafer 40 having an active surface 4〇1 and a relatively non-surface 402 is provided. The wafer 40 includes a plurality of wafers 4, and the wafer 40 has an active surface 401 corresponding to each wafer. 4 形成 is formed with a plurality of connections 400a as the input/output terminals of the internal circuit of the wafer 4, and = between the transparent carrier 41 and the active surface 4 of the wafer 40 - for example, Zi Xi The line-curing adhesive (uv glue) or the heat-shrinkable adhesive layer 42 is adhered, :: wafer 4. It is attached to the film by its non-active surface: the heart. The octagonal transparent carrier 41 can be, for example, a rigid transparent plastic cymbal; the ^ plate is also a transparent plastic or the like, and the transparent carrier 41 is thick; the plate is or 〇 glass: 较佳 is preferably 0.6 。. The scoop is 0.4~1_' as shown in Fig. 4B, using a dicing blade and 48 VL cut to the poor side + a ” 8 / port each of the wafers 400, the optical carrier 41 and the wafer 40 to cut to 哕An mouth 』 々 々 々 日 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 965 It is convenient to identify the position of the wafer to facilitate the cutting operation. The glue #441 on the inactive surface 4〇2 of the cut finished wafer 40 is removed as shown in FIG. 4C, and is pasted on the transparent carrier 41. Attached - film 442, = the non-active surface of the wafer 4 by the grinding wheel 43, etc.; two: thickness two degrees (four) one research two shells placed on the ♦ sheet and after the grinding Problems such as koji and rupture. 1 etc. The 囡 囡 接 Γ _ _ ' ' 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 完成 400 400 400 400 400 400 400 400 400 400 400 400 400 400 400 Film 442 on the screen for subsequent crystallization process. Mutual::::A, to 5::: display will be thinned in the present invention and will be f-face #^古* Schematic diagram of the scraping surface of the process, which is directly attached to the wafer carrier, and the problem of cracking occurs during the process of "transparency #/," and then removes the fine crystal # and the wafer carrier. Connection: Body: β: Γ, the separation and adhesion of the film with the light-transmissive back: the Γ 针 β 寺 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 〇 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸 吸The carrier member 5 can be, for example, a substrate or a lead frame. etc.: As shown in FIGS. 5C and 5D, ultraviolet light is used corresponding to the light-transmitting carrier "adhering to a crystal such as ultraviolet light-curing adhesive (10) or heat-shrinkable glue" Irradiation or heating, etc., so that the viscous agglomeration of the occupant layer 4 2 _ 曰ΰ ~ '" Loss, 俾 further shifts the light-transmitting carrier 41 from the Β曰曰Ηιηη ί The package is attached to the wafer carrier 5〇 except for the subsequent use of the fresh wire 52.接接:: 曰 ^ Ming first pre-adhered the surface of the wafer with the light-transmissive carrier straight / 曰; 曰曰纟 on the carrier, then remove the transparent carrier 'for the wafer and wafer carrier The electrical connection between the two causes a crack when the over-wafer is directly attached to the W-bearing. The load-bearing use of the light-transmissive carrier can be extremely thinned to 11: 曰^' to avoid damage to the thin wafer during the process. Further, the drawings of Figs. 6A and 6B are sectional views showing the crystallizing and lamination process of the wafer which is thinned and separated from each other in the present invention. As shown in FIG. 6A, the first wafer 611 which is thinned out is first placed on a wafer carrier and removed from the first wafer, as shown in FIGS. 5A to 5C. The transparent carrier 621 on the active surface of 611. As shown in FIG. 6B, another thinned wafer 612 is placed on the first wafer 611, and removed from the main surface of the second wafer (10), the light transmissive carrier 622, and then The first and second wafers 61 can be electrically connected to the wafer carrier (10) by a wire bonding operation. In addition, special attention should be paid to 'after the wafer thinning process is completed, and the crystallizing operation is performed. The front 'system can be pre-applied to the inactive surface of the wafer] 18965 1293189, so that it can be placed on the wafer carrier during wafer lithography. The method of thinning and thinning of the qi 曰 “ “ “ “ “ “ “ “ “ “ “ “ “ “ “ “ “ “ “ “ 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆 圆, the court, the cut is called the seat 玍 玍 再 and then the light carrier and the wafer will be: 2 round cut to a predetermined depth, and then such as grinding; private order, hunting to avoid wafer grinding, In response to problems such as surface warpage and cracking, it can also be processed to extremely thinning to (5) §/§生--the processing trouble caused by the wafer being too thin and the wafer damage; etc. The surface can be adhered with a light-transmissive load, and then placed on the wafer carrier to avoid excessive thin wafers on the substrate: = cracking problem, and then remove the light-transmissive carrier for 曰; Electrical connection between the sheet carriers. The above-mentioned embodiments are merely illustrative of the principles of the present invention and are not intended to limit the invention 'any familiarity with the matter: Change. _ h example to carry out the roll Γ the scope of protection of the present invention, > The main patent scope is listed. I apply as described later [Simple description of the drawings] The diagram is a schematic cross-sectional view of the conventional wafer thinning method; : The figure is a schematic diagram of the cross-section of the crystal; Figure 3; Figure 3A to 3D 4A to 4D are cross-sectional schematic diagrams of the wafer thinning method of the present invention, 18965 12 1293189; the thinning is completed and divided; and the thinning is completed and Schematic diagrams of each other. 5A to 5D are cross-sectional views showing the crystallization process of the wafer from which the present invention is applied. Figs. 6A and 6B are diagrams showing the crystallization and lamination process of the wafer from which the present invention is removed. 10 wafer 101 active surface 〇1〇2 inactive surface grinding wheel 141, 142 film 15 cutting frame 16 thimble 17 picking head S rupture 20 wafer 200 wafer 201 active surface 202 inactive surface 241, 242, 243 film 25 cutting Frame 252 Crystallization frame 401 Active surface 402 Inactive surface 18965 13 1293189 41 Light transmissive carrier 42 Adhesive layer 441, 442, 443 Film 43 Grinding wheel 45 Crystallizing frame 46 Thimble 47 Operating head 48 Cutting tool • 50 Wafer carrier 51 Adhesive 52 bonding wire 60 wafer carrier 611 first wafer 612 second wafer 621, 622 transparent carrier