TW594488B - Single-chip flash memory control system by using common bus to turn on the external ROM - Google Patents

Abstract

A single-chip flash memory control system by using common bus to turn on the external ROM is introduced. It comprises an external ROM for program code storage, at least a flash memory to be a data storage unit and a single-chip flash memory control IC that at least consists of a switch module and microprocessor. The external ROM and each flash memory connect the switch module through the same data and address buses, and the switch module connects the microprocessor to let the microprocessor control the switch module. The microprocessor is connected to the ROM channel, so it can read the program code stored in the external ROM. Or, the control switch module is controlled to connect the microprocessor and flash memory channel to access the data of flash memory. Therefore, through the common data and the address buses between the external ROM and flash memory, no additional pins are needed for connecting the single-chip IC with the external ROM. Production cost is reduced and the die size of the single-chip IC is not increased.

Description

594488 Fifth, the description of hair bun (〗)

[Technical field to which the invention belongs J. The present invention is to provide a single-chip flash memory control system that enables external read-only-memory in a shared bus mode, especially outside the system ^ = flash memory of memory and stored data The system uses the same data and bits to connect the bus to the microprocessor of the system, so that the system does not need to add additional pins for each flash memory connection, which can reduce production costs and incompatibility: Its volume use. "Previous technology" By now, with the advancement of science and technology and the advancement of semiconductor technology, circuit systems can be integrated with the emergence of multifunctional single-chip integrated circuits included in the same integrated circuit sophomore so that =, Body reed reduces production cost, and moves towards—smaller, more compact, and cheaper. Toward a block diagram of === road Γ slice, a way to read the program of the microprocessor Upper: Department? 21 is a line that can be established through the two circuits 10: Code Mu ί :: Using the single chip integrated body 2 (...) preset i; Chengbu read-only memory! Integrated circuit! 0 External pins (pf: pin factory) pass the single-chip memory 1 3 (R Ο Μ), in order to facilitate the J * received external read-only program, but in some special =; Memory " 1 3 is unavoidable. For example, post two, external read-only memory application, or internal only memory: the memory of the read-only memory is not done. Brother owes you: ΛΆ _ ·, _ · _! '594488 V. Description of the invention (2) Received external read-only memory ± 3 to the male ^ code, so, Part of the star = Adjusted microprocessor 1 1 The way to connect to the external read-only memory ". The integrated circuit 1 0 is reserved. Generally speaking, the single chip integrated Thunder II α is rewritable. The read-only memory used by flash read is detachable and non-rewriteable (FLA s HROM), and the use of flash read-only memory is jealous: Qiaoti (MASK ROM can be used for numbness) The early positive chip integrated circuit of the mind and body has the advantage that it can be adjusted or updated based on the requirements of Γρ. The price of # 22 is for upgrading the product. However, this flash only Read memory list S = Fenyi increases production cost; while using the shielded read-only memory but the β integrated circuit 'its advantage lies in its low manufacturing cost and low price, the department can not replace the microprocessor code. | ^ | Dagger, and dream. 4Go to the second picture_ There is a solution that combines the above advantages. Please refer to the first block diagram of other doors = i is a conventional single-chip block diagram, that is, the volume of the single-crystal I-shirt Body circuit 2 〇 Low-cost internal read-only connection ^ I1 (MASK ROM) In addition, the flash-only read-only memory 2 2 (FLASHR 〇 Μ) of the shelter is used for this ^, the function of the original single ^ flash memory volume body circuit 20, the female body 2 丄, which can be used under normal circumstances Cheaper read-only memory of the power of 20 special circumstances and want to improve the single chip flash memory volume and new micro-electronics; here: you can use external flash read-only memory 2 2 to ! The code of the circuit P η = 2 3 to enhance the original function of the single-chip flash memory volume.…… The single-chip flash memory volume body circuit 2 0 In addition to the main body circuit The various previous technologies that are mainly used in the development of memory are mainly designed to control the body and read only the external materials and positions (P. In view of the manufacturing experience of the previous practice, it is necessary to explain the many shortcomings of the chip's flash technology. The system can provide memory. In addition to the read-only memory, the external read-only bus, I Ν pin), 2 on the PIN pin), you need to connect to a plurality of = flash memory 2 5 (FLASH smart Body pin (p JN pin), and pin (P Ϊ) N pin), so that the number of pins (piN pin) of the single body circuit 20 is not ^: a considerable number of pins (PIN pin) can be the same as the external flash read-only memory 2 2 and each Flash inspection ^ makes it necessary to use a larger chip package, that is, manufacturing = °, increase in volume and also take up a larger use of space 疋 using early chips and technology to accumulate lost memory through unknown memory. A type of operating system that uses the same flash memory to share the same memory with the same processor at the same time. V. Description of the invention (3) Connection to the machine terminal

Memory Flash-read-only memory chip Flash memory is sufficient, and it is necessary to connect the host-side memory 2 5 at the same time, which is the lack of production cost points [Inventive content] Therefore, according to its careful research and improvement Afterwards, the external read-only recording will not be able to eliminate the form of the present invention, so that the flash memory and the external 'can still provide the lack and deficiency of the connection using the same address bus according to the foregoing. The above-mentioned researches and experiments used the bus method to start the system's invention. The user of the bus was connected quickly, and the flash memory data was synchronized. Each flash memory will use this data and the processor in operation,

594488 V. Description of the invention (4). ____ = Turn on the external read-only memory and the flash memory t to activate the time, so _: device = when the program memory of the external read-only memory is taken, do not start fast; = ,,, When accessing the data of ㈣ 记 ㈣, the money is processed ^ wait for not to read the code of the external read-only memory, # this-come, single said, "S the memory control system does not need to significantly increase access ㈣ (p work n foot) 曰 month b ^ Preparation of connection with external read-only memory, each flash memory "two: S affects the packaging planning of the single chip of the system. ^ L implementation method] It / Beijing reviewers can further understand and understand the purpose, shape, structure, entry and effect of the present invention, and the examples are described in detail with the illustrations below. Bismuth cattle), 22, Figures 1 and 4 are not schematic diagrams of the present invention (a A ^: ^ ', which includes flash memory control integrated circuit 30, operation; f ^ :; Shi Wei read memory 31 (such as fast Flash read-only memory ... = 丄.:; Less: one as [material storage unit .. ^ ^ ^ LASH MEMORY); bean material 1 bit I ^ self, body 3 1 and each fast The flash memory 3 2 is the same as the flash memory control integrated circuit 3 and the switching of the flash memory control integrated circuit 3 〇 1 = :, Γ module 39 and the flash memory controlled integrated circuit are different. U The micro processing benefits 34 are connected. Under the circumstances, the microprocessor 3 4 takes time to read the preset microprocessor program in the external 2 1. Therefore,-, "t think of the control product Circuit 3 〇 Control internal logic circuit 3 5 will

Page 8 V. Invent the switching module 3 3 The position to which the channel is connected. 3 1. The external read-only memory allows the microprocessor 3 4 to self-code. Furthermore, when micro data is used, it flashes quickly. The memory 3 4 is connected to the external read-only memory waiting state control circuit, and the external read-only redundant memory control integrated circuit group 3 3 is switched to the internal register module 3 9 of the flash memory path 30. The flash memory 31 is connected with the switching operation of the Lu Jiyi body control integrated circuit module 3 3 and the channel of the memory body 31 is connected to 4, thereby triggering the program code in the microprocessor 31. The flash memory 32 is shared by the system, and there is no need to add another pin (P IN pin), so the size. Please refer to Figures 4 and 5 for the microprocessor 3, so that the micro memory module 3 is externally read-only processor 3 4 The body controls the integrated body 3 1 through 3 7 'makes the micro memory 3 1 3 0 controlled inside Memories 3 2 with

3 6 (BU microprocessor 3 fetches data; waits for the internal '30 to make the reply micro-pass and transmit benefits 3 4 Following this, through the same data each flash memory can reduce production 4 and external processors 3 4 and The channel memory 8 of 8 wants to access the flash circuit 3 0, and controls the code of the processor 3 4, the logic circuit of the flash memory FFER) 4 The logic circuit 3 can be completed through the temporary access action 3 Processor 3 4 One resumes signal execution and reads external read-only records and address sinks. 3 2 connection cost, also does not read memory. External only keeps reading. Its memory is interrupted. Pico processing is waiting at the same time. 3, fast flash memory, 5 will be connected to the external memory to the external memory of the 3 rows of square pins will increase the body 3 1 read memory 'and then the memory 3 2 processor processor 3 4 standby mode should be fast The flash-switched modular electrical memory 6 is switched from the flash-controlled read-only register 3 to read the memory 1 and various types, so (shown as a whole, it is a block diagram of the present invention

Page 9 594488 Memories of Invention and Inventory (6) and Action Flow Integration Circuit Body 3 1 in 5 0 1) Figure (-) J Jr τ-, Q) 'Under normal circumstances, its flash memory Control 3 0 is to keep the microprocessor 3 4 from reading the external read-only pre-α private code, and it will be remembered according to the following steps: 5 0 2) 5 0 3) See body 3 2 Step 6 in the list 6 0 1) 0 2 6 0 First, the flash memory internal logic circuit 3 $ processor 3 4 and the external only position; keep the microprocessor 3 4 and open; its microprocessor 3 4 is desirable The memory code is shown in Figures 4 and 6. When data is stored, its flash memory is processed: First, the flash memory is processed ^ § 3 4 and the externally controlled microprocessor 3 4 makes the microprocessor 34 read-only Memory 3 1 and then control the internal logic to flash memory 3 2 and turn on flash memory 3 to control the integrated circuit 3 0 to switch the switching module 3 3 to micro-read memory 3 1 The channels are connected to the external read-only memory 31, and the channel is read from the external read-only memory 31, and it is finished. The microprocessor 3 4 wants to access the flash memory control integrated circuit 3 〇 will control the integrated integrated circuit 3 〇 interrupt the channel of the micro read-only memory 31 and wait for the state control circuit 37 in the wait mode , No longer read external code; Road 3 5 will switch mode, group 3 3 switch and flash memory module 3 9 2 to flash memory control integrated circuit

Page 10

4 ο Ο Ο In addition, the internal register 3 of the external channel 3 0 enables the flash memory 32 to be used for mutual storage between the flash memory 3 2 and the internal BUFFER) via the register 36 and to be stored after the access operation ends , Close the channel, and connect the channel of the external read-only memory 3 3, 3 8 of the switch module 3; start the microprocessor 3 4 and the external channel, and send a recovery signal to trigger the microprocessor 3 4 response beam . Its flash memory 3 2 can enter 6 channels; materials can be transmitted through this channel register 36 (to enable the microprocessor to access this data; closed flash memory 3 2 switch back to microprocessor 3 external read-only The memory module only reads the memory No. 31 to the microprocessor 3 4 to the original working mode. Alas, the pass from 3 to 4 is in between, and the step is the flash memory array. It is only the best embodiment of the present invention. However, the structural features of the present invention are not limited to this. Any changes or modifications that can be easily considered by those skilled in the art in the field of the present invention can be covered in the following. The patent scope of this case.

Page 11 594488 Schematic illustration. [Schematic description] The first diagram is a block diagram of a conventional single chip. The second figure is a block diagram of another conventional single chip. The third diagram is a block diagram (1) of the present invention. The fourth diagram is a block diagram (two) of the present invention. The fifth figure is the operation flowchart (1) of the present invention. The sixth diagram is the operation flowchart (2) of the present invention. [Description of component symbols] 1 0, single-chip integrated circuit 1 1, microprocessor 1, 2. internal read-only memory (ROM) 1 3. external read-only memory (ROM) 2 0, single chip Flash memory volume circuit 2 1, Masked read-only memory (MASK ROM) 2 2, External flash read-only memory 2 3, Microprocessor 2 4, Host-side — '2 5, Flash memory 3 0.Flash memory control integrated circuit

Page 12 594488 Simple description of the diagram 3 1. External read-only memory 3 2. Flash memory 3 3. Switching module 3 4. Microprocessor 35. Internal logic circuit 3 6. Internal register 3. 7. Waiting state control circuit 3 8, external read-only memory module 3 9, flash memory module

Claims (1)

VI. Application specific scope 1. A kind of micro-processing control integrated processor and processor and processor which can be used as a micro-processor control product by using a common flash memory as the storage data to store the external only address pool. The channel and the processor are in the code, and the circuit connects the internal flash memory with the switching control of the flash memory. The processor continues to use the bus to control the fast-read memory stream of the code unit. The switching module is connected, the circuit controls the external read only, and the external read only reads from the external device. The circuit that will access the micro controller will control the micro-wait mode. Order back, and send the resumption of execution and the way to start the system. The external flash memory and the fast flash memory groups included in the package are the same as those that can be read in the memory of the internal logical memory. The flash memory is interrupted. Processor, etc., no longer read the memory control and switch to flash connection to enable micro data; the internal micro-processing of the path to wait for recovery information to read the external external only fast-read memory; Intermediate memory control, flash memory, normal condition circuit, channel phase, channel protection, read processor, standby status, external memory processor, access to logic appliances and nicknames The single-chip flash memory control chip body of the body and at least one of the chips are controlled by the same body circuit to keep the flash switching module open and closed. When it enters its memory, it is fast. External read-only memory control circuit. After the read-only memory circuit is controlled and the control product can be temporarily stored, the club will control the cut-only read-only memory processor to exchange the data in the memory for the module circuit. The memory is changed to micro, and the micro is used to make the micro code; the flash memory is used to program the logic part of the logic department, and the micro code is triggered from the flash module. 594488 VI. Application for Patent Scope 2. Single-chip flash memory control system for activating external read-only memory by using a shared bus as described in item 1 of the scope of patent application, where the flash memory can be further Flash memory array. 3. The single-chip flash memory control system for activating external read-only memory as described in item 1 of the scope of patent application, wherein the external read-only memory can be a flash-read-only memory.