TW202133245A - Method for processing wafers - Google Patents

Abstract

A method for processing a wafer, comprising following steps: providing a wafer having a first surface with a wafer identification (wafer ID) and a second surface without the wafer ID; adhering the wafer to a first wafer frame and forming a first identification tag over the first wafer frame to form a first composite wafer; grinding the second surface of the wafer of the first composite wafer to reduce a thickness of the wafer; transferring a grinded wafer of the first composite wafer from the first wafer frame to adhere thereof to a second wafer frame, forming a second composite wafer; and cutting the grinded wafer of the second composite wafer into a plurality of separated dies from the first surface of the grinded wafer.

Description

Wafer processing method

The present invention relates to an integrated circuit packaging process, and particularly relates to a wafer processing method suitable for an integrated circuit packaging process.

In the current integrated circuit packaging process, the identification and inspection of the supplied wafers is achieved by the operator visually comparing the wafer data provided by the wafer supplier and the paper data of the production work order. If the operator does not The comparison or the occurrence of a comparison error will cause the execution error of the integrated circuit packaging process, thereby reducing the accuracy of the process.

In addition, the visual wafer identification and inspection is extremely time-consuming, which is not conducive to the improvement of the efficiency of the integrated circuit packaging process.

In view of this, the present invention provides a wafer processing method suitable for the integrated circuit packaging process. With the combination of the process management system and the identification label, the manufacturing efficiency and accuracy of the integrated circuit packaging process can be improved.

According to one embodiment, the wafer processing method of the present invention includes the following steps: providing a wafer, wherein the wafer has a first surface marked with a wafer number and a second surface not marked with the wafer number; Adhere the wafer and a first wafer frame through a patch adhesive film and mark a first identification label on the first wafer frame to form a first composite wafer, wherein the patch adhesive film covers the On the first surface of the wafer, the first identification label includes the wafer number; grinding the second surface of the wafer in the first composite wafer to reduce the thickness of the wafer; The polished wafer in the first composite wafer is transferred from the first wafer frame and adhered to a second wafer frame, and the patch film and the first wafer frame are removed to form a A second composite wafer, wherein the dicing film covers the second surface of the wafer, and the wafer number of the first surface of the polished wafer is exposed; and since the polished wafer The first surface cuts the ground wafer in the second composite wafer into a plurality of separated dies.

According to an embodiment, the wafer is adhered to the first wafer frame through the die attach film by an adhesive die machine, and the first identification label is marked on the first wafer frame.

According to an embodiment, the first identification label further includes a process number.

According to an embodiment, a polishing process is selected by a wafer polishing machine according to the process number of the first identification label to polish the second surface of the wafer in the first composite wafer.

According to one embodiment, the die attach film is removed from the first wafer frame by a die remover and transferred by the die die machine, and the polished wafer and the wafer are adhered through the dicing die. The second wafer frame to form the second composite wafer.

According to an embodiment, a wafer number of the exposed first surface of the polished wafer is identified by a wafer dicing machine to select a dicing process, since the first of the polished wafer The polished wafer in the second composite wafer is surface-cut into a plurality of separated dies.

According to an embodiment, the wafer processing method further includes the step of selecting one of the dies to perform a packaging process to form an integrated circuit package.

According to an embodiment, the first identification tag is a radio frequency identification tag, a laser tag or a code.

According to an embodiment, the first identification tag is established by a process management system.

According to an embodiment, the first surface of the wafer is an active surface on which a plurality of integrated circuit elements are formed, and the second surface of the wafer is a non-active surface on which any integrated circuit elements are not formed.

Please refer to the schematic diagram shown in FIG. 1, which shows a flowchart of a wafer processing method according to an embodiment of the present invention. The wafer processing method is suitable for an integrated circuit packaging process and includes steps S1-S6.

First, in step S1, a wafer having a first surface marked with a wafer ID and a second surface not marked with the wafer ID is provided, wherein the first surface and the second surface are Relative surface.

In one embodiment, the first surface of the wafer is an active surface (or the front side of the wafer) provided with a plurality of integrated circuit elements, and the second surface of the wafer is not provided with any semiconductor products. The inactive surface of the bulk circuit component (or the backside of the wafer). The wafer is a wafer to be packaged provided by a wafer supplier, which is provided by a stocker with sorting and image identification functions. Before the implementation of step S1, the wafer supplier provided the wafer stored in a first wafer cassette and a process work card (run card) marked with the process number of the packaging process to be performed on the wafer in advance, so The warehouse machine with sub-inspection and image recognition functions can receive the wafer into the warehouse and simultaneously input and upload the package process to be carried out by the wafer contained on the process work card to one of the signal links with the warehouse machine Production management system. In this way, when the subsequent step S1 is performed, the wafer can be taken out of the warehouse by the warehouse machine and transferred to a second wafer cassette for subsequent processing steps.

Then, in step S2, the wafer and a first wafer frame are adhered through an adhesive film and a first identification label is marked on the first wafer frame to form a first composite Wafer. The patch adhesive film covers the first surface of the wafer to protect the first surface when the second surface of the wafer is subsequently polished, and the first identification label includes the wafer number. Figure 2 is a schematic diagram showing a schematic top view of a first composite wafer according to an embodiment of the present invention, wherein the first composite wafer 100 includes the wafer 10, the first wafer frame 20, and the veneer The adhesive film 30 and the first identification label 40.

In one embodiment, manual or unmanned transport vehicle (AGV) may be used to transfer the second wafer cassette that has completed step S1 to an adhesive die attaching machine, and step S2 is performed by the adhesive film attaching machine. The film sticking machine has functions such as barcode label printing, laser marking and sticking, and can mark the first identification label on the first wafer frame according to the production dispatch information in the production management system. The first identification tag is, for example, a radio frequency identification tag, a laser tag or a code tag. In addition to the wafer number of the wafer, the first marking label can optionally include a process number and/or a cassette number of the second wafer cassette. The first identification label can be marked on the first wafer frame by laminating or laser marking.

Next, in step S3, the second surface of the wafer in the first composite wafer is ground to reduce the thickness of the wafer.

In one embodiment, the second wafer cassette that has completed step S2 can be transferred to a wafer grinder by manual or unmanned guided vehicle (AGV), and step S3 is performed by the wafer grinder. Grinding the second surface of the wafer in the first composite wafer that is not adhered by the patch adhesive film. After identifying the first identification label, the wafer grinder selects and executes a corresponding grinding process to grind the second surface of the wafer, so as to reduce the thickness of the wafer to a predetermined thickness, and obtain the polished Wafer.

Then, in step S4, the polished wafer in the first composite wafer is transferred from the first wafer frame through a dicing adhesive film and adhered to a second wafer frame, and the patch adhesive is removed Film to form a second composite wafer, wherein the dicing glue film covers the second surface of the wafer, and the wafer number of the first surface of the polished wafer is exposed. Figure 3 is a schematic diagram showing a schematic top view of a second composite wafer according to an embodiment of the present invention, wherein the second composite wafer 200 includes the polished wafer 10' and the second wafer frame 50. The dicing film 60 and the wafer number 70.

In one embodiment, the second wafer cassette that has completed step S3 can be transferred to a tape remounter (Remounter) by manual or unmanned guided vehicle (AGV), and step S4 is performed by the tape remounter. , Transfer the ground wafer in the first composite wafer from the first wafer frame through the dicing film and adhere to the second wafer frame and remove the patch film to form the The second composite wafer. At this time, because the patch film has been removed, the wafer number on the first surface of the polished wafer is exposed, and the wafer number can be used as a wafer and process in subsequent steps The use of identification.

Next, in step S5, the polished wafer in the second composite wafer is cut from the first surface of the polished wafer to become a plurality of separated dies.

In one embodiment, the second wafer cassette that has completed step S4 can be transferred to a wafer dicing machine by manual or unmanned transport vehicle (AGV), and step S5 is performed by the wafer dicing machine. Identify the wafer number of the exposed first surface of the polished wafer to select a dicing process, and cut the polished crystal in the second composite wafer from the first surface of the polished wafer The circle becomes a plurality of separated crystal grains. It is worth noting that after step S5, the dies are still stably attached to the dicing film for use in the subsequent packaging process.

Then, step S6 can be optionally performed to select one of the dies to perform a packaging process to form an integrated circuit package.

In one embodiment, manual or unmanned transport vehicles (AGV) may be used to transfer the second wafer cassette that has completed step S5 to another storage machine, and transfer the second wafer cassette including the separated dies. The composite wafer is stored in the storage machine for later use, and one of the dies is selected for a packaging process such as wire bonding or flip chip bonding according to the requirements of the subsequent packaging process to form an integrated circuit package.

Process machines such as the glue die attaching machine, wafer grinder, tape transfer machine, and wafer dicing machine used in the above steps S2-S5 are respectively connected to the process management system signal, and these steps S2-S5 are also The process management system is responsible for performing the transfer of wafers between different process machines in the steps S2-S5 according to the process number of the packaging process that the wafer is intended to perform according to the process work card (run card) and The execution of the appropriate manufacturing process. In this way, the present invention provides a wafer processing method suitable for the integrated circuit packaging process, which uses a process management system and identification label matching, and adopts a fully automatic wafer identification and process execution method, which avoids the traditional visual method. The wafer identification and inspection may encounter problems, and it has the technical effect of improving and ensuring the manufacturing efficiency and accuracy of the integrated circuit packaging process. The wafer processing method of the present invention is not only applicable to common silicon wafers in the field, but also applicable to other types of semiconductor wafers such as gallium arsenide in the field. Therefore, the wafer processing method will not be described in detail in the related embodiments. Detailed implementation of the processed semiconductor wafer.

In summary, although the present invention has been disclosed in the above with preferred embodiments, it is not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention pertains can be used without departing from the spirit and scope of the present invention. Various changes and modifications are made. Therefore, the scope of protection of the present invention shall be subject to the scope of the attached patent application.

S1, S2, S3, S4, S5, S6: steps 10: Wafer 10’: Wafer after grinding 20: The first wafer frame 30: Veneer film 40: The first identification label 50: second wafer frame 60.... Cutting film 70: Wafer number 100: The first composite wafer 200: second composite wafer

FIG. 1 shows a schematic flowchart of a wafer processing method according to an embodiment of the present invention. FIG. 2 shows a schematic top view of a first composite wafer according to an embodiment of the present invention. FIG. 3 is a schematic diagram showing a schematic top view of a second composite wafer according to an embodiment of the present invention.

S1, S2, S3, S4, S5, S6: steps

Claims (10)

A wafer processing method includes: Providing a wafer, wherein the wafer has a first surface marked with a wafer number and a second surface not marked with the wafer number; Adhere the wafer and a first wafer frame through a patch adhesive film and mark a first identification label on the first wafer frame to form a first composite wafer, wherein the patch adhesive film covers the On the first surface of the wafer, the first identification label includes the wafer number; Grinding the second surface of the wafer in the first composite wafer to reduce the thickness of the wafer; The polished wafer in the first composite wafer is transferred from the first wafer frame through a dicing film and adhered to a second wafer frame and the patch film is removed to form a second A composite wafer, wherein the dicing film covers the second surface of the wafer, and the wafer number of the first surface of the polished wafer is exposed; and After the first surface of the wafer is polished, the polished wafer in the second composite wafer is cut into a plurality of separated dies. The wafer processing method described in claim 1, wherein the wafer is adhered to the first wafer frame through the chip adhesive film by a die attaching machine and placed on the first wafer frame The first identification label is marked on it. In the wafer processing method described in item 2 of the scope of patent application, the first identification label further includes a process number. The wafer processing method described in item 3 of the scope of patent application, wherein a polishing process is selected by a wafer polishing machine according to the process number of the first identification label to polish the first composite wafer The second surface of the wafer. The wafer processing method described in item 3 of the scope of patent application, wherein the ground wafer in the first composite wafer is removed from the first wafer through the dicing film by a tape transfer machine The frame is transferred and adhered to the second wafer frame and the adhesive film is removed to form the second composite wafer. The wafer processing method described in item 3 of the scope of patent application, wherein a wafer number of the exposed first surface of the polished wafer is identified by a wafer dicing machine to select a dicing process. The first surface of the polished wafer cuts the polished wafer in the second composite wafer into a plurality of separated dies. The wafer processing method described in item 1 of the scope of the patent application further includes selecting one of the dies to perform a packaging process to form an integrated circuit package. In the wafer processing method described in item 1 of the scope of patent application, the first identification tag is a radio frequency identification tag, a laser tag or a code tag. In the wafer processing method described in claim 1, wherein the first identification label is established by a process management system. In the wafer processing method described in claim 1, wherein the first surface of the wafer is an active surface on which a plurality of integrated circuit elements are formed, and the second surface of the wafer is not formed on The non-active surface of any integrated circuit component.

Images