SU1418806A1 - Device for displaying information on television indicator - Google Patents

Abstract

The invention relates to automation and computing, namely, devices for outputting alphanumeric and television information to a television indicator, and can be used as a device for displaying information. The purpose of the invention is to improve the accuracy of the device. The device contains the first decoder .3 commands, the first 4 and second 6 triggers, the first 5, the second 15 and the third 17 elements And, the first 16 and second 24 elements NOT, the first 8 and second 9 blocks of RAM, the address switch 7 | counter 1 1 addresses, driver 14 starting address, character generator 13, master generator 19, counter 20 points, counter 21 characters, counter 22 lines, counter 23 lines of characters, television indicator 25, second decoder 10, third trigger 12, switch 18 signals, inputs 28 and HR-29 sync pulses, video input 30 and the corresponding connection. The combination of images is achieved in the signal switch 18 by blocking the passage of the television video signal at the time of arrival of the video signal of the symbol. 1 il. i cl

Description

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1H IchobrSGGSChii T 1 ° C (k, 1 | 1 | 1PMGMke and pychislich elmim are hiike,, but ustroystt h) (.) Pm i.1noda llf.chvi1ng - tsnfrovoy and tolepitpoinoy inform.chiii telepizioiny on indicator, and may be used n K-fiqecTne device display information.

The purpose of the invention is to improve the accuracy of the device.

In the drawing, the presentation is a block diagram of the proposed device.

The device contains data bus 1, bus 2 addresses, decoder 3 commands, first RS flip-flop 4, first element 5, D-flip-flop 6, switch 7, addresses, first 8 and second 9 blocks of RAM, second decoder 10, counter 11, addresses, second RS-trigger 12, character generator 11, former 14, shnogo address, second element 15, 1 first element 16, third element 17, switch signal clock 18, master oscillator 19, counter 20 points , counter 21 characters, counter 22 lines, counter 23 lines of characters, second element IR 24, television indicator 25, tires 26 lines and sync and drove 27 kadro- Wogram sinhrosipchla entrance 28} Strauch first sync, vertical sync yhod 29, a view 30 eovhod device.

The device works as follows

The CRT screen is conventionally divided into fixed familiarity, and in Blocks 8 and 9 of memory, each familiarity has its own address. Signs are generated by picking the corresponding combination of points in the dot matrix M N which each familiarity contains on the screen. The set of symbol images is stored in the memory of the character generator 13. The synchronizing signal rises from the master oscillator 19 to a counter of 20 points, which determines the number of points M in one familiarity segment. The output of the counter of 20 points is sent to the input of a counter of 21 characters, which monitors the number of familiarity in the current line. From the outputs of the counter 2 characters c} P1 there is a line-quenching signal arriving at the first. the HYU 16 element and the second And 15 element, the horizontal sync signal 26 for the television indicator 25 and the signal for the television counter 22.

with

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cipnn, Koif.jibui cMf. tHT for chig.chom psi prom-pn; lines for each acquaintance. The counter is 22 tepee p. (The exciter input of the character generator 13 is excited. The output signal of the counter of 22 television lines is fed to the counter of 23 lines of characters, which sets the number of 25 lines of characters played on the Mioi O screen and generates a blanking signal - Puschu11 on the second element NOT 24 and the first element And 5, as well as the frame synchronization signal 27 for the television indicator 25. The video format of the frame to be regenerated is stored in one of blocks 8 and 9 by the memory type while the other one of them is free to receive information from data type I1. At the same time, a; cell addressing in memory blocks 8 and 9 is made either from address bus 2 or from address counter 14. The character code is located in memory blocks 8 and 9 in that sequence which characters should be placed on the screen of the television indicator 25. Suppose, for example, the video information of the frame, the subject of regeneration, is located in the nerve block 8 of the RAM, and the second block 9 of the RAM is free to receive the information; 8 RAM memory proi vodits addresses from the counter 11, and block addressing 9 cells RAM memory - from 2 addresses of tires. After the data transfer is completed on the data bus I, the text code is set, which is decoded by the decoder of the 3 commands and stored by the first trigger 4. Then the end of text signal and the first trigger 4 is interrogated to the first I1 of the frame and flips the second trigger 6, which works like a computed D-trigger. Due to this, the RAM block 9 goes into the read mode and is represented by the R1 information regeneration on the screen, and the first RAM block 8 goes into the write mode and is presented to the microprocessor.

When reproducing information every time before scanning televisions. Lines in the lines reserved for the sign, the driver

lA of the starting address loads and the counter I Iifcca the address of the first cell of block 8 or 9 of the RAM, in which the code of the first symbol of the reproduced sign line is stored. The increase of the address value in the address counter 1I to obtain a sequence of cells of block 8 or 9 of the operative memory containing the remaining character string codes occurs according to the counter signals of 20 points when there is resolution from the second element 15, formed in the absence of a line-quench signal and line spacing, respectively, from the counter of 2 characters and from the counter of 22 TV lines. The code of the sign from that block 8 or 9 of the RAM, which is currently involved in the process of regenerating the video information on the screen of the television indicator 25, goes to the character generator 13, which then generates a sequence of signals controlling the image of this sign on the third element 17, two other input signals, which are inverted line-quenching signals and a frame, which causes the formation at the output of the third element And 17 of a full video signal coming through the switch 18 signals to the body Viziona indicator 25 and control the intensity of its electron beam.

In order to provide a joint display of alphanumeric and television information, the television video signal from the video input 30 of the device is supplied to the second input of the signal switch 18. The signals are switched from the output of the third element AND 17 or the video input 30 of the device to the input of the television indicator 25. The switching of the signal switch 18 is effected by the signal c. trigger output 12. To the control input of trigger 12, a signal is output from the second decipher 10, whose input is connected to the outputs of blocks 8 and 9 of the RAM. The information is read from block 8 and 9 of the working memory in the form of a parallel code and simultaneously enters the inputs of the character generator 13 and the second decipher 10. Moreover, if the read code corresponds to the code of a character from

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xp;) pim1gh p iK i I (snipy ptm ti zn; 1i1 generator 13, then nghod) of the decoder 10 will ENABLE cm log, I, at the same time at the output of the trigger 12, at the moment of receipt of the pulse from the output of the master generator 19, the state is set to logical 1. This signal,

10 supplied to the switch input of the 18 si1-channel allows the alphanumeric information from the output of the 15th element I to pass through the switch to the input of the television indicator 25 of the output signal. 17. When reading from the blocks of the 8th or 9th operative memory, the address code of the free constant cell character generator 13 (Space code) on

The 20 output of the second decoder 10 establishes a signal Log. O, the output of the trigger 12 sets the state of the logical O, the switch

18 signals are set to 25, with ct) the torus resolving

the passage to the input of the television indicator 25 of the television video signal from the video input 30 of the device. All synchronization signals in the device

It is formed from input sync pulses, which ensures the sustainability of the television image on the screen of the television indicator 25 and causes the absence of .jg mechs and distortions from a break in synchronization when switching from displaying alphanumeric information to displaying television information arising from the asynchronous operation of generator

19th device and external television signal source.

Thus, the invention improves the accuracy of the device by 45 enabling the prompt placement of alphanumeric information anywhere on the screen and displaying this information in conjunction with television information.

50

Claims (1)

Invention Formula A device for displaying information on a television indicator, 55 containing the first decoder, the first RS flip-flop, the first AND element, the D-flip-flop, the address switch, the first and second RAM blocks, the address counter, the sign-al operator, form / 51/4 RChch l of the starting address, BTOptjrt and the third elements are AND, parvL and the second elements are NOT, the master oscillator, the point counter, the character counter, the 4HJ row of lines and the row counter of the characters, the score) whose input is connected to the first output of the row counter, whose count input connected to the first direction of the character counter, the counting input of which is connected to the first output of the character counter, the counting input of which is connected to the first output of the point counter, the counting input of which is connected to the output of the master oscillator, the output of the first decoder is connected to the input of the mouth 1 of the first RS flip-flop, the output of which is connected to the first input of the first element I, the code of which is connected to the output of the first RS-flip-flop setup n to the clock input of the D-flip-flop, the direct output of which is connected to the control input of the second the main memory unit and the first control input of the address switch, the first and second outputs of which are connected respectively to the address inputs of the second and first memory blocks, the control input of the first memory block, the second control input of the switch address A and the D-flip-flop information input are connected to the EItrigger inverse output, the first information input of the address generator is connected to the output of the address counter, the counting input of which is connected to the second output of the point counter, the third output of which is connected to the first address input of the character generator, the second whose address input is connected to the second output of the row counter, the third output of which is connected to the first information input of the initial address shaper, the output of which is connected to the information input of the address counter, control The developing input of which is connected to cheg1 vkodu second AND gate, a first KLiToporo input is connected to the fourth output lines of the counter, the second counter output soedinek characters with a second input of the second AND gate and vhoR06 6 the house of the first element is NOT, the output of which is connected to the first input of the third element I, the second input of which is connected to the output of the second element NOT, the input of which and the second input of the first element I are connected to the first output of the row counter characters | whose second output is connected to 0 to the second information input of the initial address shaper, the outputs of the first and second RAM blocks are connected to the TpeTbesry address input of the character generator, the output of which is connected to the third input of the third element I, the information inputs of the first and second RAM blocks and the input of the second generator are are informational 20 input device, the address input of which is the second information input of the address switch, which, in order to increase the accuracy of the device, 25, it contains the second decoder of the second RS flip-flop and a signal switch, the control input of which is connected to the output of the second RS flip-flop, the installation of the first input of which is connected to 30 to the output of the second decoder, the input of which is connected to the outputs of the first and second blocks of RAM; the first information input of which is connected to the output of the third element .jg And, the output of the Signal Switch is connected to the input of the television indicator, the clock input of the second RS flip-flop is connected to the output of the master oscillator, the control input of which is 40, the control input of the point counter and the control input of the character counter are the input of the horizontal sync pulse of the device, the input of the frame sync pulse of which is the 45 equalizing inputs of the line counter and the character row counter, the second information input of the signal selector is the video signal input of the device, the output of the horizontal and frame 5Q clock pulses of which are the third outputs, respectively, of the character counter and the character row counter.