KR950022426A - Integrated Information Communication Network Terminal User Information Matching Device - Google Patents

Integrated Information Communication Network Terminal User Information Matching Device Download PDF

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Publication number
KR950022426A
KR950022426A KR1019930030012A KR930030012A KR950022426A KR 950022426 A KR950022426 A KR 950022426A KR 1019930030012 A KR1019930030012 A KR 1019930030012A KR 930030012 A KR930030012 A KR 930030012A KR 950022426 A KR950022426 A KR 950022426A
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South Korea
Prior art keywords
user information
matching device
atm
terminal user
interface
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KR1019930030012A
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Korean (ko)
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KR970002782B1 (en
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최길영
김명석
강태운
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양승택
재단법인 한국전자통신연구소
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

본 발명은 광대역 종합정보통신망(이하, BISDN이라 함)서비스 제공의 초기단계에서 현조하는 통신망 인터페이스와 단말기를 지원하는 요구에 따라 종합정보통신망(ISDN)단말기를 BISDN에서 사용될 수 있도록 정합기능을 수행하는 ISDN단말정합장치의 협대역 종합정보 통신망(이하, NISDN이하 함)S인터페이스의 물리계층 정합기능과 사용자 정보에 대하여는 BISDN의 SB인터페이스 접속에 요구되는 AAL type기능과 ATM계층 일부기능을 수행하는 ISDN단말 사용자정보 정합장치에 관한 것으로, NISDN인터페이스에 접속되어 기본 엑세스(2B+D)정보를 처리함으로써 ISDN협대역 기본속도 가입자에게 BISDN을 통하여 서비스를 제공하기 위한 SB인터페이스 정합기능을 수행할 수 있도록 BISDN의 R인터페이스접속기능과 64Kbps B채널정보를 AAL 형태1의 기능을 수행하며, ATM헤더 VP1/VC1를 생성 및 해석하는 기능을 하두에어보드로 제공하는 NISDN1차군 속도정보에 대한 접속기능을 개발하는데 이용될 수 있다.The present invention performs a matching function so that an ISDN terminal can be used in a BISDN according to a request for supporting an existing telecommunication network interface and a terminal in an initial stage of providing a broadband integrated telecommunication network (hereinafter referred to as a BISDN) service. ISDN performing the AAL type function and the ATM layer some of the features required for a narrow band integrated services digital network (hereinafter, referred to hereinafter NISDN) physical layer matching of the S interface functions with S B interface connection BISDN respect to the user information of the ISDN terminal matching device It relates to a terminal user information matching device, are connected to the NISDN interface basic access (2B + D) by processing the information to perform the S B interface matching function for providing a service through a BISDN to ISDN narrowband base speed subscriber R interface connection function of BISDN and 64Kbps B channel information perform AAL type 1 function, ATM header VP1 / VC1 A function of generating and Hajdu analysis may be used to develop a connection function for NISDN1 chagun rate information provided with the air board.

Description

종합정보통신망 단말 사용자정보 정합장치Integrated Information Communication Network Terminal User Information Matching Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명이 적용되는 ISDN단말용 BISDN정합장치(BTA)의 시스템 구성도.1 is a system configuration diagram of a BISDN matching device (BTA) for an ISDN terminal to which the present invention is applied.

제2도는 본 발명에 의한 ISDN단말 사용자정보 정합장치의 구성도.2 is a block diagram of an ISDN terminal user information matching device according to the present invention.

제3도는 본 발명에 의한 R인터페이스 처리부 구성도.3 is a block diagram of an R interface processing unit according to the present invention.

Claims (6)

BISND에 접속되는 ISDN단말정합 장치의 ISDN단말사용자 정보 정합장치에 있어서, NISDN인터페이스에 접속되어 기본 엑세스(2B+D)정보를 처리함으로써 ISDN협대역 기본속도 가입자에게 BISDN을 통하여 서비스를 제공하기 위한 정합 기능을 수행할 수 있도록 하는 BISDN의 R인터페이스처리부(22); AAL계층에서 수행하는 SAR-PDU헤더의 생성 및 해석기능 처리부(24); ATM계층에서 수행하는 ATM헤더 처리기능중 VP1/VC1를 생성 및 해석기능 처리부(25); ATM헤더의 VPI/VCI정보, SAR-PDU헤더; 사용자 정보를 셀로 구성하여 ATM계층으로 전송처리기능, B1및 B2셀에 대한 다중화 및 역다중화 기능(26); 하드웨어 시험시 또는 ATM모듈과의 통신불능시 오류발견을 위해 송신전 단계에서 데이타 및 제어신호를 내부적으로 루프시키는 루프백 회로부(27); R인터페이스로부터 수신된 B채널 정보를 ATM계층으로 전달하기 위하여 AAL계층에서 이를 일시적으로 저장하는 송신버퍼와 역으로 수신된 셀의 지터를 흡수하고 이를 연속적으로 R인터페이수부로 전달하는 송수신 버퍼부(28); ISDN단말 사용자정보 정합장치와 ATM/물리계층 처리모듈의 ATM계층 처리보드와 셀의 송수신을 담당하는 부분으로 ISDN단말 사용자 정보 정합장치내에서는 로컬버스를 통하여 신호 및 데이타를 주고받는 ATM인터페이스부(29); ISDN단말 사용자 정보 정합장치내의 각 디바이스의 선택신호는 어드레스 디코더(30); ISDN단말사용자정보 정합장치가 프로세서가 연결되어 VME버스의 슬레이브 보드로 동작시키는 VME버스제어부(31); 상기 ATM헤드 처리부(25)에 연결되어 로컬 클럭을 발생하는 로컬 클럭 발생부(32); 서비스 클럭을 백컨넥터로부터 수신하여 분주회로를 이용하여 각 디바이스에 분배하는 클럭 분배 회로부(33); ATM모듈로부터 수신되는 데이타 클럭과 서비스클럭을 감시하기클럭 감시회로부(34); ISDN단말 사용자 정보 정합장치내의 오류상태를 신속하게 알리기 위해 VME인터럽트를 사용하여 프로세서보드로 알리오류신호 발생회로부(35); 자신이 속한 시스템의 소프트웨어적인 리셋을 수행하는 제어/상태 레지스터(36); 를 구비하는 것을 특징으로 하는 종합정보통신망 단말 사용자정보 정합장치.In the ISDN terminal user information matching device of the ISDN terminal matching device connected to the BISND, a matching is provided to the ISDN narrowband basic speed subscriber through the BISDN by processing basic access (2B + D) information connected to the NISDN interface. An R interface processor 22 of the BISDN to perform a function; A generation and analysis function processing unit 24 for generating a SAR-PDU header performed in the AAL layer; A generation and analysis function processing unit 25 for generating VP1 / VC1 among ATM header processing functions performed in the ATM layer; VPI / VCI information of the ATM header, SAR-PDU header; A user information structured as a cell for transmission processing to the ATM layer, multiplexing and demultiplexing functions for B1 and B2 cells 26; A loopback circuit section 27 which internally loops data and control signals at a pre-transmission stage for error detection during hardware testing or when communication with the ATM module is lost; In order to transfer the B-channel information received from the R interface to the ATM layer, the AAL layer temporarily transmits and stores the transmission buffer and vice versa. ); The ISDN terminal user information matching device and the ATM layer processing board of the ATM / physical layer processing module are responsible for the transmission and reception of cells. The ISDN terminal user information matching device transmits signals and data through a local bus in the ATM interface unit. ); The selection signal of each device in the ISDN terminal user information matching device is an address decoder 30; An ISDN terminal user information matching device having a processor connected to the VME bus controller 31 to operate as a slave board of the VME bus; A local clock generator 32 connected to the ATM head processor 25 to generate a local clock; A clock distribution circuit section (33) which receives a service clock from a back connector and distributes it to each device by using a division circuit; A clock monitoring circuit unit 34 for monitoring data clocks and service clocks received from the ATM module; An error signal generating circuit section 35 to the processor board using a VME interrupt to quickly notify an error condition in the ISDN terminal user information matching device; A control / status register 36 for performing a software reset of the system to which it belongs; Comprehensive information communication network terminal user information matching device comprising a. 제1항에 있어서, 상기 R인터페이스 처리부(1)는, ISDN S인터페이스에 접속되는 ISAC(40);ISAC에 연결된 EPIC(41);EPIC에 프레임 동기신호 및 데이타 클럭을 공급하고 PLL기능을 수행하는 클럭발생칩(42); 을 구비하는 것을 특징으로 하는 종합정보통신망 단말 사용자정보 정합장치.According to claim 1, The R interface processing unit 1, ISAC (40) connected to the ISDN S interface; EPIC (41) connected to the ISAC; Supply a frame synchronization signal and data clock to the EPIC and performs the PLL function A clock generation chip 42; Comprehensive information communication network terminal user information matching device comprising a. 제1항에 있어서, 상기 ISDN단말사용자정보 정합장치 송신처리부 AAL계층에서 수행하는 SAR-PDU헤더의 발생 및 삽입부(60,61);ATM계층에서 수행하는 ATM헤더 처리기능중 VPI/VCI를 생성 및 삽입부(62,66);ATM헤더의 VPI/VCI정보, SAR-PDU헤더,사용자정보를 셀로 구성하여, ATM계층으로 전송하는 전송처리부(63); 를 구비하는고 있는 것을 특징으로 하는 종합정보통신망 단말 사용자정보 정합장치.The method according to claim 1, wherein the ISDN terminal user information matching device generation and insertion unit (60, 61) of the SAR-PDU header to be performed in the AAL layer of the transmission processing unit; A VPI / VCI of the ATM header processing function performed in the ATM layer And inserting units (62, 66); transmission processing unit (63) for constructing the VPI / VCI information, the SAR-PDU header, and the user information of the ATM header to the ATM layer; Comprehensive information communication network terminal user information matching device characterized in that it comprises a. 제1항에 있어서, 상기 ISDN단말사용자정보 정합장치 수신처리부는 수신버퍼 (72,73);역다중화기(86); ATM인터페이스 제어부(81);ATM헤더추출부(75);SAR-PDU헤더추출부(75);VPI-VCI비교부(78);SN/SNP처리부(79); 수신버퍼제어부(80); VPI/VCI레지스터(78); 제어/상태 레지스터(84); 를 구비하는 것을 특징으로 하는 종합정보통신망 단말 사용자정보 정합장치.The apparatus of claim 1, wherein the ISDN terminal user information matching device receiving processing unit comprises: a receiving buffer (72, 73); a demultiplexer (86); ATM interface control unit 81; ATM header extraction unit 75; SAR-PDU header extraction unit 75; VPI-VCI comparison unit 78; SN / SNP processing unit 79; Receiving buffer control unit 80; A VPI / VCI register 78; Control / status register 84; Comprehensive information communication network terminal user information matching device comprising a. 제1항에 있어서, 상기 수신 버퍼제어부는, 버퍼의 레벨을 저장하는 버퍼레벨 레지스터(91); 수신버퍼의 데이타량을 카운팅하는 업다운 카운터(92); 상기 레지스터(91)와 카운터(92)에 연결되어 비교하는 비교기(93); 상기 비교기(93)에 연결되어 서비스의 시작신호를 출력하는 제어신호발생부(94); 를 구비하는 것을 특징으로 하는 종합정보통신망 단말 사용자정보 정합장치.2. The apparatus of claim 1, wherein the receiving buffer control unit comprises: a buffer level register (91) for storing a level of a buffer; An up-down counter 92 that counts the amount of data in the receive buffer; A comparator (93) connected to the register (91) and a counter (92) for comparison; A control signal generator 94 connected to the comparator 93 and outputting a start signal of a service; Comprehensive information communication network terminal user information matching device comprising a. 제1항에 있어서, 수신측에서는 필요한 소스클럭의 회복을 위해 STM-1급 망클럭에서 제공되는 8KHz을 PLL의 입력클럭으로 사용하여 입력클럭에 동기된 출력클럭을 사용자 정보전달에 사용하도록 한 것을 특징으로 하는 종합정보통신망 단말 사용자정보 정합장치.The receiver of claim 1, wherein the receiving side uses an output clock synchronized with the input clock to transmit user information by using 8 KHz provided by the STM-1 class clock as the input clock of the PLL to recover the necessary source clock. Comprehensive information communication network terminal user information matching device. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930030012A 1993-12-27 1993-12-27 Terminal user information interfacer in the isdn KR970002782B1 (en)

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KR970002782B1 KR970002782B1 (en) 1997-03-10

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100251005B1 (en) * 1997-09-03 2000-04-15 이계철 Atm interfacing board using atm cell demultiplexer and apparatus thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100251005B1 (en) * 1997-09-03 2000-04-15 이계철 Atm interfacing board using atm cell demultiplexer and apparatus thereof

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