KR20010002477A - Symbol timing and frequency synchronizing device for OFDM signals and method thereof - Google Patents
Symbol timing and frequency synchronizing device for OFDM signals and method thereof Download PDFInfo
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- KR20010002477A KR20010002477A KR1019990022297A KR19990022297A KR20010002477A KR 20010002477 A KR20010002477 A KR 20010002477A KR 1019990022297 A KR1019990022297 A KR 1019990022297A KR 19990022297 A KR19990022297 A KR 19990022297A KR 20010002477 A KR20010002477 A KR 20010002477A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2657—Carrier synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2602—Signal structure
- H04L27/261—Details of reference signals
- H04L27/2613—Structure of the reference signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2662—Symbol synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2668—Details of algorithms
- H04L27/2673—Details of algorithms characterised by synchronisation parameters
- H04L27/2675—Pilot or known symbols
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0024—Carrier regulation at the receiver end
- H04L2027/0026—Correction of carrier offset
- H04L2027/003—Correction of carrier offset at baseband only
Abstract
Description
본 발명은 심볼 타이밍 및 주파수 동기 장치 및 방법에 관한 것으로, 특히, 직교주파수분할다중변조(OFDM) 시스템의 심볼 타이밍 및 주파수 동기 장치 및 방법에 관한 것이다. 직교주파수분할다중변조(OFDM) 기술은 광대역 무선 LAN에 관한 표준인 IEEE의 802.11a나 BRAN ETSI의 HIPERLAN TYPE 2에서 물리계층에 대한 표준으로 채택되었다. 본 발명은 이러한 광대역 무선 LAN에 적합한 주파수 동기 장치 및 방법에 관한 것이다.The present invention relates to apparatus and method for symbol timing and frequency synchronization, and more particularly, to apparatus and method for symbol timing and frequency synchronization in an orthogonal frequency division multiple modulation (OFDM) system. Orthogonal Frequency Division Multiple Modulation (OFDM) technology has been adopted as the standard for the physical layer in IEEE 802.11a, the standard for broadband wireless LAN, or HIPERLAN TYPE 2 of BRAN ETSI. The present invention relates to a frequency synchronization device and method suitable for such a wideband wireless LAN.
종래의 OFDM 타이밍 및 주파수 동기 방법이 티모시 엠 쉬미디(Timothy M. Schmidi)와 도널드 씨 콕스(Donald C. Cox)에 의한 "OFDM 신호의 타이밍 및 주파수 동기(Timing and frequency synchronization of OFDM signals)"라는 제목의 미국 특허 제 5,732,113호에 개시되어 있다. 도 1a와 도 1b에는 상기 특허 자료에 개시된 종래기술에 따른 타이밍 및 주파수 동기 장치의 구조를 설명하기 위한 블록도와 상기 장치의 동작을 설명하기 위한 도면을 각각 도시하였다.Conventional OFDM timing and frequency synchronization methods are described by Timothy M. Schmidi and Donald C. Cox as "Timing and frequency synchronization of OFDM signals." US Patent No. 5,732,113 to the title. 1A and 1B show a block diagram for explaining the structure of a timing and frequency synchronization device according to the prior art disclosed in the patent document and a diagram for explaining the operation of the device, respectively.
도 1a 및 도 1b를 참조하면, 종래의 타이밍 및 주파수 동기 장치에서는 1/2 심볼 길이를 가지는 2 개의 심볼(A)과, 심볼(B), 및 심볼(C)로 구성된 동기 심볼을 구성한다. 이와같이 구성된 심볼과 지연된 심볼 사이의 자기상관(autocorrelation)을 적용하여 최대점을 검출한다. 이러한 최대점에서 심볼 타이밍을 획득하고, 소수배 주파수 옵셋 보상을 수행한다. 다음에는, 역푸리에변환부(IFFT)는 수신신호와 보상된 수신신호를 역푸리에 변환하여 주파수 영역으로 변환한다. 또한, 동기 심볼 A와 B를 차등 인코딩한 차등 신호를 사용하여 정수배 주파수 옵셋 보상을 수행한다.1A and 1B, a conventional timing and frequency synchronization apparatus configures a synchronization symbol composed of two symbols A having a half symbol length, a symbol B, and a symbol C. FIG. The maximum point is detected by applying autocorrelation between the thus constructed symbol and the delayed symbol. At this maximum point, symbol timing is obtained and prime frequency offset compensation is performed. Next, the inverse Fourier transform unit IFFT converts the received signal and the compensated received signal into inverse Fourier transform into a frequency domain. In addition, integer frequency offset compensation is performed using a differential signal obtained by differentially encoding sync symbols A and B.
하지만, 상기와 같은 종래의 방법은 잡음과 채널의 영향으로 자기 상관값의 최대점(peak point)의 변화도(variance)가 크기 때문에 심볼 타이밍을 획득하는데 있어서 오류 발생확률이 높다는 문제점이 있다. 또한, 소수배 및 정수배 주파수 동기는 심볼 타이밍 동기에 의존하기 때문에 심볼 타이밍 오류의 영향에 민감하다는 문제점이 있다. 더욱이, 상기와 같은 종래의 방법은 메모리에 저장된 수신신호와 현재 수신되는 신호를 모두 역푸리에변환하기 때문에 복잡성이 높다는 문제점이 있다.However, the conventional method as described above has a problem in that an error occurrence probability is high in obtaining symbol timing because a large variation in peak points of autocorrelation values is caused by noise and channel influence. In addition, since the multiples of the multiples of the frequency and the integers of the frequency depend on the symbol timing, there is a problem in that they are sensitive to the influence of the symbol timing error. Moreover, the conventional method as described above has a problem of high complexity since inverse Fourier transform of both the received signal and the currently received signal stored in the memory.
한편, 광대역 무선 LAN은 20 ㎒의 주파수 대역과 64 개의 부반송파를 사용하고, 최대 주파수 옵셋은 200 ㎑로 규정하고 있다. 따라서, 광대역 무선 LAN에서는 부반송파 주파수의 정수배에 해당하는 주파수 옵셋은 고려하고 있지 않다. 하지만, 종래의 OFDM 신호에 대한 주파수 및 심볼 타이밍 동기 방법에서는 정수배의 주파수 옵셋을 규정하고 있기 때문에 효율적이지 못하다는 문제점이 있다.On the other hand, broadband wireless LANs use a frequency band of 20 MHz and 64 subcarriers, and the maximum frequency offset is 200 kHz. Therefore, in the wideband wireless LAN, the frequency offset corresponding to the integer multiple of the subcarrier frequency is not considered. However, there is a problem in that the frequency and symbol timing synchronization method for the OFDM signal is not efficient because the frequency offset of integer multiples is specified.
본 발명이 이루고자 하는 기술적인 과제는 잡음이 부가되고 진폭과 위상 왜곡을 야기시키는 다중 경로 채널을 통과한 OFDM 신호로부터 보다 정확하게 주파수 동기와 심볼 타이밍 동기를 획득할 수 있는 주파수 및 심볼 타이밍 동기 장치를 제공하는 것이다.The technical problem to be achieved by the present invention is to provide a frequency and symbol timing synchronization device capable of more accurately obtaining the frequency synchronization and symbol timing synchronization from the OFDM signal passed through the multipath channel that adds noise and causes amplitude and phase distortion. It is.
본 발명이 이루고자 하는 다른 기술적인 과제는 상기 주파수 및 심볼 타이밍 동기 장치내에서 수행되는 심볼 타이밍 및 주파수 동기 방법을 제공하는 것이다.Another technical problem to be solved by the present invention is to provide a symbol timing and frequency synchronization method performed in the frequency and symbol timing synchronization device.
도 1a는 종래의 직교주파수분할다중변조(OFDM) 신호의 심볼 타이밍 및 주파수 동기 장치를 도시한 블록도이다.1A is a block diagram illustrating a symbol timing and frequency synchronization device of a conventional orthogonal frequency division multiple modulation (OFDM) signal.
도 1b는 도 1의 심볼 타이밍 및 주파수 동기 장치에서 수행되는 심볼 타이밍 및 주파수 동기 방법을 설명하기 위한 도면이다.FIG. 1B is a diagram for describing a symbol timing and frequency synchronization method performed in the symbol timing and frequency synchronization device of FIG. 1.
도 2는 본 발명의 실시예에 따른 직교주파수분할다중화(OFDM) 신호의 주파수 및 심볼 타이밍 동기 장치를 도시한 흐름도이다.2 is a flowchart illustrating a frequency and symbol timing synchronization device of an orthogonal frequency division multiplexing (OFDM) signal according to an embodiment of the present invention.
도 3은 본 발명의 실시예에 따른 직교주파수분할다중화(OFDM) 신호의 주파수 및 심볼 타이밍 동기 방법을 도시한 흐름도이다.3 is a flowchart illustrating a frequency and symbol timing synchronization method of an orthogonal frequency division multiplexing (OFDM) signal according to an embodiment of the present invention.
도 4a 내지 도 4c는 본 발명의 직교주파수분할다중화(OFDM) 신호의 주파수 및 심볼 타이밍 동기 장치 및 방법의 동작을 설명하기 위한 도면이다.4A to 4C are diagrams for describing an operation of a frequency and symbol timing synchronizing apparatus and method of an orthogonal frequency division multiplexing (OFDM) signal according to the present invention.
상기 과제를 이루기 위하여 본 발명에 따른 심볼 타이밍 및 주파수 동기 장치는 직교주파수분할다중화(OFDM) 신호로부터 주파수 동기와 심볼 타이밍 동기를 획득하기 위한 주파수 및 심볼 타이밍 동기 장치에 있어서, 적어도 세 개 이상의 동일한 동기 신호를 사용하여 구성된 동기 심볼을 포함하는 데이터를 수신하여 소정의 지연량 만큼 지연시켜 수신데이터와 자기 상관을 수행하고, 정규화를 수행하여 정규화된 자기 상관값을 출력하는 자기상관부; 정규화된 자기 상관값과 소정의 임계값을 비교하는 비교부; 정규화된 자기 상관값이 소정의 임계값 이상인 구간을 플랫(flat) 구간으로서 검출하는 피크 플랫 검출부; 상기 플랫 구간내에서 주파수 옵셋을 추정하여 주파수 옵셋값을 구하는 주파수 옵셋 추정부; 상기 주파수 옵셋값을 사용하여 수신신호에 대하여 주파수 옵셋 보상을 수행하는 주파수 옵셋 보상부; 주파수 옵셋이 보상된 신호와 기준신호를 사용하여 교차상관을 수행하고, 정규화를 수행하여 정규화된 교차 상관값을 출력하는 교차상관부; 및 상기 교차상관값이 최대가 되는 지점을 검출하고 심볼 타이밍 추정을 수행함으로써 심볼 타이밍 동기를 수행하는 심볼타이밍 동기부;를 포함하는 것을 특징으로 한다.In order to achieve the above object, the symbol timing and frequency synchronization device according to the present invention is a frequency and symbol timing synchronization device for acquiring frequency synchronization and symbol timing synchronization from an orthogonal frequency division multiplexing (OFDM) signal. An autocorrelation unit configured to receive data including sync symbols configured using a signal, delay the data by a predetermined delay amount, perform autocorrelation with the received data, and perform normalization to output a normalized autocorrelation value; A comparison unit comparing the normalized autocorrelation value with a predetermined threshold value; A peak flat detector for detecting a section having a normalized autocorrelation value equal to or greater than a predetermined threshold value as a flat section; A frequency offset estimator for obtaining a frequency offset value by estimating a frequency offset within the flat period; A frequency offset compensator configured to perform frequency offset compensation on a received signal using the frequency offset value; A cross-correlation unit performing cross-correlation using the signal compensated for the frequency offset and a reference signal, and performing normalization to output a normalized cross-correlation value; And a symbol timing synchronization unit for performing symbol timing synchronization by detecting a point at which the cross-correlation value is maximized and performing symbol timing estimation.
상기 장치는 주파수 동기를 수행하기 위한 주파수 동기모드를 종료하고 심볼 타이밍 동기를 수행하기 위한 심볼 타이밍 동기 모드로 절환시키는 모드 선택부를 더 포함하는 것이 바람직하다.Preferably, the apparatus further includes a mode selection unit for ending a frequency synchronization mode for performing frequency synchronization and switching to a symbol timing synchronization mode for performing symbol timing synchronization.
또한, 상기 동기 신호는 OFDM 심볼길이의 1/2 이하인 것이 바람직하다.In addition, the synchronization signal is preferably less than 1/2 of the OFDM symbol length.
또한, 상기 피크 플랫 검출부는 자기상관값과 임계값의 차 또는 비를 구하여 그 값이 소정값 이상인 구간을 플랫 구간으로서 검출하는 것이 바람직하다.In addition, it is preferable that the peak flat detector detects the difference or the ratio between the autocorrelation value and the threshold value and detects the section whose value is equal to or greater than a predetermined value as the flat section.
대안적으로, 상기 피크 플랫 검출부는 자기상관값이 임계값 이상이 되는 지점에서 소정의 샘플 길이에 해당하는 구간을 플랫 구간으로서 검출하여도 무방하더.Alternatively, the peak flat detector may detect a section corresponding to a predetermined sample length as a flat section at a point where the autocorrelation value becomes greater than or equal to a threshold.
또한, 대안적으로, 상기 피크 플랫 검출부는 자기상관값이 임계값 이상이 되는 지점이후에 소정 개수의 샘플에 대한 합을 구하는 합산수단; 및 상기 합과 임계값의 차 또는 비를 구하여 그 값이 소정값 이상인 구간을 플랫 구간으로서 검출하는 플랫구간 검출수단;을 포함하여 이루어질 수 있다.Further, alternatively, the peak flat detector comprises: summing means for obtaining a sum for a predetermined number of samples after a point at which the autocorrelation value becomes equal to or greater than a threshold value; And a flat section detecting means for obtaining a difference or ratio between the sum and a threshold and detecting a section having a value greater than or equal to a predetermined value as a flat section.
또한, 상기 주파수 옵셋 추정부는 상기 구간내에서 주파수 옵셋 추정을 2 회 이상 수행함으로써 주파수 옵셋값을 구하고 상기 주파수 옵셋값을 합산하는 주파수옵셋추정부; 및 상기 합산된 주파수 옵셋값을 평균하여 주파수 옵셋값을 구하는 평균화수단;을 포함하여 이루어질 수 있다.The frequency offset estimating unit may include: a frequency offset estimating unit that obtains a frequency offset value by performing at least two frequency offset estimations in the interval and adds the frequency offset values; And averaging means for obtaining a frequency offset value by averaging the summed frequency offset value.
상기 다른 과제를 이루기 위하여 본 발명에 따른 심볼 타이밍 및 주파수 동기 방법은 직교주파수분할다중화(OFDM) 신호로부터 주파수 동기와 심볼 타이밍 동기를 획득하기 위한 주파수 및 심볼 타이밍 동기 방법에 있어서, (a) 적어도 세 개 이상의 동일한 동기 신호를 사용하여 동기 심볼을 구성하는 단계; (b) 상기 동기 심볼을 포함하는 데이터를 소정의 지연량 만큼 지연시켜 수신데이터와 자기 상관을 수행하고, 정규화를 수행하여 정규화된 자기 상관값이 소정의 임계값 이상이 되는 구간을 플랫(flat) 구간으로서 검출하는 단계; (c) 상기 구간내에서 주파수 옵셋을 추정하여 주파수 옵셋값을 구하는 단계; (d) 상기 주파수 옵셋값을 사용하여 수신신호에 대하여 주파수 옵셋 보상을 수행하는 단계; 및 (e) 주파수 옵셋이 보상된 신호와 기준신호를 사용하여 심볼 타이밍 동기를 수행하는 단계;를 포함하는 것을 특징으로 한다.In order to achieve the above object, the symbol timing and frequency synchronization method according to the present invention is a frequency and symbol timing synchronization method for acquiring frequency synchronization and symbol timing synchronization from an orthogonal frequency division multiplexing (OFDM) signal. Constructing a sync symbol using at least one same sync signal; (b) auto-correlate with the received data by delaying the data including the synchronization symbol by a predetermined delay amount, and performing normalization to flatten a section where the normalized autocorrelation value becomes greater than or equal to a predetermined threshold value. Detecting as an interval; (c) estimating a frequency offset within the interval to obtain a frequency offset value; (d) performing frequency offset compensation on the received signal using the frequency offset value; And (e) performing symbol timing synchronization using the signal with the frequency offset compensated and the reference signal.
이하 첨부된 도면들을 참조하여 본 발명의 바람직한 실시예들을 상세히 기술하기로 한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
도 2에는 본 발명의 실시예에 따른 직교주파수분할다중화(OFDM) 신호의 주파수 및 심볼 타이밍 동기 장치를 흐름도로써 도시하였으며, 도 3에는 상기 장치에서 수행되는 본 발명의 실시예에 따른 직교주파수분할다중화(OFDM) 신호의 주파수 및 심볼 타이밍 동기 방법을 흐름도로써 도시하였다. 또한, 도 4a 내지 도 4c에는 본 발명의 직교주파수분할다중화(OFDM) 신호의 주파수 및 심볼 타이밍 동기 장치 및 방법의 동작을 설명하기 위한 도면을 도시하였다. 도 3와 도 4a 내지 도 4c는 이하에서 수시로 참조된다.FIG. 2 is a flowchart illustrating a frequency and symbol timing synchronization apparatus of an orthogonal frequency division multiplexing (OFDM) signal according to an embodiment of the present invention, and FIG. 3 illustrates an orthogonal frequency division multiplexing according to an embodiment of the present invention performed in the apparatus. A frequency and symbol timing synchronization method of the (OFDM) signal is shown in a flowchart. 4A to 4C are diagrams for explaining the operation of the frequency and symbol timing synchronizing apparatus and method of an orthogonal frequency division multiplexing (OFDM) signal of the present invention. 3 and 4A-4C are often referenced below.
도 2를 참조하면, 본 발명에 의한 직교주파수분할다중화(OFDM) 신호의 주파수 및 심볼 타이밍 동기 장치는 모드 선택부(20), 자기상관부(21), 주파수 동기부(22), 주파수 옵셋 보상부(23), 교차상관부(24), 및 심볼타이밍 동기부(25)를 포함한다. 자기상관부(21)는 지연부(212), 복소공액부(214), 승산기(216), 이동평균계산부(218), 및 정규화부(219)를 포함한다. 주파수 동기부(22)는 비교부(222), 피크 플랫 검출부(224), 및 주파수 옵셋 추정부(226)를 구비한다. 교차상관부(24)는 기준신호 발생부(242), 복소공액부(244), 승산기(246), 이동평균 계산부(248), 및 정규화부(249)를 포함한다.Referring to FIG. 2, the frequency and symbol timing synchronizing apparatus of an orthogonal frequency division multiplexing (OFDM) signal according to the present invention includes a mode selecting unit 20, an autocorrelation unit 21, a frequency synchronizing unit 22, and frequency offset compensation. A unit 23, a cross correlation unit 24, and a symbol timing synchronization unit 25 are included. The autocorrelation unit 21 includes a delay unit 212, a complex conjugate unit 214, a multiplier 216, a moving average calculator 218, and a normalization unit 219. The frequency synchronizer 22 includes a comparator 222, a peak flat detector 224, and a frequency offset estimator 226. The cross correlation unit 24 includes a reference signal generator 242, a complex conjugate unit 244, a multiplier 246, a moving average calculator 248, and a normalizer 249.
도 4a 내지 도 4c에는 본 발명의 직교주파수분할다중화(OFDM) 신호의 주파수 및 심볼 타이밍 동기 장치 및 방법의 동작을 설명하기 위한 도면을 도시하였다.4A to 4C are diagrams for explaining the operation of the frequency and symbol timing synchronizing apparatus and method of an orthogonal frequency division multiplexing (OFDM) signal of the present invention.
상기와 같은 장치는 직교주파수분할다중화(이하 OFDM이라 칭함) 신호를 수신한다. OFDM 신호는 프리앰블(preamble)과 페이로드(payload)로 이루어진다. 프리앰블은 AGC(automatic gain control: 자동이득제어) 심볼과 동기심볼을 포함한다. 본 실시예에서 사용되는 동기심볼은 도 4a에 도시된 바와 같이 네 개의 동일한 동기 신호(SYNC_A)를 사용하여 구성된 동기 심볼을 포함한다. 즉, 본 실시예에서는 OFDM 심볼길이인 63의 1/2인 32인 네 개의 심볼을 사용하여 동기 심볼을 구성(단계 300)하고, 이러한 동기심볼을 포함하는 OFDM 신호가 입력되는 것으로 가정한다. 동기 심볼의 길이는 OFDM 심볼 길이의 1/2이하인 것이 바람직하다.Such a device receives an orthogonal frequency division multiplexing (hereinafter, referred to as OFDM) signal. The OFDM signal consists of a preamble and a payload. The preamble includes an AGC (automatic gain control) symbol and a sync symbol. The sync symbol used in this embodiment includes a sync symbol configured using four identical sync signals SYNC_A as shown in FIG. 4A. That is, in the present embodiment, it is assumed that four symbols, 32, which is 1/2 of the OFDM symbol length of 32, are configured (step 300), and it is assumed that an OFDM signal including the synchronization symbol is input. The length of the sync symbol is preferably 1/2 or less of the length of the OFDM symbol.
모드 선택부(20)는 초기에 주파수 동기를 수행하기 위한 주파수 동기모드를 선택한다. 지연부(212)는 수신된 데이터를 동기 심볼에 사용된 각 심볼의 길이인 32에 해당하는 소정의 지연량(D) 만큼 지연(단계 302)시킨다. 복소공액부(214)는 지연된 데이터를 복소공액화한다. 승산기(216)는 수신 데이터와 지연된 데이터를 곱하고, 이동평균계산부(218)에서는 이동 평균(moving average)을 계산한다. 여기서, 이동 평균를 위한 창 크기(window size)는 지연량 D, 즉, 32에 해당한다. 이와같이, 승산기(216) 및 이동평균계산부(218)는 자기상관을 수행(단계 304)하며, 자기상관값을 출력한다. 다음으로, 정규화부(219)는 자기상관값을 정규화한다(단계 306). 결과적으로, 자기상관부(21)에서는 정규화된 자기상관값이 출력된다.The mode selector 20 initially selects a frequency synchronization mode for performing frequency synchronization. Delay unit 212 is the received data Is delayed (step 302) by a predetermined delay amount D corresponding to 32, which is the length of each symbol used in the sync symbol. Complex conjugate 214 is delayed data Complex conjugate. Multiplier 216 receives data And delayed data Multiplying by the moving average calculating unit 218 calculates a moving average. Here, the window size for the moving average corresponds to the delay amount D, that is, 32. As such, the multiplier 216 and the moving average calculator 218 perform autocorrelation (step 304), and output the autocorrelation value. Next, the normalization unit 219 normalizes the autocorrelation value (step 306). As a result, the autocorrelation unit 21 outputs a normalized autocorrelation value.
비교부(222)는 정규화된 자기 상관값과 소정의 임계값을 비교한다(단계 308). 피크 플랫 검출부(224)는 도 4b에 도시된 바와 같이 정규화된 자기 상관값이 소정의 임계값 이상인 구간을 플랫(flat) 구간으로서 검출(단계 310)한다. 피크 플랫 검출부(224)는 자기상관값과 임계값의 차 또는 비를 구하여 그 값이 소정값 이상인 구간을 플랫 구간으로서 검출하는 것이 가능하다. 대안적으로, 피크 플랫 검출부(224)는 자기상관값이 임계값 이상이 되는 지점에서 소정의 샘플 길이에 해당하는 구간을 플랫 구간으로서 검출하는 것도 가능하다. 또한, 대안적으로, 피크 플랫 검출부(224)는 자기상관값이 임계값 이상이 되는 지점이후에 소정 개수의 샘플에 대한 합을 구하는 합산수단(미도시)과 상기 합과 임계값의 차 또는 비를 구하여 그 값이 소정값 이상인 구간을 플랫 구간으로서 검출하는 플랫구간 검출수단(미도시)를 구비하여 이루어질 수도 있다.The comparator 222 compares the normalized autocorrelation value with a predetermined threshold value (step 308). As illustrated in FIG. 4B, the peak flat detector 224 detects a section in which the normalized autocorrelation value is greater than or equal to a predetermined threshold value as a flat section (step 310). The peak flat detector 224 can obtain a difference or ratio between the autocorrelation value and the threshold value and detect a section having a value greater than or equal to a predetermined value as a flat section. Alternatively, the peak flat detector 224 may detect a section corresponding to a predetermined sample length as a flat section at a point where the autocorrelation value becomes greater than or equal to the threshold. Further, alternatively, the peak flat detector 224 is a summation means (not shown) for obtaining a sum for a predetermined number of samples after the point at which the autocorrelation value becomes equal to or greater than the threshold value and the difference or ratio between the sum and the threshold value. It may also be provided with a flat section detection means (not shown) to obtain a and detect a section whose value is more than a predetermined value as a flat section.
이제, 주파수 옵셋 추정부(226)는 상기 플랫 구간내에서 주파수 옵셋을 추정하여 주파수 옵셋값을 구한다(단계 312). 이때, 주파수 옵셋 추정은 상기 플랫 구간내의 임의의 지점에서 수행하는 것이 가능하므로, 약 ±16 샘플 정도의 오차를 허용한다. 주파수 옵셋 추정부(226)는, 또한, 주파수 옵셋값의 추정이 완료되면, 모드선택부(20)로 입력되는 모드제어신호(mode_ctrl)를 출력한다. 이로써, 주파수 동기부(22)는 플랫 구간내에서 주파수 옵셋을 추정하여 주파수 옵셋값을 구한다.Now, the frequency offset estimator 226 estimates the frequency offset within the flat period to obtain a frequency offset value (step 312). In this case, since the frequency offset estimation can be performed at any point in the flat interval, an error of about ± 16 samples is allowed. The frequency offset estimator 226 also outputs a mode control signal mode_ctrl input to the mode selector 20 when the estimation of the frequency offset value is completed. As a result, the frequency synchronizer 22 estimates the frequency offset within the flat period to obtain a frequency offset value.
대안적으로, 주파수 옵셋 추정부(226)는 플랫 구간내에서 주파수 옵셋 추정을 2 회 이상 수행함으로써 주파수 옵셋값을 구하고 상기 주파수 옵셋값을 합산하는 주파수옵셋추정부(미도시), 및 상기 합산된 주파수 옵셋값을 평균하여 주파수 옵셋값을 구하는 평균화수단(미도시)를 구비하여 이루어질 수도 있다.Alternatively, the frequency offset estimator 226 obtains a frequency offset value by performing the frequency offset estimation two or more times in the flat period, and adds the frequency offset value (not shown), and the summation. Averaging means (not shown) which averages the frequency offset values to obtain the frequency offset values may be provided.
다음으로, 모드 선택부(20)는 모드제어신호(mode_ctrl)에 응답하여 주파수 동기모드를 종료하고 심볼 타이밍 동기를 수행하기 위한 심볼 타이밍 동기 모드로 절환시킨다.Next, the mode selector 20 ends the frequency synchronization mode in response to the mode control signal mode_ctrl and switches to the symbol timing synchronization mode for performing symbol timing synchronization.
주파수 옵셋 보상부(23)는 주파수 동기부(22)에 의하여 구해진 상기 주파수 옵셋값을 사용하여 수신신호에 대하여 주파수 옵셋 보상을 수행한다.The frequency offset compensator 23 performs frequency offset compensation on the received signal using the frequency offset value obtained by the frequency synchronizer 22.
기준신호 발생부(242)는 기준신호를 출력하고, 복소공액부(244)는 상기 기준신호를 복소공액화한다. 승산기(246)는 복소공액화된 기준신호와 주파수 옵셋이 보상된 신호를 곱하고, 이동평균 계산부(248)에서는 이동평균을 계산한다. 즉, 승산기(246)와 이동평균계산부(248)에 의하여 교차상관이 수행됨으로써 교차상관값이 구해진다. 정규화부(249)는 교차상관값을 정규화한다. 이로써, 교차상관부(24)는 주파수 옵셋이 보상된 신호와 기준신호를 사용하여 교차상관을 수행하고 정규화를 수행함으로써 정규화된 교차 상관값을 출력한다.The reference signal generator 242 outputs a reference signal, and the complex conjugate 244 complex conjugates the reference signal. The multiplier 246 multiplies the complex conjugated reference signal by the signal compensated for the frequency offset, and the moving average calculator 248 calculates a moving average. That is, cross correlation is performed by the multiplier 246 and the moving average calculator 248 to obtain a cross correlation value. The normalization unit 249 normalizes the cross correlation value. As a result, the cross-correlation unit 24 performs cross-correlation using the signal compensated for the frequency offset and the reference signal, and outputs a normalized cross-correlation value by performing normalization.
심볼타이밍 동기부(25)는 도 4c에 도시된 바와 같이 상기 교차상관값이 최대가 되는 지점을 검출한다. 이때, 수신된 신호가 주파수 옵셋이 보상되어 있기 때문에 최대점을 정확하게 추정할 수 있다. 따라서, 정확하게 추정된 최대점을 사용하여 심볼 타이밍 추정을 수행함으로써 심볼 타이밍 오류를 줄일 수 있다.The symbol timing synchronization unit 25 detects the point where the cross correlation value becomes the maximum as shown in FIG. 4C. At this time, since the frequency offset is compensated for the received signal, the maximum point can be estimated accurately. Therefore, symbol timing error can be reduced by performing symbol timing estimation using the correctly estimated maximum point.
이상에서와 같이 본 발명에 의한 심볼 타이밍 및 주파수 동기 장치 및 방법은 주파수 동기와 심볼 타이밍 동기를 순차적으로 수행하고, 약 ±16 샘플 정도의 오차를 허용하는 것과 같이 허용할 수 있는 샘플 오차가 크기 때문에 정확한 주파수 동기가 가능하다. 또한, 정확하게 추정된 최대점을 사용하여 심볼 타이밍 추정을 수행함으로써 심볼 타이밍 오류를 줄일 수 있다.As described above, the apparatus and method for symbol timing and frequency synchronization according to the present invention perform frequency synchronization and symbol timing synchronization sequentially, and the allowable sample error is large, such as allowing an error of about ± 16 samples. Accurate frequency synchronization is possible. In addition, symbol timing error can be reduced by performing symbol timing estimation using the correctly estimated maximum point.
또한, 본 발명에 의한 심볼 타이밍 및 주파수 동기 장치 및 방법은 심볼 간격보다 작은 주파수 옵셋을 규정하여 정수배의 주파수 옵셋이 필요하지 않은 광대역 무선 LAN에 적합하다.In addition, the symbol timing and frequency synchronization device and method according to the present invention define a frequency offset smaller than the symbol interval so that it is suitable for a wideband wireless LAN in which an integer multiple frequency offset is not required.
상술한 바와 같이 본 발명에 의한 심볼 타이밍 및 주파수 동기 장치 및 방법은 허용할 수 있는 샘플 오차가 크기 때문에 정확한 주파수 동기가 가능하고, 주파수 옵셋이 보상된 신호를 사용하여 심볼 타이밍 동기를 획득하기 때문에 심볼 타이밍 오류를 줄일 수 있다. 또한, 본 발명은 심볼 간격보다 작은 주파수 옵셋을 규정하여 정수배의 주파수 옵셋이 필요하지 않은 광대역 무선 LAN에 적합하다.As described above, the symbol timing and frequency synchronizing apparatus and method according to the present invention allow accurate frequency synchronization because the allowable sample error is large, and symbol timing synchronization is obtained by using a signal whose frequency offset is compensated. Timing errors can be reduced. In addition, the present invention is suitable for a wideband wireless LAN in which a frequency offset smaller than the symbol interval is defined so that an integer multiple frequency offset is not required.
Claims (14)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
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KR1019990022297A KR100335443B1 (en) | 1999-06-15 | 1999-06-15 | Symbol timing and frequency synchronizing device for OFDM signals and method thereof |
CNB008089523A CN1229933C (en) | 1999-06-15 | 2000-06-15 | Apparatus and method for achieving symbol timing and frequency synchronization to orthogonal frequency division multiplexing signal |
US10/009,772 US7058151B1 (en) | 1999-06-15 | 2000-06-15 | Apparatus and method for achieving symbol timing and frequency synchronization to orthogonal frequency division multiplexing signal |
AT00935723T ATE274270T1 (en) | 1999-06-15 | 2000-06-15 | METHOD AND DEVICE FOR Achieving SYMBOL SAMPLING AND FREQUENCY SYNCHRONIZATION OF AN ORTHOGONAL FREQUENCY MULTIPLEX SIGNAL |
JP2001504099A JP3542581B2 (en) | 1999-06-15 | 2000-06-15 | Apparatus and method for symbol timing and frequency synchronization of orthogonal frequency division multiplex modulation signal |
DE60013129T DE60013129T2 (en) | 1999-06-15 | 2000-06-15 | METHOD AND DEVICE FOR OBTAINING SYMBOL ASSAY AND FREQUENCY SYNCHRONIZATION OF AN ORTHOGONAL FREQUENCY MULTIPLEX SIGNAL |
EP00935723A EP1188266B1 (en) | 1999-06-15 | 2000-06-15 | Apparatus and method for achieving symbol timing and frequency synchronization to orthogonal frequency division multiplexing signal |
PCT/KR2000/000633 WO2000077961A1 (en) | 1999-06-15 | 2000-06-15 | Apparatus and method for achieving symbol timing and frequency synchronization to orthogonal frequency division multiplexing signal |
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KR1019990022297A KR100335443B1 (en) | 1999-06-15 | 1999-06-15 | Symbol timing and frequency synchronizing device for OFDM signals and method thereof |
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EP (1) | EP1188266B1 (en) |
JP (1) | JP3542581B2 (en) |
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Also Published As
Publication number | Publication date |
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WO2000077961A1 (en) | 2000-12-21 |
DE60013129D1 (en) | 2004-09-23 |
EP1188266A4 (en) | 2002-11-04 |
JP2003502903A (en) | 2003-01-21 |
EP1188266B1 (en) | 2004-08-18 |
US7058151B1 (en) | 2006-06-06 |
KR100335443B1 (en) | 2002-05-04 |
CN1355971A (en) | 2002-06-26 |
EP1188266A1 (en) | 2002-03-20 |
JP3542581B2 (en) | 2004-07-14 |
ATE274270T1 (en) | 2004-09-15 |
DE60013129T2 (en) | 2005-08-18 |
CN1229933C (en) | 2005-11-30 |
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