KR20000032681A - Method for managing state using communication message between processes - Google Patents

Abstract

PURPOSE: A method for managing state using communication message between processes is provided to decrease a loss of cells by performing a state report, a failure monitoring, and a failure recovery of a cell multiplexer and demultiplexer board assembly(CMDA). CONSTITUTION: It is tested as to whether an error is occurred when an interrupt for informing an obstacle/failure of a CMDA board(604,605). A firmware(52) re-operates the CMDA board to perform an initial work when the error is occurred(601). The firmware(52) performs a basic operation continuously when the error is occurred. A signal of a message is analyzed when a message receiving interrupt is generated from a upper processor(606,607). It is judged as to whether the CMDA board is reset when a board reset request signal is received from the upper processor(608). The CDMA board is operated and the firmware performs an initial work when the received board reset request signal is a reset command(601). A basic operation of the firmware is continuously performed when the received board reset request signal is the reset command(603).

Description

State management method using interprocessor communication message

The present invention provides a status report, fault monitoring and monitoring of a cell multiplexer demultiplexer board assembly (CMDA) having multiple ports in a system having a distributed / hierarchical structure such as an asynchronous transfer mode (ATM) exchange. The present invention relates to a state management method capable of reducing a cell loss by performing a fault recovery function.

Since the ATM cell processor is a cell multiplexing / demultiplexing device (CMDA) to which multiprocessors are connected, the failure of the CMDA causes a large amount of cell loss, and thus, state management such as continuous status reporting, fault detection, and fault recovery is required.

The conventional fault monitoring method of the cell multiplexing / demultiplexing device detects a hardware-diagnosed fault and solves itself, and is not efficiently managed by an operator because it is not reported to a higher processor. Therefore, in the related art, a large amount of cells are lost and the service is disconnected or the cause cannot be accurately determined, and as a result, the operator cannot take corrective action.

In addition, the conventional monitoring method in the upper processor is a periodic failure method through hardware time-out by transmitting and receiving a watch-dog of a TAXI (Transparent Asynchronous Xmiter) link, and detecting a failure of the physical link layer. And recovery was limited to only, and even the result was not reported to the operator, there was a problem that the system management of the operator is difficult.

The present invention has been made to solve the problems described above, the present invention provides a system multiplexing / demultiplexing device (CMDA) in which the system operating processor is redundantly operated in a system having a distributed / hierarchical structure such as an asynchronous transfer mode (ATM) exchange. State management method to reduce cell loss by reporting to the upper processor by using interprocessor communication (IPC) message to efficiently manage the status, and quickly detecting the failure of the CMDA and reporting it to the upper processor or recovering itself. And a computer readable recording medium having recorded thereon a program for realizing the same.

1 is a block diagram of an asynchronous transfer mode (ATM) exchange to which the present invention is applied.

2A and 2B are exemplary views illustrating a configuration of a taxi (TAXI) port and a virtual path identifier (VPI) table of a cell multiplexing / demultiplexing device used in the present invention.

3 is an exemplary configuration diagram of a cell multiplexing / demultiplexing apparatus to which the present invention is applied.

4A and 4B are explanatory diagrams showing a board address setting register map and an address table of a cell multiplexing / demultiplexing apparatus used in the present invention;

5 is an explanatory diagram illustrating a message procedure between a management module of an upper processor and firmware of a cell multiplexing / demultiplexing apparatus according to the present invention;

6 is a flowchart illustrating a state management method in firmware of a cell multiplexing / demultiplexing apparatus according to the present invention;

* Explanation of symbols for the main parts of the drawings

11 processor 12 cell multiplexing / demultiplexing device (CMDA)

13: switching block

The present invention for achieving the above object, in the state management method applied to a system having a distributed / hierarchical structure, when the board is turned on, the device processor is operated to perform the normal operation of the board after performing the initialization operation between the processors A first step of reporting to an operating processor through a communication (IPC) message; In response to a periodic status report request of the operating processor, the device processor checking a status of the board and reporting the status to the operating processor through an interprocessor communication (IPC) message; In operation of the board, the device processor detecting a failure of the board as an interrupt and recovering a recoverable failure by itself, and restarting the board to recover from the failure in the case of an unrecoverable failure; And diagnosing the operation of the board by setting and canceling a timer for diagnosing a failure of the board by the device processor during operation of the board, and restarting the board to recover the failure after the timer expires. A fourth step is included.

In addition, the present invention, in a system having a distributed / hierarchical structure having a processor, when the board is turned on, after the device processor is operated to perform the initialization operation, the normal operation of the board through the inter-processor communication (IPC) message A first function of reporting to an operating processor; A second function of checking, by the device processor, the state of the board according to the periodic status report request of the operating processor and reporting the status to the operating processor through the interprocessor communication (IPC) message; A third function in which the device processor detects a failure of the board as an interrupt and recovers a recoverable failure by itself, and restarts the board in the event of an unrecoverable failure in the operation of the board; And diagnosing the operation of the board by setting and canceling a timer for diagnosing a failure of the board by the device processor during operation of the board, and restarting the board to recover the failure after the timer expires. A computer readable recording medium having recorded thereon a program for realizing the fourth function is provided.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of an asynchronous transfer mode (ATM) exchange to which the present invention is applied.

As shown in FIG. 1, the cell multiplexing / demultiplexing device (CMDA) 12 of the ATM switch to which the present invention is applied is configured as redundancy and dual-active, so that both boards have a failure. Only cell loss occurs, resulting in service interruption. However, when one board is rebooted due to hernia, power-off, or failure, the other board detects the situation and reports the situation to the upper processor 11, so that the upper processor 11 is a cell multiplexing / demultiplexing device ( It is possible to determine whether the link setting and the connection state of the boards matched with the CMDA) 12 are correct.

The cell multiplexing / demultiplexing unit (CMDA) 12 has multiple taxi (TAXI) ports for connecting up to four redundant processors, and the taxi (TAXI) cable is also dually connected. Accordingly, a cell transmitted from one processor 11 is transferred to both CMDA A / B boards, and vice versa, a cell received from a cell multiplexer / demultiplexer (CMDA) 12 is transferred to both processors 11. 11) You must select a TAXI port to receive.

In order to select a TAXI port, the processor 11 sends a hardware Watch-Dog to a cell multiplexer / demultiplexer (CMDA), so that the watch-to-cell at the cell multiplexer / demultiplexer (CMDA) 12 is selected. When a dog is received, it keeps the currently selected port; if not, it selects a different TAXI cable.

The cable selection method as described above applies equally to the cell multiplexing / demultiplexing device (CMDA) 12 and the switching block 13.

As such, the cell multiplexing / demultiplexing device (CMDA) 12 needs a function of managing and reporting the state of each TAXI port since the multiple processors 11 may be connected to a TAXI. Failure of these ports is an important factor in the flow of IPC messages.

2A and 2B are exemplary views illustrating a configuration of a taxi (TAXI) port and a virtual path identifier (VPI) table of a cell multiplexing / demultiplexing apparatus used in the present invention.

As shown in FIG. 2A, each port of a cell multiplexer / demultiplexer (CMDA) is connected to four processors, respectively, and one port is used to carry an IPC message of the cell multiplexer / demultiplexer (CMDA) itself. Is used.

The method for distributing a cell to multiple processors connected to a cell multiplexing / demultiplexing device (CMDA) 12 refers to a virtual path identifier (VPI) value in an ATM cell head, and to a corresponding port of a VPI set in a VPI table. Send the cell to.

Specifically, as shown in the cell multiplexing / demultiplexing device (CMDA) virtual path identifier (VPI) table of FIG. 2B, all cells received with "VPI 0" are delivered to the processors 1 and 2, and "VPI". All cells received with 240 "are multicast to processors 1,2,3,4. The cell received with "VPI 255" is first-in first-out (FIFO) in the cell multiplexing / demultiplexing device (CMDA) itself. That is, cells transferred between the upper processor and the cell multiplexing / demultiplexing device (CMDA) are received with "VPI 255".

FIG. 3 is an exemplary configuration diagram of a cell multiplexing / demultiplexing apparatus to which the present invention is applied. In the drawing, “121” represents a multiplexer (MUX) and “122” represents a demultiplexer (DEMUX), respectively.

As shown in FIG. 3, a cell multiplexing / demultiplexing device (CMDA) 12 to which the present invention is applied is connected to M processors 11.

The cell multiplexer / demultiplexer (CMDA) 12 sends cells transmitted from the M processors 11 through the multiplexer (MUX) 121 to the 155M link, and transmits the cells received on the 155M link to the VPI table (FIG. 2B) through the demultiplexer (DeMux) 122 to the M processors (11).

Accordingly, the cell multiplexing / demultiplexing apparatus (CMDA) 12 is a cell processing apparatus that multiplely connects the low speed processor 11 to make the most of the high speed ATM link.

The primary purpose of the cell multiplexing / demultiplexing device (CMDA) 12 is to provide a multiplexing function for sending cells transferred from the multiple processor 11 to the ATM switching block 13 and the cells transferred in the ATM switching block 13. As a demultiplexing function for delivering to multiple processors 11, the unit of delivery is a cell. Since these functions are performed by hardware logic, communication with the upper processor 11 is not necessary.

However, for periodic reporting of the state of the cell multiplexing / demultiplexing device (CMDA) 12 and for urgent state reporting, message communication with the higher processor 11 is required. That is, interprocessor communication (IPC) is required. For this IPC, each device must have an address of the processor 11, which is converted into a VPI and a virtual channel identifier (VCI) at the ATM exchange.

4A and 4B are explanatory diagrams showing a board address setting register map and an address table of a cell multiplexing / demultiplexing apparatus used in the present invention.

As shown in FIG. 4A, the processor address of the cell multiplexing / demultiplexing device (CMDA) is represented by an 8-bit register.

In this example, the maximum number of subsystems is assumed to be 64, and the left side is considered sideA and the right side is sideB. In addition, the board address is set as a strap on the back board, and since the CMDA board is always mounted in redundancy, one bit is required to distinguish the A / B side.

Therefore, the address bit allocation of the CMDA board is shown in FIG. 2.

Referring to FIG. 4B, an address is assigned to each subsystem by 0x80, the cell multiplexing / demultiplexing device (CMDA) 12 has an address of 0x30 in one subsystem, and an address is 1 according to the A / B side. Because of the difference, the board address of CMDA is (value of B6 ~ B1) × 0x80 + 0x30 + B0.

FIG. 5 is an explanatory diagram illustrating a message procedure between a management module of a higher processor and a firmware of a cell multiplexing / demultiplexing device according to the present invention, and is mounted in a ROM of a cell multiplexing / demultiplexing device (CMDA) 12. The message transmission relationship between the firmware 52 and the management module 51 present on the upper processor 11 managing this device is shown.

The present invention periodically reports the state of the device to the upper processor 11 for efficient management of the cell multiplexing / demultiplexing device (CMDA) 12 in a large system requiring high reliability consisting of multiple boards. Rapid condition detection and action can be taken. In addition, the present invention detects a failure of the cell multiplexing / demultiplexing device (CMDA) 12 operating in redundancy and reports to the upper processor 11 to inform the cause of cell loss, detects the failure of the counterpart board and the counterpart board The state of hernia / mounting / reset and the like is reported to the upper processor 11 to inform the operator.

As shown in FIG. 5, the message procedure between the management module 51 of the upper processor 11 and the firmware 52 of the cell multiplexing / demultiplexing device (CMDA) 12 according to the present invention is a first. When powered on, firmware 52 is operated to perform an initialization task.

After the initialization operation of the firmware 52 is finished, the firmware 52 transmits an initialization termination message to the management module 51 to inform the normal operation of the cell multiplexing / demultiplexing device (CMDA) 12.

Then, when the management module 51 receiving the initialization termination message transmits a message for checking the version of the firmware 52 (502), the firmware 52 is the version of the firmware 52, the module name of the device, the firmware By transmitting information, such as the last modified date of 52, to the management module 51 (503), the management module 51 facilitates accurate management of the firmware 52.

After the initial process and the above process, the cell multiplexing / demultiplexing device (CMDA) 12 waits for a signal message transmitted from the management module 51 of the upper processor 11, when a periodic state management signal message is received ( In operation 504, the current state of the cell multiplexing / demultiplexing device (CMDA) 12 is checked to transmit the periodic status report signal, and the periodic status report signal message is transmitted to the upper processor 11 as status information (505).

Here, the items to be reported as status information are the state of the clock board (Aside) and the clock board (Bside), and the clock board (A / B) currently selected by the cell multiplexer / demultiplexer (CMDA) 12. ), 155M link (A / B) selection, and the other board's hermetic / mounting status. In addition, the upper processor 11 may request reset and transfer of the CMDA board operated by redundancy. Here, the type of reset request can be reset unconditionally and reset each of Aside and Bside.

This reset allows the operator to change the selection state of the clock, 155M link, and TAXI link. In addition, an emergency situation such as dismounting / mounting of the counterpart board is received as an interrupt in the CMDA board and transmitted to the upper processor 11 as an emergency report signal message (506).

6 is a flowchart illustrating a state management method in firmware of a cell multiplexing / demultiplexing apparatus according to the present invention.

According to the present invention, the continuous state of the cell multiplexer / demultiplexer 12 is maintained by the upper processor 11 through the periodic status report function using the IPC message of the ATM cell multiplexer / demultiplexer (CMDA) 12 operated in redundancy. By managing and detecting the counterpart board and its failure of the cell multiplexing / demultiplexing device 12 which is operated in a redundant manner, it is possible to prevent a large amount of cell loss by recovering itself or switching to the counterpart board.

As shown in FIG. 6, in the state management method of the firmware 52 of the cell multiplexing / demultiplexing apparatus 12 according to the present invention, the firmware 52 is operated by first operating a cell multiplexing / demultiplexing apparatus (CMDA) board. In operation 601, an initialization operation is performed. At this time, initialization of variables used in the firmware 52, initialization of CPU related registers, initialization of various chips, registration of an interrupt service routine, and the like are performed in the initialization process.

Thereafter, when the initialization process of the firmware 52 is completed, the firmware 52 transmits a firmware initialization termination message to the upper processor 51 to inform that the CMDA board is ready (602). Perform 603.

First, if an interrupt indicating a failure / failure of the CMDA board occurs (604), it is checked whether a fatal error has occurred by a function of handling the failure / failure interrupt (605).

As a result of the check, if a fatal error occurs in the CMDA board, the CMDA board is restarted to perform initialization in the firmware 52 (601). After the resolution, the error occurrence is stored as log data, the cause of the interrupt is output to the monitor, and the basic operation of the firmware 52 is continued (603).

Second, when a message receiving interrupt is generated from the upper processor 11 (606), the signal of the message is analyzed (607) by the function of processing the signal receiving interrupt.

As a result of the analysis, when a board reset request signal is received from the upper processor 11, it is determined whether to reset the board (608). If the reset command is performed, the CMDA board is operated to perform an initialization operation in the firmware 52 (601). If not the reset command, the basic operation of the firmware 52 is continued (603). Here, the board reset request signal is a function when the operator restarts the CMDA board and can restart the Aside, Bside, and A / B boards. This function allows the operator to change the position of the CMDA board to which the processor 11 communicates and to change the position of the switch link that is actively connected to the CMDA.

As a result of the analysis, when the periodic state management signal is received from the upper processor 11, the firmware 52 periodically checks the state of the cell multiplexing / demultiplexing device 12 and checks the test result through the periodic state report signal message. After transmitting to (11) (609), the basic operation of the firmware 52 is continued (603). Here, the periodic state management signal is a function for periodically checking the state of the cell multiplexing / demultiplexing device 12, and the selected switch link (A / B), clock (A / B), and a board / mounting state of the other board. Instruct the firmware 52 to check periodically.

As a result of analysis, when operating various devices, there may be a problem that the firmware version of each cell multiplexing / demultiplexing device 12 does not match. Therefore, when a firmware version request and confirmation signal are received from the upper processor 11, In operation 52, after reporting the block name of the board, the firmware version, and the last modification date of the firmware to the upper processor 51 (610), the basic operation of the firmware 52 is continued (603).

Third, in order to diagnose a failure of the CMDA board and firmware 52, a software watch-dog time is set (611) to determine whether the watch-dog time has timed out (612). ).

As a result, when the watchdog is timed out due to a hardware logic or firmware failure, the CMDA board is operated to perform an initialization operation in the firmware 52 (601). Otherwise, the CMDA board is reset (613) after the watchdog is timed out. In order to diagnose a failure of the board and firmware 52, a software watch-dog time is set (611).

According to the present invention as described above, it is easy to manage the system of the operator and report the status to the upper processor by detecting the failure of the cell multiplexing / demultiplexing device and preventing the service disconnection due to cell loss. It can be applied to state management between higher processor and device board in high capacity system.

The present invention described above is capable of various substitutions, modifications, and changes without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains, and the above-described embodiments and accompanying It is not limited to the drawing.

The present invention as described above, the higher operating processor through the periodic status report using the inter-processor communication (IPC) message of the ATM cell multiplexing / demultiplexing device (CMDA) operating in redundancy of the cell multiplexing / demultiplexing device Continuous status management is possible, and by diagnosing and detecting the other party's board and its failure of CMDA, it is possible to prevent the service disconnection due to a large number of cell loss by recovering itself or switching to the other board.

Claims (8)

In the state management method applied to a system having a distributed / hierarchical structure, A first step of reporting a normal operation of the board to an operating processor through an interprocessor communication (IPC) message after the device processor is operated to perform an initialization operation when the board is turned on; In response to a periodic status report request of the operating processor, the device processor checking a status of the board and reporting the status to the operating processor through an interprocessor communication (IPC) message; In operation of the board, the device processor detecting a failure of the board as an interrupt and recovering a recoverable failure by itself, and restarting the board to recover from the failure in the case of an unrecoverable failure; And In operation of the board, the device processor sets and terminates a timer for diagnosing a failure of the board by itself, thereby diagnosing the operation of the board, and restarting the board to recover a failure when the timer expires. 4 steps State management method comprising a. The method of claim 1, The second step, A fifth step of analyzing, by the device processor, a signal of a message by a function of processing a signal reception interrupt when a message reception interrupt is generated from the operating processor; As a result of the analysis of the fifth step, when a board reset request signal is received from the operating processor, it is determined whether to reset the board. If a reset command is passed, the process proceeds to the first step. A sixth step of performing an operation; When the periodic status management signal is received from the operating processor as a result of the analysis of the fifth step, the device processor periodically checks the state of the board and transmits a test result to the operating processor through a periodic status report signal message. A seventh step of performing a basic operation of the device processor; And As a result of the analysis of the fifth step, when a device processor version request and confirmation signal are received from the operating processor, the device processor reports the block name of the board, the device processor version, and the last modified date information of the device processor to the operating processor. An eighth step of performing a basic operation of the device processor State management method comprising a. The method according to claim 1 or 2, The third step, A ninth step of checking whether a fatal error has occurred with a function of handling a failure / fault interrupt when an interrupt informing the failure / fault of the board occurs; And As a result of the inspection of the ninth step, if a fatal error occurs in the board, the process proceeds to the first step, and if it is not a fatal error and is self-recoverable, the device processor saves and monitors the error occurrence as log data after self-resolving. A tenth step of outputting the cause of the interrupt to the device processor and performing a basic operation of the device processor State management method comprising a. The method of claim 3, wherein The fourth step, An eleventh step of setting the timer to diagnose a failure of the board and the device processor; A twelfth step of determining whether the timer has elapsed; And As a result of the determination of the twelfth step, if the timer elapses due to a hardware logic or device processor failure, the thirteenth step is passed to the first step, and if the elapsed time has not passed, the timer is reset to the eleventh step after resetting the timer. State management method comprising a. The method of claim 4, wherein The board, Cell Multixer DeMultiplexer board Assembly (CMDA) board having multiple ports. The method of claim 5, Each message above, 8-bit board address register for interprocessor communication (IPC) address. The method of claim 5, The timer, Software watch-dog (Watch-Dog) Time management method, characterized in that the timer. In a system having a distributed / hierarchical structure with a processor, A first function of reporting a normal operation of the board to an operating processor through an interprocessor communication (IPC) message after the device processor is operated to perform an initialization operation when the board is turned on; A second function of checking, by the device processor, the state of the board according to the periodic status report request of the operating processor and reporting the status to the operating processor through the interprocessor communication (IPC) message; A third function in which the device processor detects a failure of the board as an interrupt and recovers a recoverable failure by itself, and restarts the board in the event of an unrecoverable failure in the operation of the board; And In operation of the board, the device processor sets and terminates a timer for diagnosing a failure of the board by itself, thereby diagnosing the operation of the board, and restarting the board to recover a failure when the timer expires. 4 functions A computer-readable recording medium having recorded thereon a program for realizing this.