KR0174406B1 - Alarm Collecting Device of Asynchronous Transfer Mode Electronic Switch and Its Operation Method - Google Patents

Abstract

The present invention collects hardware alarm sources generated from the various subsystems that make up an ATM switch, and quickly and effectively collects the collected alarm statuses. The Call and Connection Control Processor (CCCP) and the Operation and Maintenance Processor (OMP), a system operation maintenance processor, The purpose of the present invention is to provide an alarm collecting device and an operation method which are essential for ensuring reliability of subscriber service by quickly recovering a system to a normal state. In order to achieve the above object, the present invention is connected to the CPU (1), memory (2, 3), the buffer unit for collecting the alarm source, and the CPU (1) connected to the power reset, RAM selection (RAMSEL), ROM select (ROMSEL), output enable (OUT_EN) and address decoding functions and logic circuitry (5) consisting of Gate Array Logic (GAL), and the call processor connection control processor (Call and Connection Control) Processor and an interface unit 6 for interfacing with the system maintenance processor (OMP) and the CPU (1).

Description

Alarm Collection Method in Asynchronous Transfer Mode Switching System

1 is a basic structural diagram of an ATM switch.

2 is a configuration diagram of the connection with the peripheral hardware of the alarm collecting device (AGIA).

3 is a hardware alert collection logic diagram.

Figure 4 is a detailed configuration of the alarm collecting device (AGIA) to which the present invention is applied.

5 is a structural diagram of a CPU memory.

6 is a flow chart of the alarm collection method according to the present invention.

* Explanation of symbols for main parts of the drawings

1: CPU 2: ROM

3: RAM 4: buffer part

5: GAL 6: EIA-232C Interface

The present invention relates to an alarm collection method in an Asynchronous Transfer Mode (ATM) exchange system.

In general, it is required to quickly grasp the alarm signal generated from the various subsystems constituting the exchange and to perform appropriate measures. The alarm collector applied to the existing electronic switchboard is suitable for the synchronous transmission method. As it is operated, it is impossible to apply to asynchronous transfer board exchange.

The alarms handled by the Asynchronous Exchange (ATM) exchanges include the Eject Failure (EF), the Function Failure (FF), and the Power Failure (PF) warnings for the various subsystem hardwares that make up the exchange. In addition, it is classified and managed as dual failure (DF), input device (-48Vdc), fan unit malfunction, and system malfunction for temperature sensor.

There are two methods of collecting these alarms, one using hardware and one using software. Each control device (processor and controller) collects the fault alarm status in a hardware way for the devices under its control. The software is transferred to the operation maintaining processor of the switching system in a software and hardware manner.

Accordingly, the present invention collects hardware alert sources generated from the various subsystems of the ATM exchanger, delivers them to the exchange system quickly and effectively, and quickly recovers the corresponding obstacles to the normal state to secure the reliability of the subscriber service. Its purpose is to provide an alarm collection method that is essential to this.

In order to achieve the above object, an alarm collection method according to the present invention includes a CPU, a memory, a buffer 4 for collecting an alarm source, and a power reset, memory selection, output enable and address decoding functions connected to the CPU. 10. An alarm collection method in an asynchronous delivery mode switching system applied to an alarm collection device having a logic circuit unit for performing communication and an interface for communication with processors of an exchange system. Performing self-reading on alarm source data, reading alarm source data stored in the memory to update occurrence alarm data, and then notifying the alarm occurrence fact to the operation maintenance processor of the switching system; Transmitting a character code type alarm source data to the operation maintenance processor upon receiving an acknowledgment signal from the operation maintenance processor receiving the alarm occurrence report; A third step of notifying the completion of recovery to the operation maintenance processor when the alarm is restored, and releasing the recovered alarm status; And a fourth step of transmitting the stored entire alert source data when the periodic alert source data transmission request of the operation maintenance processor is requested.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a basic layout of an ATM switch to which the present invention is applied.

The present invention is applied to an alarm gathering device (AGIA: Alarm Gathering Interface board Assembly), which is a device that functions to collect a hardware alarm source and report it to a higher processor. An alarm gathering hardware block (AGIH) is formed together with the collecting device AGIA and the backplane board for accommodating the alarm collecting device. The alarm aggregation hardware block (AGIH) is mounted in an ATM Local Switching Subsystem (ALS) and an ATM Central Switching Subsystem (ACS), respectively, which constitute an ATM exchange. In the basic structure of the ATM exchange shown in the figure, the alarm collecting device AGIA is provided for each ALS and ACS.

Line subscriber line hardware block (LSIH), which is not described in the drawing, represents a line subscriber interface hardware block, and another line card trunk interface module (TIM) represents a relay line interface module. The ATM Cell Test Hardware block (ACTH) is a hardware block for testing ATM cells, the Cell Mux / Demux Hardware Module (CMDH) is a module for multiplexing / demultiplexing, and the Interconnect Subscriber Network Module (ISNM) is an internal connection subscription. It is a network module. NSM (Network Synchronization Module) is a module responsible for network synchronization.

2 is a configuration diagram of the connection with the peripheral hardware of the alarm collecting device (AGIA) according to the present invention.

The configuration shown in the figure shows an alarm delivery path in which alarm sources collected from an alarm collection device AGIA are reported to an Operation and Maintenance Processor (OMP).

The alarm collecting device AGIA is configured to collect fault alarm sources that cannot be collected by an inter-processor communication (IPC) message, which is an internal communication between processors. Three failure sources (ASNM, CCCP dual down, OMP down) are assigned per ALS to manage the entire subsystem. The structure of the figure shows the path by which the alarm source collected from the alarmed devices is reported to the OMP in the normal state of the system.

The alarm signal transmission system from the alarm collecting device to the exchange system processor is as follows.

1) When the internal signaling path of exchange is normal,

When the system is normal, the alert delivery path is as shown in the figure. The dotted line is the alarm source collected on a hardware back board basis and is transmitted to the Call and Connection Control Processor (CCCP) and reported upward by IPC communication. When the alarm source collected from CCCP is reported as high, the alarm cancellation device (AGIA) → call connection control processor (CCCP) → cell multiple / demultiplex hardware (CMDH) → access switch network module (ASNM) Reported as: → Internally connected subscriber network module (ISNM) → CMDH → Operational Maintenance Processor (OMP).

2) when the internal signaling path of the exchange is abnormal,

When the system is abnormal, the alarm collection device (AGIA) of the ALS reports an alarm source to the operation maintenance processor (OMP) via the alarm cable in the figure. More specifically, in the drawing, when communication between the alarm collection device and the system is impossible due to an abnormality of the CCCP → CMDH → ASNM → ISNM → CMDH → OMP alarm signal transmission path, the ALSM (Access Switching Network) is normally used by the ALS alarm collection device (AGIA). Module, CCCP, OMP each fault condition is monitored by hardware through a separately connected alarm cable. When a fault alarm occurs, it is notified directly to ACIA's Alarm Collector (AGIA), and the ACS Alarm Collector is replaced as a whole. Pass system alarm data to OMP.

In the drawing, communication between Cell Mux / Demux Hardware (CMDH) and ASNM or Interconnect Subscriber Network Module (ISNM) is performed by using an Inter Module Interface (IMI) message.Basicreate Subscriber Interface Module (BSIM), which is not described, is a basic speed subscriber matching. The module represents a module, a medium rate subscriber interface module (MSI) represents a medium speed subscriber matching module, a low rate subscriber interface module (LSIM) represents a low speed subscriber matching module, and a TIM represents a relay line matching module.

3 is a diagram for explaining such alarm data collection logic of the alarm collecting device AGIA.

The alarm signal is transmitted at a logical level, such as Transistor Transistor Logic (TTL) logic low in normal state, and TTL logic high (open) in alarm state. Unexplained abbreviations in the drawings DD for all device failures (Dual Down), DP for all device power failures, APEF for all PBA Eject Failures, and APFF for all device failures (All PBA Function Failure), PF indicates Power Failure, MECH indicates power supply, fan unit and temperature sensor malfunctions in the rack.

If the alarm data cannot be transmitted through the normal path, the alarm contents of the main subsystems are logically reconfigured and transmitted as shown in the figure in order to directly transmit the alarm data.

In FIG. 3, an access switch hardware block (ASWH) represents an access switch hardware block of an ALS.

4 is a circuit diagram of an alarm collecting apparatus AGIA according to the present invention.

As shown in the figure, the alarm collecting device according to the present invention is capable of collecting up to 128 alarm sources, such as a CPU 1, an 8-bit processor, a room 2, a RAM 3, a buffer 4, and a memory. It is designed as a logic circuit having a gate array logic (GAL) 5, and an EIA-232C interface section 6 having two ports that serve as interfaces for communication with a switching system.

In the present invention, the oscillator frequency is divided into an oscillator clock and a divider circuit to generate a 9,600bps signal for EIA-232C communication.

In addition, the alarm collecting device AGIA is connected to an EIA-232C cable for collecting the alarm source from the alarm generating devices.

The features of the circuit will be described for each functional component of the present invention.

The central processor unit (CPU) 1 uses an 8-bit microprocessor and provides two sets of EIA-232C interfaces as self transmit (Tx) and receive (Rx) functions. The aggregation of the alarm signal does not use the interrupt method used in the conventional exchange, but uses the polling method.

In addition, the block diagram of the product 2 which is a CPU memory part, and the RAM 3 is the same as FIG.

As the memory of the alarm collecting device AGIA itself, firmware for collecting alarm sources is stored in the ROM 2 and the RAM 3, and are operated through the 74LS244 memory driver. The ROM address is $ 0000 to 6FFF, and the RAM address is $ 8000 to FFFF.

The buffer section 4 accommodates 128 alarm sources for managing the entire subsystem constituting the large-scale exchange.

The alarm collection of the alarm collection device AGIA uses a buffer to collect up to 128 alarm sources in the form of 1 byte code to determine the status.

As a function unit not shown in the figure, there is a firmware function monitoring circuit, which uses one of the 16 buffer enable signals ASBE0 to ASBE15 during the normal operation of the CPU 1 firmware using the shift register 74F164. (ASBE0) is to be monitored periodically to monitor whether the alarm collection system is operating normally.

Gate array logic (GAL) (5) is combined with a power reset, RAM select (RAMSEL), ROM select (ROMSEL), output enable (OUT_EN), and address decoder circuitry. If the alarm data is not transmitted through the alarm cable, the alarm contents of the main subsystems are logically reconfigured as shown in the figure in order to directly transmit them to the external path.

The Address Decoder circuit is used to perform its own functions, such as the operation of the local bus and the status check of alarm sources, as shown in Figure 4 to manage the entire hardware subsystem that constitutes the large-capacity exchange. This section provides four output enable signals.

The EIA-232C interface unit 6 is a functional unit that is in charge of an interface for communicating with the system operation maintenance processor (OMP), which is a higher processor, through the EIA-232C communication port. Using the MAX232 chip, which provides two sets of serial communication ports, one is used to pull out the alarm source and the other is used for debugging.

Next, the ATM switch alert collection method according to the present invention, that is, look at the communication procedure between the OMP.

6 shows a communication method between the ATM switch alert collecting device and the OMP.

The alarm collection information of the alarm collection unit (AGIA) was written using 8-bit code to easily collect up to 128 alarm sources. In case of alarm generation, response, recovery and data request, D0 ~ D5 can assign up to 64 alarm sources as data codes, and D6 and D7 can be used as codes for identifying alarm types. In addition, D0 ~ D3 is used for data transmission, D4 ~ D6 is used for data generation, and D7 is used for data display to distinguish the occurrence of new alarm. That is, D7 is 1 and 8 data are counted by D4 ~ D6, and the data of D0 ~ D3 is 8 bits, i.e. 32 bits, and 0 ~ 31 by D0, D1 before transferring this data. And alarm sources in 32-63 units.

Specifically, the procedure is as follows.

1) When an alarm generation signal is received in the alarm collecting device (AGIA), the alarm collecting device reads the alarm data of the current state through a self test, and reads the alarm source data stored in the RAM 3 and generates it. Update alarm data. That is, polling the input / output (I / O) port (ASBE0 ~ 15) address according to the address decoding of the alarm collection device AGIA, checking the alarm state change, and checking the alarm state corresponding to the address. Detect, store in memory, and report an alarm to the OMP.

2) The OMP receiving the alarm occurrence report provides an acknowledgment (ACK) signal to the alarm collecting device (AGIA), and if the alarm collecting device (AGIA) fails to receive this acknowledgment signal within 10 seconds after the alarm is reported. Non-acknowledge (NACK) signal is retransmitted to the CCCP or OMP. After receiving the acknowledgment signal ACK, the alarm collecting device AGIA transmits an alarm source in the form of an 8-bit code.

3) When the alarm is restored, the alarm collection unit (AGIA) notifies the operation maintenance processor (OMP) of the recovery completion signal, and the operation maintenance processor (OMP) receives the signal and releases the alarm.

4) In order to hold the same source data between the alarm collector (AGIA) and the operation maintenance processor (OMP), OMP periodically requests alarm source data, and after receiving this request, the alarm collector (AGIA) receives a full alarm. Send the source data.

Therefore, the present invention made as described above can collect and collect the faults, that is, hardware alert sources, generated in various subsystems constituting the ATM switch, and can be flexibly applied by mounting protocols of various communication methods in the future. In addition, it has the following effects.

1) The present invention reports the dropped alarm condition to the OMP quickly and effectively, and prevents the system from spreading to a more serious fault condition or adversely affecting the reliability of the subscriber service.

2) In the conventional method used for the exchange alarm processing, the alarm signal data is captured by the system bus using a complicated protocol to capture the alarm data. Therefore, the load of the OMP is heavy and it is interrupted every time an alarm occurs and the alarm collection process is repeated. As a method to be performed, it may take more processing time than the present invention, and thus may provide inaccurate data. However, the method according to the present invention does not use a system bus when reporting an alarm to an OMP as compared to a conventional method. The use of the -232C communication port reduces the load on the OMP and eliminates the need for complicated protocols, enabling simple, fast and accurate alarm delivery.

3) Up to 128 alarm source data is stored and managed in RAM, providing full alarm source information periodically or aperiodically so that OMP always maintains accurate information.

4) In the ATM system, when the alarm is not reported through the normal internal switching path due to the abnormal processor of the AGIA, it can be reported directly through the alarm cable as a hardware method.

The present invention described above is capable of various substitutions, modifications, and changes without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains. It is not limited to the drawing.

Claims (2)

Communication with the CPU, memory, a buffer 4 collecting the alarm source, logic circuitry connected to the CPU to perform power reset, memory selection, output enable and address decoding functions, and processors of the switching system In the asynchronous transfer mode switching system applied to an alarm collection device having an interface for the alarm collecting method, when an alarm generation signal is received, the self-reading is performed on the alarm source data that is present and stored in the memory. A first step of reading alarm source data to update occurrence alarm data and then notifying the alarm occurrence fact to the operation maintenance processor of the switching system; A second step of transmitting character code type alarm source data to the operation maintenance processor upon receiving an acknowledgment signal from the operation maintenance processor receiving the alarm occurrence report; A third step of notifying the completion of recovery to the operation maintenance processor when the alarm is restored, and releasing the recovered alarm status; And a fourth step of transmitting the stored entire alarm source data upon request for periodic alarm source data transmission to the operation maintenance processor. The method of claim 1, wherein the first step comprises polling an address of an input / output port, inspecting an alarm state change, detecting an alarm state corresponding to the address, storing it in a memory, and simultaneously generating an alarm in the operation maintenance processor. Alarm collection method, characterized in that to notify.