KR960010879B1 - Bus duplexing control of multiple processor - Google Patents

Abstract

selecting available normal buses; cutting a bus to recover according to the kind of the fault occurring in the recovery of the abnormal state; and recovering the failure of a processor and the abnormal state of the bus. The method utilizes stand-by bus source, responding to any abnormal or emergency state.

Description

Bus redundancy control of multiple processors sharing common bus resources and recovery method in the event of a bus fault condition

1 is a hardware configuration diagram of the present invention.

2 is a detailed block diagram of a processor.

3 is a control flow diagram for initial bus selection.

4 is a flow chart for recovering from an abnormal state when a common bus fault interrupt detected by hardware is detected.

5 is a processing flowchart for recovering from an abnormal state detected by a fault monitoring operation of software;

6 is a process flow diagram for recovery when a bus is occupied by a particular processor for a long time.

* Explanation of symbols for main parts of the drawings

1: network 2: redundant bus 1 and bus 2

3: processor

The present invention relates to a bus redundancy control and recovery method in the event of a bus abnormality caused by a plurality of processors sharing a bus resource in an electronic switch, specifically selecting a bus that operates normally among the redundant buses at initial startup. In case of fault interrupt detected by the method and hardware, in case of an abnormal state, recovery by redundant bus switching and reinitialization is performed to recover when both redundant buses are abnormal.In case of abnormal interrupt detected by fault monitoring during normal operation If the switchover is possible, both the recovery by redundant bus switching and the redundant bus are delivered to the user program for recovery when the redundant bus is abnormal, thereby preventing the operation of entering the recovery procedure and the long-term (above a predetermined limit) bus occupancy of a specific processor. On the way It is about.

Conventionally, in an electronic switch having a plurality of processors sharing bus resources, each processor has independent paths, and further, the transmission and reception paths are separated. If the problem occurs on the path (physical cutting, fault, etc.), the whole processor cannot send or receive. Even if a fault is detected, there is no recovery method except performing an initialization operation for recovery. Therefore, when an abnormal condition occurs, there is a disadvantage such as long service interruption.

Accordingly, the present invention devised to solve the problems of the prior art, by using a bus redundancy control of a bus sharing the bus resources of the multiple processors and the bus resources that are always waiting in addition to the bus currently operating when a bus abnormal condition occurs The purpose of the present invention is to provide a recovery processing method that can cope with a failure situation such as a state, and to enable the effective use of the effective time and the maximum efficient use with the minimum resources.

In order to achieve the above object, the present invention provides a physical network for transmitting and receiving data to and from other processors in a network that performs a function of distributing communication data for communication with another processor, and a plurality of processors connected to the network and sharing a bus resource. Applied to a communication system having a redundant bus, which is an inbound / receive path, and a plurality of processors connected to the bus and capable of performing a transmission function only when bus usage rights are obtained, and a bus usable at the time of initial bus selection Check the available bus, select the available bus, and loop back test the selected bus to select the bus that can be used only if it is normal.If none of the redundant buses are initially selected, reinitialize for recovery from abnormal state. The first step to perform and common sense detected by the hardware during normal operation It checks the bus status in use and the status of waiting bus for redundancy according to the fault type occurred in performing recovery for abnormal status of a specific bus by bus fault interrupt. If both the busy bus and the unused (redundant standby) bus are abnormal, the second step of re-initialization for recovery from the abnormal status and the bus detected by the fault monitoring operation by the software during normal operation are abnormal. And a third step of performing recovery on a state and a failure of a specific processor.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

FIG. 1 is a hardware configuration diagram to which the present invention is applied, in which 1 represents a network, 2 represents bus 1 and 2 and 3 represent a plurality of processors, respectively.

As shown in the figure, the hardware to which the present invention is applied is a network (1) (CIN: Control Interworking Network) which is mounted in a communication system of an electronic switchboard and performs a distribution function of communication data for communication with another processor. And a redundant bus 1,2 (2), which is a physical transmission / reception path for transmitting / receiving with other processors in a plurality of processors connected to the network 1 and sharing a bus resource, and the bus 1,2 (2). It is provided with a plurality of processors (3) capable of performing a transmission function only when the bus connection rights are obtained.

2 is a detailed configuration diagram of each processor 3 according to the present invention, where 4 is a bus matching section and 5 is a main processing control section, respectively.

The bus matching unit 4 is connected to the bus 1,2 (2) to perform an operation for detecting occurrence of an abnormal state of the bus 1,2 (2), and through a bus fault interrupt when detecting an abnormal state of the bus 2 This sourcing is notified to the main processing control section 5, and the reason why the fault has occurred is written in a predetermined area to provide a basis for the main processing control section 5 to determine.

The main processing control unit 5 which receives the bus fault interrupt and performs a service for the interrupt fault takes appropriate measures according to the cause of the fault and performs a recovery operation in an abnormal state.

3 is a control flow diagram for initial bus selection.

First, the availability of the bus 1 (2) is checked according to the state of the bus 1 (2) by software and the state of the bus 1 (2) by hardware (101). As a result of the inspection 101, if the bus is found to be usable, bus 1 (2) is selected as the bus to be used (103). Perform a loopback test on the selected bus 1 (2) and check the result (105) to complete the bus selection if normal. However, if it is abnormal or found to be unavailable as a result of the check 101, a usability check for bus 2 (2) is performed (102).

Availability check result for bus 2 (2), select bus 2 (2) for use bus if available (104), perform loopback test to complete bus selection if normal, disable or loopback test result Back 106, transition to an initialization routine for recovery (107).

4 is a flow chart for recovering from an abnormal state when a common bus fault interrupt is detected by the hardware. If the state is recoverable by redundant bus switching depending on the cause of the fault, the recovery operation is performed by switching the bus. In case of an abnormal state, an initialization process for recovery is performed to perform a recovery in an abnormal state.

When the bus matching unit 4 detects an abnormal state such as a clock fault that causes a fault or a bus occupied by a specific processor for more than the time limit and informs the main processing controller 5 through an interrupt (110), the bus 1,2 (2) Check if all clock failures have occurred (111). If all clock failures have occurred, the process proceeds to the initialization routine for recovery (112). If all clock failures have not occurred at bus 1,2 (2), bus 1 Check if clock failure occurs in (2) (113). If clock failure occurs in bus 1 (2), check whether the bus being used is bus 1 (2) and bus 2 (2) is normal (114). If bus 1 (2) was in use and bus 2 (2) is normal, change the bus to bus 2 (2) and select and exit (115); otherwise, the bus being used is bus 2 (2) and bus 2 ( Investigate whether 2) is normal (116).

As a result of the investigation 116, if bus 2 (2) is busy and normal, only bus 1 (2) transitions to abnormal status and terminates (117), otherwise the bus being used is bus 2 (2) and the status is abnormal Investigate cognition (118). If bus 2 is busy and abnormal, transition to an initialization routine for recovery (119), otherwise terminate.

On the other hand, if the clock failure has not occurred in the bus 1 (2) as a result of the check (113) for checking whether a clock failure has occurred in the bus 1 (2), it is investigated whether a clock failure has occurred in the bus 2 (2) (120). . If there is a clock failure on bus 2, check if the bus being used is bus 2 (2) and if the state of bus 1 (2) is normal (121). If so, change the bus to bus 1 (2) and process it. Otherwise, it checks whether the bus being used is bus 2 (2) and the state of bus 1 (2) is abnormal (123). If the investigation indicates that bus 2 (2) is in use and the state of bus 1 (2) is abnormal, it transitions to an initialization routine for recovery (124), otherwise the bus in use is bus 1 (2) and the bus 1 (2) Check if the condition is normal (125).

As a result of the check 125, if bus 1 (2) is busy and normal, only bus 2 (2) transitions to abnormal status and terminates (126), otherwise the bus being used is bus 1 (2) and bus 1 ( Check whether the state of 2) is abnormal (127).

If bus 1 (2) is busy and abnormal, it transitions to an initialization routine for recovery (128), otherwise terminates.

After performing step 120 of checking whether a clock failure has occurred in bus 2 (2), if the clock failure has not occurred, it is checked whether a bus occupancy is exceeded by a specific processor (130). If the bus occupies more than the time limit occurs, it is checked whether the bus being used is bus 1 (2) and the state of bus 2 (2) is normal (131).

If the bus being used is bus 1 (2) and the state of bus 2 (2) is normal, change the bus to bus 2 (2) and process it (132), otherwise the bus being used is bus 1 (2). Then check whether the bus 2 (2) state is abnormal (133), if the bus 1 (2) is busy and the bus 2 (2) state is abnormal, transition to the initialization routine for recovery and terminate (134). If not, then check whether the bus being used is bus 2 (2) and the state of bus 1 (2) is normal (135).

As a result of investigation 135, if bus 2 (2) is in use and bus 1 (2) is normal, change the bus to bus 1 (2), select and exit (136), otherwise the bus in use 2 (2) and check whether the state of bus 1 (2) is abnormal (137). If bus 2 (2) is busy and bus 1 (2) is abnormal, it transitions to an initialization routine for recovery and terminates (138), otherwise it terminates.

5 is a flow chart for recovering from an abnormal state detected by a fault monitoring operation. The operation result is failed by a loopback test that continuously tests the hardware path for each processor during operation. When recovery is performed, the recovery operation is performed by the transfer of the redundant bus. If the recovery is performed by the bus switching operation, when the redundant buses are all abnormal, the operation is restored by matching with the user program for recovery. This is a process flow for entering the transfer operation after matching the transitioned state.

First, by checking the loopback test result (140), it is checked whether the bus being used is bus 1 (2) and bus 2 (2) is in a normal state (141). If bus 1 (2) is busy and bus 2 (2) is in a normal state, change the bus to bus 2 (2) for processing and exit (142), otherwise the bus in use is bus 1 (2) and the bus Investigate whether 2 (2) is abnormal (143). If bus 1 (2) is in use and bus 2 (2) is in an abnormal state, it communicates and terminates the bus abnormal state to the user program for state matching (144), otherwise the bus being used is bus 2 (2) and the bus Investigate whether 1 (2) is in a steady state (145). As a result, if bus 2 (2) is in use and bus 1 (2) is in a normal state, the bus is changed to bus 1 (2) for selection processing (146) and the bus being used is bus 2 (2). And check whether bus 1 (2) is abnormal (147). If bus 2 (2) is in use and bus 1 (2) is in an abnormal state, a bus abnormal state is communicated to the user program (148) to match the state, otherwise terminate.

6 is a flow chart for recovering when a specific processor occupies a bus for a long time (above a specified limit), and when the communication data transmission is enabled, the idle state of the transmission hardware channel is searched for and kept in use, that is, the bus occupancy time is limited In the case of continuing to occupy for the above time period, it is a process flow for performing a recovery operation by releasing the bus usage right in use to prevent monopoly of the bus which is a shared resource by the characteristic processor.

It checks whether the specific processor is in the communication data transmission function state (150), terminates if it is not in the transmittable state, and if it is in the transmit state, detects whether the communication data transmission hardware channel is in the idle state (151). It sends data and terminates (152), and if it is in use, checks whether the bus is occupied more than the designated limit (153), and if it is occupied more than the specified limit, releases the permission for the bus being used (154). , Otherwise exit immediately.

Therefore, the present invention carried out by the above processing procedure, the bus redundancy control of a plurality of processors sharing a common bus resource and abnormal state by utilizing the bus resources that are always waiting in addition to the bus currently operating when a bus abnormal condition occurs It can cope with the occurrence of failures, and the effective use of idle time and the maximum efficiency with the minimum resources can make the most of the existing performance.

Claims (2)

A network 1 that performs a function of distributing communication data for communication with another processor, and a plurality of processors connected to the network 1 and sharing a bus resource, for physical transmission / reception with another processor A communication system having a redundant bus 1,2 (2), which is a path, and a plurality of processors (3) connected to the buses 1,2 (2) and capable of performing a transmission function only when a bus permission is obtained. In the bus redundancy control of multiple processors and common bus resources, and the recovery process in the event of a bus fault condition, an available bus is checked by selecting an available bus at the time of initial bus selection, and a loopback test is performed on the selected bus. Select only if the bus is actually available, or return to an abnormal state if none of the initially migrated buses can be selected. After performing the first steps (101 to 107) to perform the initialization from the initial stage, and after the first steps (101 to 107), the common bus fault interrupt detected by the hardware during normal operation for the abnormal state of the specific bus Depending on the type of fault that occurred during the recovery, checks the status of the bus in use and the state of the bus waiting for redundancy, and recovers by switching over the bus. In the second step (101 to 138) to perform from the initialization to recover from the abnormal state, and after performing the first step (101 to 107), the bus detected by the fault monitoring operation by the software during normal operation And performing a third step (140 to 48, 150 to 154) for performing recovery for abnormal conditions and failure of a specific processor. Or more redundant control bus and a bus of a number of processors share a common bus resources to the ranging state in case the recovery processing method. The method of claim 1, wherein the third step (140 to 148, 150 to 154) is determined to be an abnormal state as a result of the loopback test, and checks the bus state in use and the waiting bus state and transfers the bus if the state is recoverable by the bus transfer. If both the current bus and the unused bus are in an abnormal state, a process of acquiring the bus abnormal state to the user program to match the state and then entering the procedure for recovery (140 to 148) is performed. And forcibly releasing bus usage rights (150 to 154) when the bus usage rights are maintained above a certain limit to prevent the continuous use of the bus usage rights of a particular processor during normal communication data transmission operation. Bus redundancy control of dozens of processors sharing a common bus resource, and How to recover from a bus fault condition.