KR100529008B1 - apparatus for provide interruption of electric power - Google Patents

Abstract

The present invention relates to an automatic reset device in preparation for a momentary power failure, and checks whether or not a predetermined rate of voltage drop occurs in a predetermined power source provided from an external power source. A voltage checker for providing a reset control signal, a main control unit (MCU) for determining whether a predetermined power is correctly provided from an external power source, and providing a reset control signal if the predetermined power is not correctly provided, and a voltage monitoring unit Or when a reset control signal is received from the MCU, a signal output unit for decoding the reset control signal, transmitting the decoded information to the MCU, informing automatic reset, and outputting a reset request signal according to the received reset control signal; When the reset request signal is received from the signal output unit, a reset process for resetting the down system due to a power failure If the power failure occurs due to the problem of the external power source or other problems, the automatic reset by the hardware, to more stably prepare for the power failure.

Description

Automatic reset device for momentary power failures {apparatus for provide interruption of electric power}

The present invention relates to an automatic reset device for a momentary power failure, and more particularly, a problem occurs in an external power supply for supplying predetermined power to the system, or a power failure occurs due to other problems, so that the system is down. In this case, the present invention relates to an automatic reset device for a momentary power failure of automatic automatic reset in hardware.

1 is an internal block diagram illustrating a configuration of a reset device used in general communication equipment.

Referring to FIG. 1, a reset device used in communication equipment includes a main control unit (MCU) 10, a signal output unit 20, and a system operation unit 30.

The MCU 10 provides a control signal for controlling a plurality of boards and devices mounted on the communication equipment, and software-resets a plurality of boards and devices mounted on the communication equipment. Provide a reset control signal.

Then, the signal output unit 20 outputs a reset control signal so that the system operation unit 30 can be reset according to the control signal provided from the MCU 10.

In addition, the system operation unit 30 is generally mounted in a plurality of communication equipment to convert the received data into communication data, or interface so that other communication subscribers can receive the communication service.

Then, the system operation unit 30 resets according to the reset control signal received from the signal output unit 20.

FIG. 2 is an internal circuit diagram illustrating an internal configuration of a signal output unit of a reset device of a general communication device. As shown in FIG. 2, the signal output unit 20 includes a register 21 and a decoder. (22).

Let's take a moment to look at the flow of how to reset the system in the event of a power failure of such a reset device.

First, when a predetermined power is applied from an external power source (not shown), the MCU 10 resets the system operation unit 30 by setting a value of '0' to an immediate register of the signal output unit 20, and then 'HIGH'. By setting a value, the reset is not repeated.

3A and 3B are timing diagrams illustrating voltage waveforms that a communication equipment generally determines as a momentary power failure.

As shown in FIGS. 3A to 3B, when a voltage drop occurs momentarily, it is determined that a problem occurs in an external power supply or a power failure occurs momentarily due to other problems.

The MCU 10 determines that the reset is necessary because the system operation unit 30 is down due to the power failure.

Therefore, the MCU 10 resets a specific bit value of the register 21 of the signal output unit 20 from a '0' value state to a '1' value state.

In this case, the MCU 10 may set the value of the register 21 of the signal output unit 20 through the address bus ABUS and the data bus ADBUS.

On the other hand, the register 21 of the signal output unit 20 maintains the 'HIGH' impedance when the MCU 10 sets the specific bit value to the '0' value when the initial power is applied, the MCU 10 is specified Resetting the bit value to the '1' state results in a 'LOW' impedance.

Then, the register 21 outputs an 'ACTIVE LOW' signal for resetting the system operation unit 30.

That is, when the MCU 10 sets a specific bit to a value of '1', the register 21 applies a 'ACTIVE LOW' signal to the reset port RST_A of the system operation unit 30.

In addition, the system operation unit 30 is reset in a down state due to a power failure according to the 'ACTIVE LOW' signal provided from the signal output unit 20.

In addition, the 'ACTIVE LOW' signal output from the register 21 is branched and applied to the decoder 22, and the decoder 22 decodes the applied 'ACTIVE LOW' signal, and decodes the decoded information. DBUS) to output to the MCU (10).

At this time, the information output from the decoder 22 to the MCU 10 through the data bus is information indicating that the system operation unit 30 has been reset under the control of the MCU 10.

However, the reset device of general communication equipment can be reset only by software programmed into the MCU 10.

That is, since the reset is possible under the control of the MCU 10, the reset device is not implemented in the current hardware configuration.

Therefore, when a power failure occurs instantaneously due to a problem of an external power supply or the like, and the communication equipment is down, there is a problem that the reset of the communication equipment cannot be controlled automatically.

3A and 3B, when a momentary power failure occurs, the MCU 10 of the actual communication equipment is also down, so that the system operation unit 30 is down due to the power failure. There is a case where it cannot be reset.

Therefore, the present invention was devised to solve the above problems, and when a power failure occurs momentarily due to a problem of external power or other problems, even if the function of the processor and each module controlling the unit in the system is stopped, It is an object of the present invention to provide an automatic reset device in case of a momentary power failure that enables a hardware reset.

In order to achieve the above object, an automatic reset apparatus for a momentary power failure according to an aspect of the present invention is configured to check whether a predetermined ratio of voltage drop occurs in a predetermined power supply provided from an external power supply, and When a voltage drop occurs, the voltage checking unit provides a reset control signal, and determines whether the predetermined power is correctly supplied from an external power source. The MCU provides a reset control signal when an error occurs in providing the predetermined power source. When the reset control signal is received from the main control unit and the voltage monitoring unit or the MCU, a signal output unit decodes the reset control signal, transmits reset information to the MCU, and outputs a reset request signal according to the received reset control signal. And a reset processing unit for resetting the down system when a reset request signal is received from the signal output unit. The signal output unit changes the impedance according to the control signal received from the MCU to output a control signal, a control signal output from the voltage inspecting unit, and a reset signal output from the register as a logic sum. A logic sum operation is performed using the first AND gate for outputting the reset control signal, the control signal output from the voltage checker, and the control signal output from the register as input signals. And receiving the second AND gate outputting the reset information signal, and outputting the reset information signal, decoding the received signal, and decoding the decoded information. It includes a decoder for outputting to the MCU.

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Hereinafter, an automatic reset device for instantaneous power failure according to the present invention will be described in detail with reference to the accompanying drawings.

4 is a block diagram illustrating a configuration of an automatic reset device in preparation for a momentary power failure according to an exemplary embodiment of the present invention.

Referring to FIG. 4, the automatic reset device in preparation for a momentary power failure includes an MCU 10, a signal output unit 20, a system operation unit 30, and a voltage sensing unit 40.

The MCU 10 provides a control signal for controlling a plurality of boards and devices mounted in the communication equipment, and provides a control signal for re-setting the communication equipment.

The voltage sensing unit 40 senses whether or not a drop occurs in a predetermined voltage provided from an external power source (not shown). When a voltage drop of a predetermined ratio or more occurs in the provided power source, the voltage sensing unit 40 determines that a momentary power failure has occurred. The 'ACTIVE LOW' signal, which is a reset control signal for resetting the system operation unit 30, is output.

At this time, the voltage sensing unit 40 monitors the voltage provided from the power supply Vcc of '3.3' in real time, and when a voltage drop of about 10% to 15% or more occurs, a momentary power failure occurs. I think that.

For example, the voltage sensing unit 40 may use a DS1233A product. Looking at the features of the DS1233A product for a while, the DS1233A product monitors a predetermined voltage Vcc in real time to provide a voltage of about 10% to 15% or more. If a drop occurs, the ACTIVE LOW signal is maintained for approximately 350ms, allowing a stable reset of the processor or ASIC.

In addition, the signal output unit 20 outputs a reset control signal so that the system operation unit 30 can reset the control signal provided from the MCU 10 or the voltage sensing unit 40.

In this case, the signal output unit 20 may use, for example, a field-programmable gate array (FPGA), which is a type of programmable logic chip.

In addition, the system operation unit 30 is generally mounted in a plurality of communication equipment to convert the received data into communication data, or interface so that other communication subscribers can receive the communication service.

Then, the system operation unit 30 resets according to the reset control signal provided from the signal output unit 20 when a power failure occurs.

The system operation unit 30 may use an application-specific integrated circuit (ASIC), which refers to a chip designed for a specific purpose such as a specific type of transmission protocol or a portable computer.

5 is an internal circuit diagram illustrating an internal configuration of a signal output unit according to a preferred embodiment of the present invention.

Referring to FIG. 5, the signal output unit 20 includes a register 21, a decoder 22, and a plurality of AND gates 23 and 24.

The register 21 maintains the 'HIGH' impedance when the specific bit value is set to '0' from the MCU 10, and sets the 'LOW' impedance when the specific bit value is set to '1' from the MCU 10. Keep it.

In addition, when the MCU 10 maintains a specific bit value as '0' and sets it to '1', the register 21 maintains a 'HIGH' impedance and is converted into a 'LOW' impedance, thereby converting the system operation unit 30. ), 'ACTIVE LOW' signal is reset.

The decoder 22 decodes the 'ACTIVE LOW' signal received from the voltage sensing unit 40 or the register 21 and transmits the decoded information to the MCU 10 through the data bus DBUS.

In this case, the data transmitted from the decoder 22 to the MCU 10 may correspond to information indicating to reset the system operation unit 30 down due to a power failure.

In addition, when the first and second gates 23 to 24 receive a predetermined power source from an external power source, a reset control signal is input when the 'HIGH' impedance maintained by the resistor 21 is instantaneous power failure. Prevents the effect on 'PW_RST_A PIN' port.

4 to 5, the operation of the automatic reset device according to the present invention will be described.

Referring to the case where the predetermined power is normally applied from the external power supply, when the initial power is applied from the external power supply, the MCU 10 sets and maintains a specific bit value of the register 21 to '0', and outputs the signal. 20 maintains the 'HIGH' impedance.

The voltage sensing unit 40 maintains the 'HIGH' signal output when the predetermined power is correctly provided from the external power source.

That is, a 'HIGH' signal is output to the 'PW_RST_B' port of the voltage sensing unit 40, and the 'RSTA' port of the resistor 21 maintains the 'HIGH' impedance, so that both inputs of the first AND gate 23 are provided. 'HIGH' signal is input to the terminal.

Therefore, the 'HIGH' signal is output to the output terminal of the first AND gate 23, and the 'HIGH' signal is input to the 'RST_A' port of the system operation unit 30, so that a predetermined power is correctly provided from the current external power source. Inform.

The 'HIGH' impedance output from the 'RSTA' port of the register 21 and the 'HIGH' signal output from the 'PW_RST_B' port of the voltage sensing unit 40 are input terminals of the second and gate 24. The 'HIGH' signal is input to the 'RST_A' port of the decoder 22.

The decoder 22 decodes the 'HIGH' signal input to the 'RST_A' terminal and transmits the decoded information to the MCU 10 through the data bus DBUS.

In the case where a problem occurs in the external power supply or a momentary power failure occurs due to other problems, first, the operation of the automatic reset device according to the software side will be described. If provided, set '0' to a specific bit value in register 21, and register 21 maintains a 'HIGH' impedance when MCU 10 sets a specific bit value to '0'.

When the voltage drop or when the MCU 10 reboots or when the system operation unit 30 is detached and remounted, the MCU 10 sets a specific bit value of the register 21 to '0'. Set the specific bit value to '1' in the state.

When the MCU 10 sets the specific bit value to '1' while maintaining the 'HIGH' impedance while the MCU 10 sets the specific bit value to '0', LOW "impedance, and outputs the reset control signal 'ACTIVE LOW' signal through the 'RSTA' port.

The 'ACTIVE LOW' signal output from the register 21 is applied to the decoder 22 through the first and gate 23.

In this case, the first AND gate 23 outputs a 'LOW' signal to the decoder 22 because the 'LOW' signal is applied to one of the two input terminals.

The decoder 22 decodes the applied 'ACTIVE LOW' signal and transmits the decoded information to the MCU 10 through the data bus DBUS. In this case, the transmitted information becomes reset information of the system operation unit 30.

In addition, the 'ACTUVE LOW' signal output from the register 21 is branched and transmitted to the second and gate 24, and the second and gate 24 is 'LOW' through one input terminal of two input terminals. 'Signal is applied, and outputs a' LOW 'signal to the system operation unit 30.

At this time, the 'LOW' signal transmitted from the second AND gate 24 to the system operation unit 30 is a reset control signal, and the system operation unit 30 receiving the reset control signal is down by a momentary power failure. Perform a reset on.

On the other hand, when describing the operation of the automatic reset device according to the hardware side, when a predetermined power is provided from the external power supply, the voltage sensing unit 40 senses whether a voltage drop occurs in the predetermined power provided from the external power supply.

At this time, the voltage sensing unit 40 monitors the voltage provided from the power supply Vcc of '3.3' in real time, and when a voltage drop of about 10% to 15% or more occurs, a momentary power failure occurs. I think that.

When the voltage sensing unit 40 determines that a problem occurs in the external power source or a power failure occurs due to other problems, the voltage sensing unit 40 generates a 'ACTIVE LOW' signal, which is a reset control signal of the system operation unit 30, to generate 'PW_RST_A'. / B 'output to port.

The 'ACTIVE LOW' signal output from the 'PW_RST_A' port of the voltage sensing unit 30 is applied to one of the two input terminals of the second ant gate 24. In addition, since the 'LOW' signal is applied to one of the two input terminals, the second AND gate 24 outputs the 'LOW' signal to the 'RST_A' terminal of the system operation unit 30.

The system operation unit 30 performs a reset as a reset control signal 'ACTIVE LOW' signal is received through the 'RST_A' terminal, which is a down state due to a momentary power failure.

The 'ACTIVE LOW' signal output through the 'PW_RST_A' port of the voltage sensing unit 40 is input through one input terminal of two input terminals of the first and gate 23.

As the 'LOW' signal is applied to one of the two input terminals, the first AND gate 23 outputs the 'LOW' signal through the output terminal.

The 'ACTIVE LOW' signal output through the output terminal of the first AND gate 24 is input to the 'RST_A' port of the decoder 22, and the decoder 22 is input to the 'ACTIVE' input through the 'RST_A' port. LOW 'signal.

In addition, the decoder 22 transmits the information decoded the 'ACTIVE LOW' signal to the MCU 10 through the data bus DBUS.

In this case, the information transmitted from the decoder 22 to the MCU 10 is reset information indicating that the system operation unit 30 has been reset.

Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and changes are possible within the technical spirit of the present invention, and such modifications and modifications belong to the appended claims.

As described above, according to the present invention, due to a failure or other problem of the external power supply, there is an effect that can automatically reset the down system in the event of a power failure instantaneously.

That is, due to a failure or other problem of the external power supply, when a power failure occurs momentarily, when the system is down, the system may not be reset due to failure to respond to a reset command provided by software. By using the automatic reset device according to the above, it is possible to automatically reset the system in hardware by adding a simple circuit configuration.

In addition, not only a hardware reset, but also can be automatically reset in software, there is an effect that can automatically reset the system down due to a more stable power failure.

1 is an internal block diagram illustrating a configuration of a reset device used in general communication equipment.

2 is an internal circuit diagram illustrating an internal configuration of a signal output unit of a reset device of a general communication device.

3A and 3B are timing diagrams illustrating voltage waveforms that a communication equipment generally determines as a momentary power failure.

4 is a block diagram illustrating a configuration of an automatic reset device in preparation for a momentary power failure according to a preferred embodiment of the present invention.

5 is an internal circuit diagram illustrating an internal configuration of a signal output unit according to a preferred embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10: MCU (main control unit) 20: signal output

21: Register 22: Decoder

23, 24: and gate 30: system operation unit

40: voltage sensing unit

Claims (5)

The hardware checks whether or not a predetermined rate of voltage drop occurs in a predetermined power source provided from an external power source, and when a predetermined rate of voltage drop occurs, a voltage tester for providing a reset control signal and a predetermined power source from the external power source. The software determines whether or not it is properly provided, and if an error occurs in the provision of the predetermined power source, when a reset control signal is received from the main control unit (MCU) providing a reset control signal, and the voltage monitoring unit or the MCU A signal output unit decoding the reset control signal and transmitting reset information to the MCU and outputting a reset request signal according to the received reset control signal; and when a reset request signal is received from the signal output unit, a reset processing unit for resetting downed system, The signal output unit, A register for varying an impedance according to a control signal received from the MCU and outputting a control signal; A first AND gate configured to perform a logic sum operation using the control signal output from the voltage checker and the reset signal output from the register as an input signal, and output a reset control signal based on the result of the execution; A second AND gate configured to perform a logical sum operation using a control signal output from the voltage checker and a control signal output from the register as an input signal, and output a reset information signal as a result of the execution; And a decoder configured to receive an output signal of the second and gate, decode the received signal, and output the decoded information to the MCU as reset information. delete The method of claim 1, wherein the voltage check unit, And a predetermined power supply terminal, a ground terminal, and an output terminal, and outputting the reset control signal to the output terminal for a predetermined time when a predetermined ratio of voltage drop occurs to a predetermined power supply provided through the predetermined power supply terminal. Automatic reset device for a momentary power failure characterized in that. delete delete