KR100250005B1 - The control device of the game machine - Google Patents

Abstract

It aims to prevent the denial of controlling the operation of the organic device by communication from the outside and to enable the exchange of data with the host computer.

The CPU 11 of the integrated circuit 3 included in the flytail control device 1 has various data indicative of the operation state of the flytail body in accordance with the SIO program P1 stored in the EPROM 5 in accordance with the SIO ( 17) to the host computer 9.

Furthermore, the security check circuit 19 of the integrated circuit 3 determines that the EPROM 5 is a predefined legitimate one.

For this reason, only the data according to the SIO program P1 can be transferred to the host computer 9, and the EPROM 5 cannot be replaced with an illegal one.

Description

Organic device controller

1 is a schematic configuration diagram showing the main part of a control system of a tailings control on which a tailings control device as one embodiment of the present invention is mounted.

FIG. 2 is a flowchart showing a processing routine executed by the CPU of the integrated circuit included in the flyback control device.

3 is a flowchart showing a data transfer interrupt processing routine similarly executed by the CPU.

4 is a flow chart showing a processing routine executed by a host computer.

* Explanation of symbols for main parts of the drawings

1: tailing control device 3: integrated circuit

5: EPROM 7: System Bus

9: host computer 11: CPU

12: common bus 13: RAM

15: interface 17: SIO

19: Security check circuit 21: Timer

23: winning switch 25: digital start switch

27: waveform shaping circuit 29: large hit lamp

31: display device 33: solenoid

35: driver CD: security code (password)

P1: SIO Program

The present invention relates to a control device of an organic device for controlling the operation of the organic device.

Conventionally, organic devices such as pachinko, slot machines and the like are provided with a control device of an organic device for controlling the operation of the main body of the organic device, and the organic device control device is composed of a single chip integrated circuit in which electronic circuits are stored in a package. It is.

In the halls dealing with such organic devices, there is a demand to collectively monitor a plurality of organic devices with a host computer for hall management.

It is technically easy to assemble a device capable of transmitting and receiving data between the organic device control device and the host computer installed in each organic device by a line.

However, in the conventional organic device control apparatus, when a line is connected to a host computer, intrusion of illegal data is easily allowed, and for example, the illegality of controlling the product emission according to the discharge situation of the product is committed. Because of concerns, connecting the line with the host computer was virtually impossible in terms of security.

For this reason, a signal from a peripheral portion such as a detection unit (e.g., a granular switch) of a conventional organic device main body is configured to be output directly to a host computer without passing through the organic device control device. Organic equipment is monitored in the periphery.

However, in such a configuration, the load from the host computer is increased because the wiring from the peripheral part is complicated and the host computer needs to constantly monitor the state of the peripheral part.

The organic device control device of the present invention has been made in view of such a problem, and prevents the denial of controlling the operation of the organic device by communication from the outside, and furthermore, it is possible to exchange data with the host computer. The purpose.

As a means for solving the subject which should achieve such an objective, this invention took the structure shown below.

That is, the organic device control apparatus of the present invention includes an integrated circuit formed by storing an electronic circuit for controlling the operation of the organic device in a package;

In the organic device control device provided with the memory element which memorize | stores the various information required for the operation | movement of the said electronic circuit beforehand, In the said electronic circuit,

At the same time as providing a security check circuit for determining that the memory element is a predefined and legitimate memory element,

The main point is that a control processing device such as a host computer externally installed in the storage element or the security check circuit stores a data transfer program indicating a procedure for transferring information indicating the operation status of the organic apparatus.

The organic device control apparatus of the present invention configured as described above determines that the memory element is a legitimate memory element predefined by the security check circuit, and at the same time, the electronic device according to the data transfer program installed in the memory element or security check circuit. By the operation of the circuit, information indicating the operation status of the organic device is transmitted to a control processing device such as a host computer provided externally.

Therefore, only information in accordance with the data transfer program stored in the storage element or the security check circuit can be transferred to the control processing apparatus.

Furthermore, the data transfer program is not rewritten illegally because the memory element can not be replaced with an illegal one, or the security check circuit paired with the memory element can be illegally rewritten.

As a result, the information that can be transmitted to the control processing apparatus is limited to the data transfer program stored in advance in the storage element or the security check circuit.

EXAMPLE

Next, preferred embodiments of the present invention will be described in detail with reference to the drawings.

1 is a schematic configuration diagram showing the main part of a control system of a tailings control on which a tailings control device as one embodiment of the present invention is mounted.

As shown in FIG. 1, the tailing control device 1 includes an erasable PROM (EPROM) 5 which can be rewritten and erased centering on the integrated circuit 3 serving as a controller, and both of them have a system bus ( 7) is connected.

This skimping control device 1 is connected to a host computer 9 for hall management provided in an organic field via a LAN (Local Area Network).

The integrated circuit 3 is a C-MOS type 8-bit microcontroller with a built-in security check function, and is configured around a central processing unit (CPU) 11.

The CPU 11 secures a random access memory (RAM) 13, an I / O interface 15, a serial I / O interface 17, and security checks to be described later through the common bus 12. It is connected to the utility check circuit 19, the timer 21, and the like.

In addition to the system bus 7, the I / O interface 15 includes a waveform shaping circuit 27 directly connected to the winching switch body 23, the digital start switch 25, or the like, or the large hit lamp of the waxing body ( 29), the driver 35 connected directly to the display unit 31 which is a digital part of the central variable granular apparatus, the solenoid 33 which opens the substitution upper mouth, etc. is connected.

The host computer 9 is connected to the serial I / O interface (hereinafter simply referred to as SIO) 17 via a LAN.

In the EPROM 5, a control program and various data necessary for performing arithmetic processing with the integrated circuit 3 are recorded in advance.

In addition, the control program includes a serial I / O interface program P1 necessary for exchanging data with the host computer 9 via a LAN.

The various data are data such as a picture data displayed on a digital (display device) of a central variable granular apparatus, a random number table for generating a random number for determining a large hit.

In the EPROM 5, an identification code (security code) CD to be recorded by a predetermined method is stored, and the security check described later is performed using this security code (CD).

Next, the operation of the integrated circuit 3 having the above configuration will be described.

The integrated circuit 3 includes three operation modes: a security check mode, a test mode, and a normal mode.

The security check mode is a mode executed by the security check circuit 19 at the time of system reset to determine whether the security code (CD) stored in the EPROM 5 corresponds to a code assumed in advance. To determine whether it is negative or not.

The test mode is a mode that is executed when the result of the security check is negative. It is assumed that a test of the product is performed.

Specifically, a test PROM that operates even without a security code (CD) is used, except that it is operated in a limited time (for example, 90 seconds) and under an environment different from the general one for testing. Do the same.

Also, as a result of the limited time, the integrated circuit 3 stops operating.

A normal mode is a mode that is executed when a result of a security check is justified, and a normal operation as a pinching cross is performed.

Next, how the operation of the integrated arc path 3 is specifically executed by the CPU 11 of the integrated circuit 3 will be described in detail along the flowchart of FIG.

In addition, the skimping process routine shown in FIG. 2 is one of the control programs stored in the EPROM 5, and the CPU 11 receives the skimping process routine from the EPROM 5 and executes it.

After the power is turned on or after the system reset, the CPU 11 first executes an initialization process for setting initial values to various variables such as a table (step 100).

Next, the security check circuit 19 is operated to execute the security check mode (step 110).

Subsequently, it is determined whether or not the result of the check by the security check mode is valid or negative (step 120).

Here it is just. That is, when it is determined as "OK", the normal mode is executed while exchanging data with peripheral devices such as the RAM 13 and the I / O interface 15 and the like (step 130).

Subsequently, the main process ends when a normal mode end instruction is given. In addition, the data transfer interrupt processing routine which is interrupt processing every predetermined time at the time of this normal mode execution is performed.

This data interrupt processing routine is described in detail later.

On the other hand, in step 120, if it is determined that the result of the check by the security check mode is negative, that is, NG, data is exchanged between peripheral devices such as the RAM 13 and the I / O interface 15. In doing so, a test mode is executed (step 140).

After the timeout of the test mode has elapsed, this processing ends.

Next, a data transfer interrupter processing routine that is executed at an interrupt during normal mode execution will be described together with a processing routine by the host computer 9 associated with the interrupt processing routine.

The data transfer interrupt processing routine is a process of receiving data command from the host computer 9 and transferring data to the host computer 9, which is shown in the flowchart of FIG.

The processing routine by the host computer 9 is a process of instructing the transfer of the data to the skimp control device 1 as shown in the flowchart of FIG.

As shown in FIG. 4, when the process is started, the host computer 9 first makes an output request for data transfer to the skimp control device 1 (step 200).

Next, a process of transmitting the read output code, which is a predetermined code, to the skimp control device 1 is performed (step 210).

On the other hand, the CPU 11 executes a data transfer interrupt processing routine every predetermined time.

When the processing starts as shown in FIG. 3, the CPU 11 first determines whether or not an output request has been received from the host computer 9 via the SIO 17 (step 220).

If it is determined that an output request has been received, it is determined whether there is a signal input from the host computer 9 (step 230).

If it is determined in step 230 that there is a signal input, a process of receiving a read output code from the host computer 9 via the SIO 17 is performed (step 240).

Subsequently, a response code corresponding to the read output code is generated using the security code CD recorded in the EPROM 5 (step 250).

This generation process can be considered, for example, to generate, as a response code, the result of a calculation using the security code (CD) with respect to the read output code.

Next, a process of transmitting the generated response code to the host computer 9 via the SIO 17 is performed (step 260).

On the other hand, the host computer 9 judges whether or not there is a signal input (step 270), and if it is determined that there is a signal input, it performs a process of receiving a response code transmitted from the tailing control device 1 next. (Step 280).

Thereafter, it is determined whether or not the received response code is a legitimate code (step 290). If it is determined that the legitimate code is found here, the acceptance instruction signal of the legitimately accepted summary is transmitted to the skimping control device 1, (Step 300), the type of data (hereinafter simply referred to as request type) required for the skimping control device 1 is transmitted (step 310).

In addition, an external control processing device (host computer 9) connected to the skidding control device 1 for exchanging a readout output code and a response code using the security code CD in steps 210 to 290 is performed. Although the security check function for determining whether or not) is valid is fulfilled, the process of steps 210 to 290 may be omitted if such a function is not particularly required.

Data required for the waxing control device 1 to be transmitted in step 310 is data indicating the state of each part of the waxing body such as the granular switch 23, the digital start switch 25, the display device 31, and the like. These data are updated and stored in the RAM 13 of the integrated circuit 3 by the skimping control device 1 as the game progresses.

The request types are code data for selecting data indicating the state of each part stored in the RAM 13, and for example, the request types corresponding to the winning switch 23 are "SW1" and the digital start switch 25. The corresponding request type is "SW2", and the request type corresponding to the display device 31 is "LED".

In addition, the data indicating the state of each part of the pimples main body stored in the RAM 13 cannot be read and input only by the data transfer interrupt processing routine, and only the writes are possible in the processing according to the original pimples game program. It is possible to prevent the illegal use of data indicating the state of each part.

If it is determined in step 290 that it is not a legitimate code, it is determined that the EPROM 5 provided by the skimping control device 1 is not legitimate, and processing such as an error display is performed (step 320).

Even when it is determined in step 270 that the signal input is not within a predetermined time, error processing such as an error display by step 320 is performed.

The CPU 11 of the corpus control device 1 determines whether or not reception has been made by determining whether or not the reception instruction signal transmitted in step 350 has been received from the host computer 9 (step 330). .

Here, if it is determined that acceptance has been made, first, the request type sent from the host computer 9 to step 310 is received (step 340).

Next, it is determined whether the request type is "SW1", "SW2", or "LED" (step 350).

If it is determined in step 350 that the request type is "SW1", the process of reading out the data SW1 indicating the status of the winning switch 23 from the RAM 13 and transmitting it to the host computer 9 via the SIO 17. (Step 380).

In addition, this transmission process conforms to the SIO program P1 stored in the EPROM 5, and the CPU 11 responds to the RAM 13 and the input / output I / O interface 15 in accordance with the SIO program P1. By integrating and controlling the SIO 17 and executing a logical operation, the data SW1 is transmitted to the host computer 9 via the SIO 17.

After the execution of the step 360, the data SW1 is cleared (step 370), and then the process returns to "return" to complete the processing of this routine.

If it is determined in step 350 that the request type is "SW2", the data SW2 indicating the state of the digital start switch 25 is read out from the RAM 13 and the host computer (through the SIO 17) is read out. 9) (step 380), the data SW2 is then cleared (step 390), and the process returns to " return " to finish the processing of this routine.

If it is determined in step 350 that the request type is "LED", the data LED indicating the state of the display device 31 is read out from the RAM 13 and transmitted to the host computer 9 via the SIO 17. Processing (step 400), the process then returns to "return" to complete the processing of this routine.

Further, in step 350, if it is determined that the request type is for each other type, other data indicating the state of the pimples body part corresponding to the type is read out from the RAM 13 and the host is sent through the SIO 17. The processing to be transmitted to the computer 9 is performed (step 410), and then the process returns to "return" to complete the processing of this routine.

The data transmission processing in steps 380, 400, and 410 is executed in accordance with the SIO program P1 stored in the EPROM 5, as in step 360.

On the other hand, in step 330, if it is determined that the reception is not accepted, an error process such as an indication that the EPROM 5 storing the security code is not valid is performed (step 420), and then the process returns to "return". Terminate the routine.

Further, even when it is determined in step 230 that the signal input is not within a predetermined time, error processing such as error display by step 420 is performed, and the main routine is terminated.

The percussion control device 1 according to the present embodiment described above uses the host computer 9 via the SIO 17 according to the SIO / program P1 stored in the EPROM 5 for various data indicating the operation status of the percussion body. In addition, the security check circuit 19 determines that the EPROM 5 is a legitimate pre-defined legitimacy.

For this reason, only the data conforming to the SIO program P1 can be transferred to the host computer 9, and the EPROM 5 cannot be replaced with an illegal one.

Therefore, the data which can be transmitted to the host computer 9 is limited to the thing according to SIO program P1.

That is, in addition to preventing the denial of controlling the operation of the main body of the main body by communication from the outside, data can be exchanged with the host computer 9.

In addition, since the data can be exchanged between the flytail control device 1 and the host computer 9, the periphery of the flytail body such as the conventional granular switch 23, the digital start switch 25, and the like can be exchanged. Does not need to be transmitted to both the flyback control device 1 and the host computer 9, and wiring from these peripheral parts can be simplified.

In addition, since the host computer 9 can prompt data transfer to the percussion control device 1 when necessary, it is not necessary to always monitor the peripheral state of the percussion body as in the prior art, and the load may be light. .

In addition, the tail-coating control device 1 of the above embodiment is configured to transmit data to the host computer 9 according to the type of request instructed by the host computer 9, but instead, it transmits from the host computer 9. When instructed, all the data indicating the state of each part of the puffing body stored in the RAM 13 may be transmitted in order.

By the way, according to the skimping control device 1 of the said embodiment, although the data which shows the state of each part of the skimping main body memorize | stored in RAM 13, although a data name and a storage order differ with a model of a skimping tail, By unifying, you can unify data names and storage order.

Therefore, in order to unify such a program, even if different types of pimples can be transmitted, the same type of data can be transferred from the host computer 9 to the host computer 9 with the same command.

In addition, although the tail control device 1 of the said embodiment was comprised so that SIO program P1 might be stored in EPROM 5, it replaces SIO program P1 to the security check circuit 19 instead. It may be configured to be stored in the built-in memory.

Although one embodiment of the organic device control apparatus of the present invention has been described in detail above, the present invention is not limited to this embodiment. For example, the data transfer interrupt processing routine is changed to a configuration that executes an interrupt every predetermined time. It is a matter of course that the configuration may be executed by a hardware interrupt generated in a circuit or the like, and it is, of course, possible to carry out in various states without departing from the gist of the present invention.

As described above, the organic device control device of the present invention prevents the denial of controlling the operation of the organic device by communication from the outside, and further indicates the operation status of the organic device in a control processing device such as a host computer. Information can be sent.

Further, since the information can be transmitted from the organic device control device to the control processing device, there is no need to transmit a signal from the peripheral portion of the organic device main body to both the organic device control device and the control processing device as in the prior art. Wiring from the periphery can be made simple.

In addition, since the control device can prompt the organic device control device to transmit data when necessary, it is not necessary to monitor the state of the periphery of the main body of the organic device as described above, and the load may be light.

Claims (1)

In the organic device control apparatus provided with the integrated circuit 3 which accommodates the electronic circuit which controls the operation | movement of an organic apparatus in a package, and the memory element 5 which previously stores the various information required for the operation | movement of the said electronic circuit, The said, In the electronic circuit, a security check circuit 19 for determining that the memory device is a predetermined and legitimate memory device 5 is provided, and information indicating the operation status of the organic device is transmitted to an externally provided control processing device. The data transfer program showing the procedure to be stored is stored in the storage element or the security check circuit 19, and only the information corresponding to the data transfer program is transferred to the control processing apparatus, thereby preventing the illegality. Organic device control device.