JPS63165877U - - Google Patents
Info
- Publication number
- JPS63165877U JPS63165877U JP5890287U JP5890287U JPS63165877U JP S63165877 U JPS63165877 U JP S63165877U JP 5890287 U JP5890287 U JP 5890287U JP 5890287 U JP5890287 U JP 5890287U JP S63165877 U JPS63165877 U JP S63165877U
- Authority
- JP
- Japan
- Prior art keywords
- layer
- insulating film
- wiring board
- multilayer wiring
- circuit patterns
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000000149 penetrating effect Effects 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Description
第１図は本考案実施例の断面構造を示す図、第
２図は本考案実施例の作成手順を説明する図、第
３図は本考案の他の実施例の断面構造を示す図、
第４図は従来例の断面構造を示す図である。
１……回路基板、２，５，９，１３……回路パ
ターン、３，７，１１……接着剤層、４，８，１
２……絶縁性フイルム、６，１０，１４……導電
性層。
FIG. 1 is a diagram showing a cross-sectional structure of an embodiment of the present invention, FIG. 2 is a diagram explaining the creation procedure of an embodiment of the present invention, and FIG. 3 is a diagram showing a cross-sectional structure of another embodiment of the present invention.
FIG. 4 is a diagram showing a cross-sectional structure of a conventional example. 1... Circuit board, 2, 5, 9, 13... Circuit pattern, 3, 7, 11... Adhesive layer, 4, 8, 1
2... Insulating film, 6, 10, 14... Conductive layer.
Claims (1)
てなる多層配線基板において、回路パターンの各
層間に絶縁性フイルムを有するとともに、この絶
縁性フイルムを貫通して各層の回路パターンを電
気的に接続する導電性層を有することを特徴とす
る多層配線基板。 In a multilayer wiring board in which circuit patterns are formed in multiple layers on an insulating substrate, an insulating film is provided between each layer of the circuit pattern, and the circuit patterns in each layer are electrically connected by penetrating this insulating film. A multilayer wiring board characterized by having a conductive layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987058902U JPH0534138Y2 (en) | 1987-04-17 | 1987-04-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987058902U JPH0534138Y2 (en) | 1987-04-17 | 1987-04-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63165877U true JPS63165877U (en) | 1988-10-28 |
| JPH0534138Y2 JPH0534138Y2 (en) | 1993-08-30 |
Family
ID=30889893
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987058902U Expired - Lifetime JPH0534138Y2 (en) | 1987-04-17 | 1987-04-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0534138Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004214586A (en) * | 2002-11-14 | 2004-07-29 | Kyocera Corp | Multilayer wiring board |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5578585A (en) * | 1978-12-07 | 1980-06-13 | Matsushita Electric Ind Co Ltd | Printed circuit board |
| JPS5792896A (en) * | 1980-12-02 | 1982-06-09 | Matsushita Electric Ind Co Ltd | Multilayer printed circuit board with conductor in inner layer |
| JPS5998597A (en) * | 1983-11-02 | 1984-06-06 | 松下電器産業株式会社 | Multilayer printed circuit board |
| JPS6124298A (en) * | 1984-07-12 | 1986-02-01 | 富士通株式会社 | Method of producing multilayer printed board |
-
1987
- 1987-04-17 JP JP1987058902U patent/JPH0534138Y2/ja not_active Expired - Lifetime
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5578585A (en) * | 1978-12-07 | 1980-06-13 | Matsushita Electric Ind Co Ltd | Printed circuit board |
| JPS5792896A (en) * | 1980-12-02 | 1982-06-09 | Matsushita Electric Ind Co Ltd | Multilayer printed circuit board with conductor in inner layer |
| JPS5998597A (en) * | 1983-11-02 | 1984-06-06 | 松下電器産業株式会社 | Multilayer printed circuit board |
| JPS6124298A (en) * | 1984-07-12 | 1986-02-01 | 富士通株式会社 | Method of producing multilayer printed board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004214586A (en) * | 2002-11-14 | 2004-07-29 | Kyocera Corp | Multilayer wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0534138Y2 (en) | 1993-08-30 |