JPS6263792U - - Google Patents
Info
- Publication number
- JPS6263792U JPS6263792U JP15603485U JP15603485U JPS6263792U JP S6263792 U JPS6263792 U JP S6263792U JP 15603485 U JP15603485 U JP 15603485U JP 15603485 U JP15603485 U JP 15603485U JP S6263792 U JPS6263792 U JP S6263792U
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- display control
- character
- character display
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
Landscapes
- Digital Computer Display Output (AREA)
Description
第１図は本考案による文字表示制御回路の一実
施例を示すブロツク図、第２図は第１図の文字表
示制御回路の英文モードの動作を示すタイミング
チヤート図、第３図は第１図の文字制御回路の和
文モードの動作を示すタイミングチヤート図、第
４図は文字表示装置の全体構成を示すブロツク図
、第５図は従来の文字表示制御回路を示すブロツ
ク図、第６図は和文モード及び英文モードの文字
データのフオーマツトを示す略線図、第７図及び
第８図はそれぞれ第５図の文字表示制御回路の英
文モード時及び和文モード時の動作を示すタイミ
ングチヤート図である。
１……ＣＲＴコントローラ、２……アトリビユ
ートメモリ、３……文字コードメモリ、４，５，
６，９……ラツチ回路、１０……ビデオ信号合成
回路、１１……メモリ、１２……クロツク発生回
路、１３……制御信号発生回路、１４，１５……
切換回路。
FIG. 1 is a block diagram showing one embodiment of the character display control circuit according to the present invention, FIG. 2 is a timing chart showing the operation of the character display control circuit of FIG. 1 in English mode, and FIG. 3 is the same as that of FIG. 4 is a block diagram showing the overall structure of the character display device, FIG. 5 is a block diagram showing the conventional character display control circuit, and FIG. 6 is a Japanese character control circuit. 7 and 8 are timing charts showing the operation of the character display control circuit of FIG. 5 in the English mode and the Japanese mode, respectively. 1... CRT controller, 2... Attribute memory, 3... Character code memory, 4, 5,
6, 9... Latch circuit, 10... Video signal synthesis circuit, 11... Memory, 12... Clock generation circuit, 13... Control signal generation circuit, 14, 15...
switching circuit.
Claims (1)
なる文字データより画像信号を形成する文字表示
制御回路において、 上記アトリビユートデータを順次入力した順序
で順次出力するシフトレジスタ構成のメモリと、 上記文字表示制御回路のクロツク信号に同期し
て上記メモリの入出力制御信号を発生する制御信
号発生回路と を具え、上記文字コードデータのコード長に対応
して、上記メモリに対する制御信号のタイミング
を変化させることによりアトリビユートデータの
遅延時間を可変する ことを特徴とする文字表示制御回路。[Claims for Utility Model Registration] In a character display control circuit that forms an image signal from character data consisting of attribute data and character code data, there is provided a shift register configuration that sequentially outputs the attribute data in the order in which they were input. and a control signal generation circuit that generates an input/output control signal for the memory in synchronization with a clock signal of the character display control circuit, and generates a control signal for the memory in accordance with the code length of the character code data. A character display control circuit characterized in that the delay time of attribute data is varied by changing the timing of the character display control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15603485U JPS6263792U (en) | 1985-10-11 | 1985-10-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15603485U JPS6263792U (en) | 1985-10-11 | 1985-10-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6263792U true JPS6263792U (en) | 1987-04-20 |
Family
ID=31077274
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15603485U Pending JPS6263792U (en) | 1985-10-11 | 1985-10-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6263792U (en) |
-
1985
- 1985-10-11 JP JP15603485U patent/JPS6263792U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6257835U (en) | ||
| JPS6263792U (en) | ||
| JPS63178896U (en) | ||
| JPS6116588U (en) | CRT display dot correction circuit | |
| JPS63103151U (en) | ||
| JPS6253493U (en) | ||
| JPS60143490U (en) | display control circuit | |
| JPS60104877U (en) | image display device | |
| JPS5861540U (en) | Serial-parallel conversion circuit | |
| JPS62193296U (en) | ||
| JPS6077237A (en) | Control circuit of buffer memory | |
| JPS6356451U (en) | ||
| JPS586435U (en) | Multiphase generation circuit | |
| JPS62161399U (en) | ||
| JPS6199886U (en) | ||
| JPS5851353U (en) | interrupt controller | |
| JPS6151546U (en) | ||
| JPS58108473U (en) | Speed sense display device | |
| JPH0431847U (en) | ||
| JPS6025049U (en) | image display device | |
| JPS63133771U (en) | ||
| JPH02113170U (en) | ||
| JPS60107988U (en) | personal computer | |
| JPS62105527U (en) | ||
| JPH01144883U (en) |