JPS61156360A - Small size electronic equipment having data memory function - Google Patents

Abstract

PURPOSE:To remove a switch exclusively used for a clear and to reduce a cost by clearing a content of a memory when a specific character is inputted in a predetermined column of a data by an inputting means for inputting a character stored in a memory means. CONSTITUTION:In case of clearing a data stored in a RAM8, a memory mode is selected by using a switch S3 and a writing mode is selected by operating a switch S2. Then, by operating a switch SA or SB, a data storing register of the RAM8 is searched in a positive and a negative directions and a data to be cleared is displayed on a display section 2. By operating the switch S1, at a first character section of a character display section, for instance '-' is inputted. Then, a switch SL is operated, a setting is done at a first column of a designated data memory section of the RAM8, and by operating the switch S2 and changing over from a writing mode to a reading mode, a processing is asked for a clear processing routine.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention particularly relates to a small electronic device with a data storage function having a data storage memory.

[Prior art]

Small electronic device with data storage function 2 For example, in an electronic wristwatch, in order to store data such as another person's phone number in the memory inside the electronic wristwatch, after specifying the memory address, input characters such as numbers and letters in sequence. . To clear input data, specify an address, display the data you want to clear, and then operate the clear switch to clear it.

[Problems with conventional technology]

In the conventional electronic wristwatch as described above, a clear switch for clearing data must be separately provided. Furthermore, if a switch is provided exclusively for clearing, there is a drawback that erroneous operation is likely to occur.

[Purpose of the invention]

SUMMARY OF THE INVENTION In view of the above-mentioned conventional drawbacks, the present invention aims to provide a small electronic device with a data storage function that allows data to be cleared with a simple operation without providing a dedicated switch for clearing. It is.

[Summary of the Invention] - In order to achieve the above object, the present invention clears the data in the storage means when a specific character is input in a predetermined digit of the data by the input means for inputting the character to be stored in the storage means. It was designed to do so.

[Embodiments of the invention]

Embodiments of the present invention will be described in detail below with reference to the drawings.

This embodiment shows an example of an electronic wristwatch as a small electronic device with a data storage function according to the present invention, and FIG. 1 shows an external view of this electronic wristwatch.

In the same figure, a display section 2 is provided at the center of the top surface of the case l, and pusher-type switches SA and Ss are provided below the display section 9 for searching data such as telephone numbers stored in the electronic wristwatch. is provided. When switch SA is pressed, a search is made in the plus direction, and when switch S is pressed, a search is made in the minus direction. In addition, the right side of the case 1 is provided with switches SL and S+ for data entry such as telephone numbers, and the left side of the case 1 is provided with a switch S2 for specifying data read mode and write mode, and a switch S2 for specifying the clock mode and memory mode. A switch S3 is provided in each case.

FIG. 2 is a diagram showing the detailed configuration of the display section 2 described above.

The display section 2 is a liquid crystal display device, and includes a 9-character display section 3. Number display section 4. Colon display section 5. It is composed of a PM display section 6. The character display part 3 has 6 digits and each line has 5 x 5 dots.
Consists of throat display body.

The numeric display section 4 displays the time, date, telephone number, etc. and is composed of 7 segments, the colon display section 5 flashes at a one-second cycle in the time mode, and the PM display section 6 indicates the afternoon time zone in the clock mode. will be lit.

Figure 3 is a circuit block diagram of the above-mentioned electronic wristwatch, and RO
M (read-only memory)? , RAM (Random Access Memory)8. Arithmetic circuit 9, address control section 10. It is composed of an oscillator 11 and the like.

The reference frequency signal output from the oscillator 11 is frequency-divided by the frequency divider circuit 12 and output to the timing signal generation circuit 13 . A clock clock is also output from the frequency dividing circuit 12 to the address control section 10. The timing signal generation circuit 13 creates various timing signals from the input constant periodic signals, and outputs them to the ROM 7. Address control unit 10. Each timing signal is output to the instruction decoder 14.

The ROM 7 stores microprograms that control the operation of the electronic wristwatch, and each microprogram is read out from the area designated by the address control unit 10 and executed sequentially. The operation code in the microprogram read from ROM7 is output from the OP terminal of ROM7 to the instruction decoder 14, and the numerical data and address data in the microprogram are output from the DO terminal of ROM7 to the data bus (DAT).
RAM8. Arithmetic unit 9. The next address data in the microprogram is output from the NA terminal of the ROM 7 to the address control section 10.

The instruction decoder 14 decodes the input operation code, outputs a read/write control signal to the RAM 8, and outputs an operation command signal to the operation section 9. In RAM8, the D of RAM8 is
Computed data is output from the O terminal to the Dll and 012 terminals of the computing section 9.

When the calculation command signal is input to the calculation unit 9, the calculation data is calculated, and the calculation result is output from the Do terminal of the calculation unit 9 to the DI terminal of the RAM 8, and is stored at a designated address in the RAM 8. Further, the data output from the RAM 8 is displayed on the display section 2 via the decoder 15. Further, a "0" signal and a carry signal generated as a result of the calculation in the calculation section 9 are outputted to the address control section 10, and the designated address of the ROM 7 can be changed depending on the calculation result of the calculation section 9.

On the other hand, the input section 16 includes the aforementioned switches SA and SI1.

The operation signal of the switch is inputted to the RAM 8, arithmetic unit 9, and address control unit 10 via a data bus.

The internal configuration of RAM8 is T as shown in FIG.

D, M+ L, n, Fs, tP, KF+~KF.

Each register of KFL, KFA, KF, and 50 of 1 to 50
It consists of one page's worth of data storage registers. Time data and date data in the patent mode are stored in the T register and the D register, respectively. The M register is a flag register that is set to logic ``1'' (hereinafter referred to as ``1'') in clock mode and the logic ``θ'' (hereinafter referred to as ``0'') in memory mode, and the L register is set in read mode. 0″.

This is a flag register that is set to "1" in the write mode, the n register is a register that stores the number of pages into which data is input, and the P register is a register in which the number of displayed pages is set.

KF+~KF3. In KL, KA, registers are provided corresponding to switches SA, S@, S, . . . Sr to S3,
This is a flag register that is set to "1" when switches S1 to S3 are operated.

In addition, the data storage registers consisting of pages 1 to 50 are each a register for storing data such as a telephone number, and 1
The page contains 6 digits of the alphabet (letters) and 1 digit of the number.
It is possible to store two digits.

The overall operation of the electronic wristwatch having the structure and circuit configuration as described above will be explained using the flowchart shown in FIG.

First, when a 16 Hz clock clock signal is applied from the divide-by-9 circuit 12 to the address control section 10, the address control section 1
0, the key manual processing program is read out from the ROM 7 and executed (step 5TI). For example, switch SA
If the switch sll is operated, the KFA register in RAMB is set to 1, and if the switch sll is operated, the KF register is set to 1, and the same goes for the switches SL, , SI to S3 in sequence.

Next, the timekeeping processing program is read from the ROM 7 and the timekeeping operation is executed by the calculation unit 9 (step 572).

That is, the time data and date data that are the results of the previous calculation are read from the T register and D register of the RAM 8, and a predetermined value is added to create new time data.

Store date data in T register and D register.

After this timekeeping process is completed, check if the switch/7 switch S3 for changing the clock mode and memory mode was operated.
Step 5 to determine whether register KF3 is “1” or not.
T3), if not "l", step ST? , and judges whether the M register is "0" or not. If it is "O", it is the clock mode, so 2 display processing (step S T e
), and as shown by A in FIG. 8, the data of the above-mentioned T register and D register are given to the 9 display unit 2 to display the time and 9 date, and wait until the execution of the second general flow.

On the other hand, in step ST3, when the KF3 register is rising, it is determined that the switch S3 has been operated,
Proceeding to step STA, it is determined whether the data in the 1M register is "1". If it is the memory mode (if No), the process proceeds to step STs, sets data "1" in the M register, and sets the 9-clock mode.

Also, if it is 1 clock mode (if YES).

Proceeding to ST5, data "0" is set in the M register to set the memory mode. Therefore, as shown in Fig. 8, if the time mode of A was displayed until then, the mode is reversed by the operation of switch S3 and becomes the memory mode of B, where the telephone number is displayed; conversely, the telephone number is not displayed until then. If so, the display is switched to time mode A by operating switch S3.

Step ST? The data in the 5M register is “
0'', that is, when the memory mode has been set, the process advances to step ST9, where it is determined whether or not this flow was started with 2 interrupts, and if it was started with 1 interrupt, 5 is set.
Return to the step where the interrupt occurred. If it is not an interrupt, the process proceeds to step ST+n, where it is determined whether the write key or the switch S2 for switching the read mode has been operated. If it has not been operated (if No), jump to step 15 and set the data in the L register to “0”.
If it is "0", it is the read mode, and the process proceeds to step S'r+s, where the editing flag register F
Determine whether sm is “O” or not, and if it is “0”, read processing (
ST17) is performed and the device enters a standby state.

- On the other hand, if ST+b is “0”, write processing (ST
+e) and enters a standby state.

On the other hand, when the L register is not "0" in step 5TI5 (No), it is the write mode, so step ST+++ immediately proceeds to write processing, and then enters a standby state.

Next, the write processing operation shown in step 1e above is performed in the sixth step.
This will be explained with reference to the flowchart shown in the figure and the display state diagram of the display section 2 shown in FIG.

When writing data, first, operate switch SA or switch S1 to search data storage registers 1 to 50 in RAMB in the plus direction or minus direction,
Search for an area where no data has been written. In other words, the current display page number is set in the P register in step W1, the address of RAM 8 is specified by the data in the P register, and the data at the specified address can be read. Next, it is determined whether or not switch S5 has been operated (step W2), and if switch S5 has been operated (if YES), ti is moved by a fixed digit (step W3), and step Return to W2. Step W2
If No, proceed to step W4, and if Sui Nochi SA is operated, change the P register to 11 (step W5).
, compare the data in the P register with the maximum number of pages that can be stored as 50 (step W6). If the data in the P register is less than or equal to 50, return to step W1 and repeat the same flow as above for the data in the P register. Repeat until the data reaches 50. When the data in the P register becomes greater than 50, the process advances to step W7, and the data in the P register is set to 1.
Then, return to step W+ and repeat the same operation as described above.

Further, when switch 2 is not operated in step W4 (No), the process proceeds to step W6, and if switch S is operated, the data in the P register is minus 1 (step W9).

Check whether the data in the P register is 0 (step W+o
), if it is not 0, return to step W1; if it is 0, send the data in the P register to the father (step W+ +
) Return to step W1 and repeat the same operation as above.

If step W@ is No, check whether switch S+ has been operated.Step W+2) If 1 has been operated, the specified digit is rewritten and displayed (step W+z), and the process returns to step W2.

For example, the last name is rsUZUKIJ and the phone number is r012.
Suppose you want to make 3-45-7890J cents.

As shown in B in Figure 9, each time you operate switch S-, first - (hyphen), then space, then A-B-C, etc.
・-Z is repeated sequentially, and "S" as shown in C in the same figure
When is displayed, stop operating switch SI and switch SL.
, to move the designated digit as shown in D in the figure. In the second digit, m=(space)-A-B4C...-Z is repeated in sequence every time switch S1 is operated in the same way as described above, and when "U" is displayed, the operation of switch S+ is stopped. The input of other characters rZUK IJ is done in the same way by operating the switches S+ and SL. When the last character rlJ appears, the cursor moves to the first digit of the upper row of the number display section 4 in Figure 2, as shown in F in the figure. Moving. After that switch S
Each time 1 is operated, the numbers are displayed in the order of 0-1-2...-9, and when "0" is displayed, the operation of switch S1 is stopped.

Thereafter, the same procedure is repeated for r 123-45-7890J using switches S+ and S, and as shown in I in the same figure, the desired surname rsUZUKIJ and telephone number r 01 are set.
23-45-78904 is stored in the specified page.

As described above, when data has been input to the required page of the data storage register, the switch S2 is operated to switch from the write mode to the read mode. As a result of this switching, it is detected that switch S2 has been operated with switch ST+o shown in the flowchart of FIG.
Proceed to ++.

Since we have been in write mode so far, the data in the L register is "l", so we proceed to step 5TI2.
Set the data in the L register to "0", convert to read mode, proceed to step ST+3, and set the li collection flag Fs! is set to “1”.

Next, proceed to step 5TI5 and the data in the L register is °0.
”, and at this time the data in the L register is “0”.
”, and according to the judgment of 5T16, the editing flag Fs is “1”.
Since it is w, the process advances to the write process of step ST'+s.

At this time, in the flowchart of FIG. 6, step W+
Since the editing flag F'ss is "1'" at step a, the process advances to step Was and the n register (not shown) is set to "1". Here, it is determined whether the first character of the specified page is "-" (step W16). - The letters are "-" as shown in Figure 11B.
If so, as shown in the figure, a clear display is made on the display section 2 (step W+?), and a clearing process is performed (step W1θ). Also, after the clearing process, it is checked in step W+9 whether the data in the L register is different.

If not 50, add 1 to the n register (step W20
), repeat this operation (count) times and check whether "-" exists in the first character up to the 50th page.

When it is determined that the first character is not "-" with Ste-knob W+a, the process jumps to step W19 and the same operation is repeated.

Next, the process proceeds to step W21, where an array editing process is performed for the 6 character data in the 1 character display section 3 among the data in the data storage registers 1 to 50 mentioned above so that they are stored in alphabetical order starting from the first page of the RAM 8. conduct. When this process is completed, the process proceeds to step 'wV22, where the number of used data storage registers 1 to 50 in which data is actually written in RAMB is calculated, and the editing flag is then set to "0".
Step W23) to return the data in the P register to '
1” (step W24).

Next, the process of reading data stored in a normal data storage register will be explained using the flowchart of FIG. In this case, when the contents of data storage registers 1 to 50 are to be sequentially read out and displayed on the display section 2, switches S, , S are operated.

When the switch SA is operated, the operation is judged by the step knob R+, and the process proceeds to step R2, where it is determined whether the data in the n register is not O'' (no data has been written in the data storage register). and if n=
If it is "0", the process jumps to step R7, and a delimiter display indicating no data as shown in the 10th diagram is displayed on the display section 2.

Also, if n#O in step R2, step R3
, the data in the P register and the data in the n register are compared, and if t P < n, the process jumps to step R5, advances the currently displayed page to the next page, and displays the data of that page (step R7). . If P=n, the process advances to step R4.

Whether the data in the n register is equal to the father, i.e. 1 to 50
Determine whether data has been written to all data storage registers, and if data has been written to all pages, proceed to step R6, return the data in the P register to 1, and display the data of the first page. (Step R?). Also, when it is determined in step R4 that there is an empty page in the data storage register, the process proceeds to step R5, and the data in the P register is
1 and display the +1 data in the P register (
Step R7) On the other hand, when it is determined that P>n in step R3, the process proceeds to step R6 and sets the data in the P register to l,
Display the data of the first page (step R?).

Therefore, in the read mode, as shown in FIG. 10A to D, page data displays (A to C in the same figure) are sequentially displayed on the display section 2 each time the switch SA is operated.

Next, the case of clearing the data stored in the RAM 8 will be explained with reference to FIG. 11.

First, switch S3 is used to select memory mode, and switch S2 is operated to select write mode. Next, operate the switch SA or S to search the data storage register in the RAM 8 in the plus or minus direction, and display the data to be cleared on the display section 2. For example, as shown in FIG. 11A, the last name r is the data on the 10th page.
TANAKAJ, phone number r 0987-65-43
Display 21J. Here, in the same manner as in the data writing described above, switch SI is operated to input "-" as the first character in the character display section as shown in FIG. Next Sui 7
Operate switch S5 to set it in the first digit of the designated data storage section of RAM8. Here, the switch S2 is operated to switch from the write mode to the read mode, and the operation of the switch is detected at step ST+o shown in the flowchart of FIG. Let it happen. Therefore, in the write flowchart of FIG. 6, the process proceeds to step W+a via steps W1→W2→W7→W+2, and it is determined whether the editing flag F'ssi is "1" or not. At this time, the editing flag Fs is set to "1" by operating the switch S2, so step Wl
! The program proceeds to step 1, where the register 2 is set to "1", and the process proceeds to the clear processing routine of steps Was to W2G. In this rule and f, it is determined whether the first digit is "-" or not, and if it is "-", all data on that page is cleared.

Therefore.

As a result of the above writing process, "-" is input in the first digit as shown in FIG. 11B. Is the 10th page step Wl? After clear display is performed on the character display section 3 as shown in the same figure, the stored contents of the data storage register on the 10th page of RAM 8 are cleared, and the rear result is displayed on the display section 2 as shown in the same figure. will be done.

In addition, if "-" is similarly stored in other areas of storage registers 1 to 50, the data of the page in which "-" is stored in the first digit in the data storage register is processed in the same way. can all be erased.

Therefore, when erasing a specified page in a data storage register, there is no need to use a dedicated clear switch as in the past.
Also, you can store "-" in the first digit using the same operation as storing characters, and switch S.
By operating 2, the last name rTANAKAJ and telephone number r0987-65-4321J can all be cleared at the same time.

In this embodiment, a specific "=" character is stored as the first character of the character display section 3, and the switch S5 is operated to erase the data in the data storage register in which the specific "-" is stored. The area where the specific "-" character is written is not limited to the first character.

Any other second or third character is fine. Also certain “
-'' character, but also r*J.

Characters other than alphabets such as "=" may also be used.

It goes without saying that the present invention is not limited to electronic wristwatches, but can be similarly implemented with any small electronic device having a data storage function.

〔Effect of the invention〕

As described in detail above, according to the present invention, data can be cleared with a simple operation, and malfunctions caused by providing a dedicated clear switch can also be prevented. Furthermore, the present invention can be implemented with a very simple configuration.

[Brief explanation of the drawing]

Fig. 1 is an external view of an electronic wristwatch according to an embodiment of the present invention, Fig. 2 is a display component, Fig. 3 is a circuit configuration diagram, Fig. 4 is a RAM configuration diagram, and Fig. 5 is a general flowchart. A diagram showing
Fig. 6 is a diagram showing the write processing flow, Fig. 7 is a diagram showing the read processing flow, Fig. 8 is a diagram showing the transition between clock mode and memory mode, and Fig. 9 is a diagram showing the state transition of write mode. , FIG. 10 is a diagram showing the state transition of the read mode, and FIG. 41 is a diagram showing the state transition of the clearing process. 7...ROM, 8...RAM. 9... Arithmetic unit, 10... Address control unit,
11... Oscillator, 12... Frequency divider circuit, 13... Timing signal generation circuit,
14...Instruction decoder. 1"5...decoder, 16...input section. Patent applicant Casio Needle Calculator Co., Ltd. Same as above
Casio Electronic Industries Co., Ltd. Patent Attorney Dai
Yoshiyuki Suga Figure 4 Figure 5 Figure 8 Figure 9 Figure 10 Figure 11 +1. -2 Extraction proceedings: imm old book March 22, 1960 Mr. Manabu Shiga, Commissioner of the Patent Office 1, Indication of the case 1982 Patent side No. 274899 2, Name of the invention Small electronic device with data storage function 3, Relationship with the person making the amendment Patent applicant address 2-6-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo Name (1)
44) Casio Computer Co., Ltd. Representative Tadao Kashio 4, Agent @102 Den (03) 23B -0031
Address No. 18-6, Kojimachi 6-chome, Chiyoda-ku, Tokyo, Subject of amendment Details Near, Contents of amendment

Claims (1)

[Claims] a storage means for storing data consisting of a plurality of characters; an input means for inputting characters stored in the storage means; A small electronic device with a data storage function, characterized in that it is equipped with a clearing means for clearing data.