JPS6075871A - Improved character coloring circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a character/graphic luminance signal correction circuit, and is particularly applicable to a data display system that reproduces character/graphic data (hereinafter referred to as data) using a television set. It is suitable for this purpose.

[Background technology and its problems]

In recent years, with the spread of color television receivers, data transmission systems have been developed that use color television sets as displays to reproduce news and various other information. The first example is a cab system (Character System) that transmits data stored in a data center via a telephone line to a color television set installed in a terminal on the subscriber's telephone side and reproduces color image information. And patty
rnTelephone Access Inform
ation Network System).

A second example is still image broadcasting, which utilizes television broadcasting and broadcasts data by inserting it into the blanking period of the television signal, and this data is received by a color television set and reproduced as color image information. .

By the way, when trying to reproduce image information based on data using a television set, if the width of a line or part of a character (hereinafter referred to as a line part) is very narrow, the brightness of the screen will decrease and the display will be at its minimum. When the number of dots reaches 1, the brightness decreases significantly and the image as a whole becomes noticeably unnatural.

The reason for this is thought to be that the frequency of the luminance signal portion corresponding to the linear portion becomes so high that the circuit thread that processes the luminance signal cannot respond fully due to its frequency characteristics.

[Purpose of the invention]

The present invention has been made in consideration of the above points, and is intended to prevent the brightness of the linear portion from decreasing.

[Summary of the invention]

In order to achieve such an object, the present invention provides that, when a luminance signal corresponding to a linear part with a width of one dot, which is the minimum display on a display screen, arrives, the luminance of the linear part is increased by increasing the amplitude of the luminance signal. To prevent a decrease in brightness of an image and to correct variations in brightness of an entire image with a relatively simple configuration.

〔Example〕

Embodiments in which the present invention is applied to a captain system will be described in detail below with reference to the drawings. As shown in Figure 1, this data transmission system uses a line switch (4) at the terminal of a telephone line (3) installed between a telephone subscriber's telephone line (1) and a telephone exchange (2). This line switch (4
), data transmitted from the data center (5) through the telephone exchange Q) and the telephone line (3) can be received and displayed by the information receiving device (6).

The information receiving device (6) performs signal processing based on the information selection input from the keyboard (8) via the converter (referred to as a modem) (7) connected to the line switch (4). The command signal obtained by the circuit (9) is sent to the telephone line (3) as an upper data signal. At this time, the data center (5
) is sent back to the modem (7) through the telephone line k (3) as lower data number 4N.
It is demodulated and provided to the signal processing circuit (9).

Here, the data is decoded in the image signal reproducing circuit (10) and converted into an image signal including color signals R, G, B, etc. The luminance signal Y is then given to the signal correction circuit (11) with a luminance of 1.The luminance signal Y is then given to the video signal forming circuit (12) together with the corrected skill signal, and the video signal at the output terminal is sent to the television set (13). will be displayed as input.

The brightness signal correction circuit (11) is connected to the television set (11).
3) has the following configuration in which when the luminance signal Y with a time width corresponding to a 1-bit linear portion on the display screen arrives, its amplitude is increased to, for example, three times the expected magnitude.

That is, the luminance signal correction circuit (11) includes a sequential pulse generation circuit (15) and a logic output circuit (16) as shown in FIG.
and an additional circuit (17).

The sequential pulse generation circuit (15) receives the incoming fc′n degree signal Y
It is a shift register with a four-stage circuit configuration that receives the clock pulse CL. This logic "l" signal is read into the first stage circuit (15A). This first stage circuit (15A)
The logic "1" signal read into the 21st third clock pulse CL is then output to the 110th pulse generation circuit (15
) is sequentially shifted to the second stage circuit (15B), third stage circuit (15C), and fourth stage circuit (15D),
Thus, the first, second, third, and fourth stage circuits (15A) and (15B) of the sequential pulse generation circuit (15) as shown in FIG. 3 (BL(C).0.[F]).

A clock pulse C is applied to the output terminals of (15C) and (15D).
The output pulse S2.L has a rising edge of 91 times with the same period as S2.L. S3゜S
4. S5 is generated.

Here, the period of the clock pulse CL is equal to the time width corresponding to the width of the linear portion of one dot, that is, 175 ns.
(In other words, if it is selected as 5.727MI(z),
Therefore, the rising times T2, T3, T4, and T5 of the output signals S41 and S5 are the same as the rising times T1 of the brightness signal Y for one dot when the rising times T2, T3, T4, and T5 of the four adjacent It will correspond to dot.

In this way, the output pulses 82, S3, 84 obtained by the sequential pulse generation circuit (15) are sent to the logic output circuit (
16). The logic output circuit (16) converts the input signal Y into an inverter (
17A) as a first input signal S1;
The output pulse of the stage circuit (15B) is directly connected to the second input (i1
@s2, and a first three-person AND circuit (18) which receives the output pulse of the second stage circuit (15B) as a third input signal S3 via an inverter (17B) and a second stage circuit (15B). The output pulse of
C) is directly received as the second input signal S4, and the output pulse of the fourth stage circuit (15D) is sent to the 17-verter (1
9B). The output of this AND circuit (2o) is given to an adder circuit (17).

The addition circuit (17) is the above-mentioned sequential pulse generation circuit (15).
5, with a shift period of (i.e. 175 ns synchronization)
Two analog delay circuits (25) and (26
) to mourn. However, the output Sll of the first AND circuit (18) of the logic output circuit (16) is
) is delayed in the second stage circuit (15B) of the sequential pulse generating circuit (15) and is applied to the first adder (27).
is added to the output S3 of. The addition blade S12 of this adder (27) is delayed in the second delay circuit (26) and given to the second adder (28), and then sent to the second AND circuit (') of the IW1 order pulse generation circuit (15). It is added to the output 813 of A). The addition result output of this adder (28) is outputted to the video signal forming circuit (12) (FIG. i) as the output of the tile degree judgment circuit (11).

In the above configuration, the l-th AND circuit (18) of the kBhi output circuit (16) of the Ti# reliability signal correction circuit 1)
sends out a logical output Sll expressed by the following pure formula % formula % (1), and the second AND circuit (20) outputs 513=S3・S4・S5 ・・・・・・・・・ (2
) is sent out as a logical output S13. However, based on the lower data signal from the modem (7), the image signal reproducing circuit (when a luminance signal Y that becomes logic rlJ for a time corresponding to the linear portion of one dot from 1 arrives (third chest cycle), By shifting the sequential pulse generation circuit (15) every time T1 to T5 corresponding to one dot, the logic "l" is sequentially generated from the first stage circuit (15A) to the fourth stage circuit (15D) during the time corresponding to one dot. ” are obtained (Figure 3 CB) ~ @), and this is the WFam output circuit (1
6) is given.

However, the first AND circuit (18) is 5l-82@S3
Since the logical operation is performed, an output 811 which becomes logic "1" is sent out at time T2 (FIG. 3V)). On the other hand, the second AND circuit (20) performs the logical operation of], S4, and the output 8 which becomes the logic rlJ at time T4.
13 (Figure 3 (G)).

Therefore, the first adder (27) of the adder circuit (17) receives the output pulse S from the first stage circuit (15A) at time T2.
At time T3, when the delay time of the delay circuit (25) has elapsed after 2 is obtained, the AND output of the first AND circuit (18) arrives, and at this time the output generated in the second stage circuit (15B) It is added to S3. Thus the adder (27)
As shown in FIG. 30, the output terminal of the circuit has a voltage output level corresponding to the logic "1" level of the AND circuit (18) and a voltage output level corresponding to the logic "I" level of the second stage circuit (15B). Therefore, an output S12 having an amplitude twice that of the luminance signal Y arriving at the luminance correction circuit (11) is obtained.

The addition output s12 of this adder (27) is the delay circuit (26).
) is further delayed by one shift time and fed to the second adder (28), and the logic "1" output 51 obtained in the second AND circuit (20) at time T4
3 (FIG. 3(G)), thus obtaining an output having an amplitude three times that of the luminance signal Y, which is sent out as the luminance correction output S14.

In this way, when the brightness signal Y of logic "1" with a time width of one dot arrives at the brightness correction circuit (11), it is possible to obtain the brightness correction output S14 with t times the amplitude of the brightness signal Y having a time width of one dot. Therefore, when the luminance signal Y corresponding to the ridge of one dot arrives, the video signal forming circuit (12) transmits a luminance signal having a luminance level three times that of other screens to the television set (13).
will be given to

The above description has been made of the case where the luminance signal Y with a time width of one dot arrives, but when the luminance signal Y with a time width of 2, 3... dots arrives, the AND circuit (18) and (
Since the outputs 811 and S13 of the adder circuit (20) never become logic "1", the two-stage circuit (15) is output from the adder circuit (28).
In B), the output pulse S3 of logic "I" sent out at time T3 is transmitted to the adder (27), the delay circuit (26),
It is sent out as an output S14 with the same amplitude through an adder (28). Therefore, in this case, no correction is made to the brightness level of the brightness signal Y.

In the above, a temporary embodiment in which the present invention is applied to a captain system has been described, but the present invention is not limited to this, and the still image broadcasting principle can be widely applied to displaying data using a color television set.

〔Effect of the invention〕

As described above, according to the present invention, when each brightness level corresponding to the width of one dot arrives on the display screen, the brightness level is increased by increasing the amplitude of the second dot. Even if the luminance of the shaped portion decreases based on circuit characteristics, this decrease can be reliably compensated for. Therefore, it is possible to prevent characters and graphics on the display screen from becoming unnatural.

In this way, the circuit configuration is relatively simple because the logic processing in the form of digital signals and the addition process in the form of analog signals are executed with good timing.

In addition, if the brightness level is specifically selected to be 3 times as described above,
In fact, the unnaturalness of character shapes can be corrected best.

In addition, in order to select the brightness level other than 3 times, it is only necessary to change it according to the logical condition of the logic output circuit (16).
In this way, the above-mentioned brightness compensation effect can be obtained.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing a data transmission system to which a character/figure luminance signal correction circuit according to the present invention is applied, Fig. 2 is a block diagram showing the luminance signal correction circuit, and Fig. 3 shows signals for explaining its operation. FIG. (1)...telephone, (2)...-telephone exchange, (4)
・-・Line switch, (5) ・・Data center, (6
)...information receiving device, (7)...transformation device, (8
)・−・Keyboard, (9)・・Signal processing circuit, (1
0)...Image signal reproduction circuit, (11)...Brightness signal correction circuit, (12)...Image signal formation circuit, (13)...
. . . - Dynamic television set, (15) . . . Sequential pulse ME circuit, (16) . . . Logic output circuit, (17
)...Addition circuit, (ii). (26)...-Analog delay circuit, (27), (2
8)...adder. Applicant's agent 1) Megumi Hebe Figure 2 Figure 3

Claims (1)

[Claims] In a data display system that displays an image by creating a video signal from an image signal reproduced from the data, a signal is displayed every time corresponding to one dot on the display screen based on a luminance signal having a logical level decoded from the data. A sequential pulse generation circuit that generates sequentially shifted sequential pulses at a plurality of output terminals, and a plurality of logic outputs when the time width of the luminance signal is one dot based on the logic output of the sequential pulse generation circuit. A character figure comprising a logic output circuit and an addition circuit that adds the plurality of logic outputs in an analog manner, and sends out the addition output of the addition circuit as a luminance signal used in creating the video signal. Luminance signal correction circuit.