JPS6061857A - Input and output data control system - Google Patents

Abstract

PURPOSE:To test an input/output device easily by bringing the transmission of a strobe signal and its stop under the control of processor side. CONSTITUTION:When data is set in the register 2 of the input/output device from a processor 1 at the time of a test of the input/output device, the register 2 of the input/output device is specified with an address signal of the nontransmission mode of a double address. No strobe signal is sent out to a strobe line 9 even after the data is set in the register 2, so data is not reset even when applied to the register 5 of a terminal device through a data bus 7. Therefore, the constitution corresponding to the disconnection state between the input/output device and terminal device is obtained and the input/output device is tested without exerting any influence upon the terminal device.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention is directed to transmitting data from an input/output device and also transmitting a strobe signal, and on the data receiving side such as a terminal device, the received data is stored in a register, etc. at the timing of the strobe signal. This is an input/output data control method that can prevent the sending of strobe signals and invalidate data even if it is sent when testing an input/output device. Techniques and Problems In a system that sends data from a processor to a terminal device, etc. via an input/output device, and inputs data from a terminal device, etc. to the processor via an input/output device, It is common to send out a strobe signal at the same time as sending out data, and on the receiving side of data such as a terminal device, set data in a register at the timing of the strobe signal.

For example, as shown in FIG. 1, the processor 1 and the register 2 of the input/output device are connected by a data bus 6 and an address bus 8, and the address bus 8 is also connected to the strobe signal generation circuit 3, and the input/output device The register 2 of the terminal device 4 is connected to the register 5 of the terminal device 4 by a data bus 7, and the strobe signal generating circuit 3 is connected to the register 5 of the terminal device 4 by a strobe line 9.

When the register 2 of the input/output device is specified from the processor 1 via the address bus 8, and data is added from the processor 1 to the register 2 via the data bus 6, a strobe signal is generated because register 2 is specified by the address signal. Generating circuit 3 generates a strobe signal and sends the strobe signal via strobe line 9. Further, the data set in the register 2 is added to the register 5 via the data bus 7, and the data is set in the register 5 at the timing of the strobe signal.

When testing input/output devices, for example, it may be tested to see if data is reliably set in register 2. 2 needs to be specified, and when register 2 is specified, the strobe signal generation circuit 3 is activated and a strobe signal is sent out, test data is set in the register 5 of the terminal device 4, and the terminal There is a drawback that the device 4 may malfunction.

OBJECTS OF THE INVENTION It is an object of the present invention to enable the processor to easily control the sending and stopping of strobe signals, thereby facilitating testing of input/output devices.

Structure of the Invention The present invention provides an input and output device having a register for setting input/output data, an address signal line, and a strobe signal generation circuit that generates a strobe signal when data specifying the register is supplied to the address signal line. In the output device,
Means for specifying a strobe signal sending mode and non-sending mode, and means for prohibiting the generation of a strobe signal by specifying the non-sending mode, are provided, and the strobe signal from the strobe signal generation circuit is controlled by the setting of the sending mode. It is transmitted along with the data set in the register, and by setting the non-sending mode, the activation of the strobe generation circuit or the transmission of the strobe signal is prevented, and the transmission of the strobe signal is prevented in testing of input/output devices, etc. It can be done easily. Examples will be described in detail below.

Embodiment of the invention FIG. 2 is a block diagram of main parts of an embodiment of the invention.
The same symbols as in FIG. 1 indicate the same parts, and 3a
8 is a strobe signal generating circuit, and 8a is a dual address signal line. Register 2 of the input/output device is assigned a dual address, and one address signal is used in the sending mode and
The other address signal is set to the non-sending mode, and when register 2 is specified by the address signal in the sending mode, the strobe signal generation circuit 3a is activated and generates a strobe signal, and when register 2 is specified by the address signal in the non-sending mode. The strobe signal generating circuit 3a is constructed so as not to be activated at certain times.

For example, as a double address for register 2, “1
011'' and ``1010'', if the last bit is ``1'', the transmission mode is ``0''.
'', the non-transmission mode is designated, and this one bit is transferred to the strobe signal generation circuit 3a via the double address signal line 8a. Although it is possible to control sending or non-sending of the strobe signal by selecting one bit of the dual address signal, when the power is on, when sending data to the terminal device, the address signal of "1oii" is used to send the strobe signal to the register 2. As a result, the strobe signal generation circuit 3a is activated and a strobe signal is sent out.

In addition, when prohibiting the sending of strobe signals during testing, etc., “
By specifying register 2 with an address signal of 1010'', strobe signal generation circuit 3a is not activated, so even if data is set in register 2, no strobe signal is sent out.

As mentioned above, when setting data from the processor 1 to the register 2 of the input/output device when testing the input/output device,
Register 2 of the input/output device is specified by the non-sending mode address signal of the dual address, and even if data is set in register 2, the strobe signal is not sent to strobe line 9, so data bus 7 Even if data is added to the register 5 of the terminal device via the terminal device, the data will not be set, resulting in a configuration that corresponds to a state where the input/output device and the terminal device are disconnected, without affecting the terminal device. Can test input/output devices.

FIG. 3 is a block diagram of main parts of another embodiment of the present invention, in which the same reference numerals as in FIG. 1 indicate the same parts, 10 is a control register, and 11 is an AND circuit.

Normally, the processor 1 sets "1" in the control register 10 to indicate the sending mode, and when the register 2 is specified by the address signal, the strobe signal from the strobe signal generation circuit 3 is sent via the AND circuit 11. It is sent to the strobe line 9. Also, when testing the input/output device, the processor 1 writes "0" to the control register 10 to indicate a non-sending mode, and sets the data in the register 2 of the input/output device. Therefore, even if the strobe signal generation circuit 3 is activated and a strobe signal is generated, it is blocked by the AND circuit 11 and no strobe signal is sent to the strobe line 9. Therefore, the register 5 of the terminal device , the data added via the data bus 7 will not be set.

Various devices are connected to input/output devices.
The present invention can be applied to all configurations that transmit data as well as strobe signals, and can be used to disable data transmission from an input/output device to other devices with a simple configuration. The input/output device can be tested without causing any malfunction to the device.

As described in detail, the present invention sets a strobe signal transmission mode and a non-transmission mode, and even when data is set in register 2 for testing an input/output device, the strobe signal is set in a non-transmission mode. By doing so, since no strobe signal is sent, data for other devices such as terminal devices becomes invalid, and this corresponds to a state in which the input/output device is separated from other devices, so it is difficult to test the input/output device. It has the advantage that it can be easily carried out.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a main part of a conventional input/output device and a terminal device, and FIGS. 2 and 3 are block diagrams of main parts of different embodiments of the present invention. 2 is a processor, 2 is a register, 3.3a is a strobe generation circuit, 4 is a terminal device, 5 is a register, 6.7 is a data bus, 8 is an address bus, 9 is a strobe line, 10 is a control register, 11 is an AND It is a circuit. Patent applicant: Fuji Facom Control Co., Ltd., agent patent attorney
Akira Aiya, Patent Attorney Hiroshi Watanabe −

Claims (1)

[Claims] In an input/output device having a register for setting input/output data, an address signal line, and a strobe signal generation circuit for generating a strobe signal when data specifying the register is supplied to the address signal line, means for specifying a signal transmission mode and a non-transmission mode;
means for prohibiting the generation of a strobe signal by specifying the non-sending mode, and sending out the strobe signal from the strobe signal generation circuit together with the data set in the register by setting the sending mode; An input/output data control method characterized in that the activation of the strobe generation circuit or the sending of a strobe signal is prevented by setting the above.