JPS5859684A - Automatic gain controller - Google Patents

Abstract

PURPOSE:To control the gain correctly in the receiving side, by taking out respective gain control signals of AC and DC components from levels of the 2nd bit and the 5th bit of the framing code signal following a clock line signal. CONSTITUTION:Parts of a clock line (CR) signal and a framing code (FC) signal of a character signal A which is multiplexed on a specific horizontal scanning line (H) in a vertical blanking time of a TV signal are sampled by a sampling pulse B. These sampled CR signal and FC signal are shaped to obtain a binary signal C. A sampling signal D is generated which becomes high-level in the 4th pulse of the CR signal and is held in the high level up to the 5th bit of the FC signal. A sampling signal E for the second bit (''1'') of the FC signal is obtained from 17th and 18th bits (''1'' and ''0'') of the CR signal, 1st and 2nd bits (''1'' and ''1'') of the FC signal, and the signal D, and a sampling signal F for the 5th bit (''0'') of the FC signal is obtained from the signal D and the 2nd- the 5th bits (''1'', ''1'', ''0'', and ''0'') of the FC signal. On a basis of levels of sampled ''1'' and ''0'' bits, the gain control for AC components and DC components is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain control signal system for automatically controlling and stabilizing the signal level in an apparatus for receiving a text multiplex signal.

The automatic gain control signal used in conventional character multiplex signals is such that the superimposition position and number of horizontal scanning lines of the character multiplex signal are manually set to predetermined positions on the receiving side. 1#lI, so if these were arbitrarily reduced on the sender side, there was a problem in that Xiaomi would have to quickly follow up on this, making it impossible to obtain an accurate image with multiple characters.

The present invention eliminates the drawbacks of the prior art described above, automatically detects the presence or absence of 1d in the character length, performs stable gain control, and reproduces accurate character multiplexing of 11111. The purpose is to provide the equipment.

The present invention detects the presence or absence of a character length ILO 1 using a clock run-in signal added to the beginning part of a character multiplex signal that is multi-electrified during the vertical retrace period of a television video signal, and determines that it is present. At this time, the DC level of the second bit (“1” level) of the framing code signal added behind it is sampled, its value is formed and held, and this is used as the exchange automatic gain control signal and also as the framing code signal. By extracting the DC level of the 5th bit (“0” level), forming and holding that value, and outputting this as the DC component automatic gain control signal, the character multiplex signal swings 1f!
Both the m (AC) level and the DC level can be stabilized.

The present invention will be explained below using the drawings.

The text multiplex signal used in teletext broadcasting is time-division multiplexed onto specific horizontal scanning lines during the vertical retrace period of the television video signal, and the signal waveform is shown in Figure 1.
One data packet is shown in character multiplexing (number g is called a data packet, CL4 in Figure 1) that is multiplexed in units of horizontal scanning lines.T0 This data packet is the 10th (275
) H-21st (284) H-21 (284) Transmitted multiple times every field to a particular one or more horizontal scanning edges between H.

The number of pixels of this system is 248 (width > x 204 m)
However, one data packet corresponds to 1H minute number in the case of only pattern data, so ll1
204 packets are required for transmitting the blood pattern.
1thIth] cannot be identified as 204 packets because there are packets transmitting color information for every 12 (vertical)]. ) One data packet basically consists of part of the header (6 bytes,
48 bits) and data part (31 bytes.

248 bits). FIG. 1 (part of the header is shown in IP#al). CB is a clock run-in signal (2 bytes) for bit synchronization and is always transmitted before the data packet.

Behind it are a framing code signal FC (1 byte length) for synchronizing packets, a service identification/interrupt signal 51/IN (1 byte length) that specifies the type of broadcasting of the service T and whether the basic transmission mode is interrupt transmission mode. ], there is a data identification signal DI (2 bytes) that specifies the extra thinness of the data packet and the data ear side of the data portion.

The first kD also produces the automatic gain control signal of the present invention.
The original clock run-in signal waveform and the % waveform in framing code 4 are shown on the main line, and the clock run-in signal is '1''10''''11101...9141
The framing code signal is ``1''''1''''1''10''01''1m'''0''1 with 16 bits (2 bytes) of m1M.
It consists of 8 bits (1 byte) of 1".

FIG. 2 is a block diagram showing an example of a receiving device with a character length of 1 to which the self-IIjJ original control device according to the present invention is applied. When receiving a normal TV video signal, the signal received from the antenna 1 and 1 is the TV island chest wave 1 and 2.
．． Kyowei detection circuit 3. TV video/chroma episode lol! It is sent to the display side matrix circuit 5 through I4. This part is passed through when receiving a normal television picture signal, and is transmitted to the television picture tube 6 and displayed on the television picture tube.

Next, when you want to receive a text broadcast, press the text TV reception key, text TV program number key, etc. on the food group selection keypad 12, and then press the text TV reception key, text TV program number key, etc. starts operating, and the memory address counter etc. are set to the initial value &, and a character multiplex signal signal can be received.

At this time, the video signal is sent to the character signal separation/shaping circuit 7, where the character multiplexed signal at the 20th (2851H), for example, is extracted and converted into a 21 direct signal of "1" and "Om. Also, the video 0! The code is also sent to the synchronization signal/pit clock regeneration circuit 9, where it generates a synchronization signal, a microcomputer clock synchronized with the color burst signal, a pit clock for extracting and compiling the character multiplex signal, and memory addresses. will be carried out.

On the other hand, the framing code of the binary character multiplex signal that has passed through the character signal separation and shaping circuit 7 is corrected for framing code chaining in the frame correction circuit 8 by the pit clock signal output from the synchronization signal/bit clock regeneration circuit 9. The character multiplexed binary signal that has been corrected is written into the pattern/color memory 11 by the memory control circuit 10, and when writing of one block (for example, one stroke i! [I) is completed, the memory control circuit 10, the signal is read out and sent to the display control matrix circuit 5, where the binary signal is converted into an analog signal for television, and transmitted alone or combined with a normal television signal to the television picture tube 6.
An image of teletext is displayed.

FIG. 3 is a block diagram showing one embodiment of an automatic gain control device according to the present invention.

When in the character length l reception mode, the video signal is transmitted to the video amplification circuit 13 and the social meeting automatic gain control signal 17. obtained by the automatic gain control circuit 16. DC component homemade gain control signal 1
8, the level of the character multiplex signal is kept constant and transmitted to the comparator 14.

Next, it is converted into a binary signal fTh by the one-cossiparator 14,
In the 5-monimo-ta-sou signal sampling route 15 sent to the character-ta-ho-haku-go selection circuit 15, the character-ta-m-haku-go & tori-haku-go 23 (for example, 2o
Only the H eye is extracted (M number) Only the character multiplex signal is extracted from 4C, and the normal TV video signal is removed and the 1i
Transmitted to J stop rotation %8.

The automatic gain control circuit 16 that generates the alternating current automatic gain control signal 171,
CR-FC@MiL signal 20. The H path/L/path signal 21 and the pit clock signal 22 are generated from the same network signal 19 and the video signal in the synchronization/bit clock regeneration circuit 9, and the CR@FCvk signal 20 is generated from the clock signal in the character multiplex signal. This is a signal to pass only the run-in (CR) No. 46 and the framing code (FC) signal, and the H pulse signal 21 clears the counter in the automatic gain 1iIl# (b) path 16 every B. The pit clock signal 22 is a clock signal for sampling the clock run-in (CR) signal and the framing code (CFC) m.
16 is a circuit diagram showing 16 specific circuits. FIG. Further, FIG. 5 is a waveform diagram of each signal.

In the character multiplex reception mode, the clock run-in (CR) signal of the character length l signal output from the video amplification circuit 13 and the 7-raming code (P'C)'Fi signal have the correct waveform of U) in Figure 5. be. This signal is applied to two analog switches 25 and 27 through a 3% balancer 24. For analog switch 25, @Hm of @SSr1 will be described later.
Since the level sampling signal 37 is turned on only when it is at the "H# level", only the voltage level of the second bit ("1" level) of the framing code signal shown in FIG. 5 is the next "H" level peak hold amplification. The output voltage of the circuit (B) that is transmitted to the circuit 26 changes depending on the input voltage, and it also has the function of holding that value (in this case, it is necessary for the 1B section or more). By feeding back to the video amplification circuit 13 as the minute sea bream gain control signal 17, the AC component (amplitude) of the character multiplexed signal is
automatic gain control is possible.

Rock run-in (CR) as shown in Figure 5 (b)
m and framing code (at t) signal section only ``Bm
Since it is turned on by the CR, FC sampling signal 20 that becomes the level, only the clock run-in (CR) signal in the character multiplex signal and the framing code <pc) signal are transmitted to the next comparator 31, where the copper 5 - The digitized clock 974711 and framing code signal such as (51st!14f) are converted into a digital 2Il signal such as Q, and are sent to the CR signal counter 32 and the shift register 3.
4.

The CR4PK counter 32 is cleared every H by the H pulse mJt21 generated by the synchronization signal/bit clock regeneration circuit 9, and starts counting when the above signal is input here as a clock. The "H" level is output at the 1st pulse, and the next monostable multivibrator 33 outputs a signal as shown in Figure 5, which is extended to the 5th bit of the framing code signal, and is sent to the "H" level decoder 55. The O analog switch 27 is transmitted to the L' level decoder 3B.
Since it is turned on only when the L" level cutting signal 40 is at the 1Bm level, only the voltage level of the fifth bit ("Om level) of the framing code signal in Fig. 5 ψ) is set to the next @
The Lm level peak hold signal is transmitted to the ELAL path 28. This circuit has a function that causes the output voltage to drop due to the peak noise of the input, and further maintains the voltage (in this case, 1H interval or more is required).
By feeding back to the video amplification circuit 13 as a signal 18, Bunjita 11! @L'' level of the signal, that is, i! dynamic gain control of the DC component becomes possible.

Next, the generation of the 1B level sampling signal 57 and the 1L'' level sampling signal 40 will be explained.The character length signal as shown in FIG. 50.The analog switch 30 is added to the synchronous signal pit clock h raw circuit 9.
Accordingly, the shift register 34 shifts the input signal bit by bit using the pit clock signal 22 generated by the synchronization signal/bit clock h generating circuit 9 and outputs the shifted signal. This output is the 1Bm level decoder 55, and the 1st, 7th and 18th bits (@"1m, @"01) of the clock run-in signal and the 1.2nd bit c"1" of the framing code signal.

"1") is input, and only when there is a lock run-in signal as shown in Figure 5 above, the "MM level" signal is input, and the "B" level is reached at the 2nd bit position of the framing code 1M. By reducing the pulse width using the monostable multivibrator 56, it is possible to create the 'B'' level sampling eccentricity 57 shown in FIG. 5(6), which is necessary for the analog switch 25 described above.

The framing code signal 0) ill 2-3 s 4 e 5 h y to @ ("'11@1m""0m10") is entered in the decoder 38 for 'L'' level, and then the signal as shown in Fig. 5 0 is input. Only when there is a lock run-in signal, a signal of 88 lbs. is input, and the framing code signal II becomes ``H'' level at the 5th bit position, and this is pre-ml by reducing the pulse width with the monostable multivibrator 39. The L level sampling signal 40 shown in FIG. 5 (G) necessary for the analog switch 27 can be generated.

The automatic gain control device of the present invention automatically detects the presence or absence of a text multiplex signal on the receiver side and performs the correct automatic gain even if the transmitting side arbitrarily changes the text multiplex signal receiving position and the number of electric grids B. Therefore, an accurate character-multiplexed m-image can always be obtained.

[Brief explanation of the drawing]

Figures 1 (B) to C) are T waveform diagrams showing signal waveforms used for character length 1 broadcast, Figure 2- is a block diagram of an X-shaped multiplex receiver, and Figure 3- is an automatic gain control device according to the present invention. A block diagram showing an example of 11!4r
lIA is Figure 1g1w11 showing the concrete enclosure in Figure 3, No. 5
Figures (4) to (c) are T-pressure waveform diagrams showing the voltages of the main parts in Figure 4. 7...Character signal separation/shaping circuit 16...Automatic gain control circuit 26...1Bm level Peak hold increase circuit 28・
...“L Rubel Beak Bold Addition - Circuit Line 1 Diagram Australia 2 @ Table 3 Diagram

Claims (1)

[Claims] A character multiplexing unit 52 that receives a character multicast 1 broadcast that multiplexes and transmits character and graphic information during the TV video ON-@ round-the-clock communication.
In an automatic gain control device that keeps the amplitude and level of a character multiplexed signal constant even under different reception environments, a clock run-in signal that is transmitted at the beginning of the character multiplexed signal is used. Transmitted framing code 01
The first gate circuit extracts the DC level of the second bit of Framing Code No. 8, the second gate circuit extracts the blood flow level of the fifth bit of the body of Framing Code No. 48, and the output level of the gate circuit is shaped respectively.・Two peak hold circuits to hold, a character multiplex signal amplification channel J&-- which is controlled by the control voltage of the peak-hold circuit, and a clock run-in signal only when the clock run-in signal increases. A pulse generating circuit that generates a pulse, a gate pulse generating circuit that generates a gate signal for the second bit of the framing code signal, and a gate pulse generating circuit that generates a gate signal for the fifth bit of the framing code signal.
It is composed of a gate pulse generation circuit and a gate pulse generation circuit, and generates a pulse only when a character multiplex signal sounds. Pass the second bit gate signal,
Turn on the first gate circuit and select the framing code H4 from among the character multi-character signals input to the first gate complex.
Only the second bit of g is extracted, the peak essence is supplied to the peak hold circuit, and the image j! The pulse generation circuit generates a pulse only when there is a character multiplex signal, and the fifth bit of the framing code signal generated by the second gate pulse generation circuit controls the vibration level of the lIIm (b) path. Pass the gate signal! Turn on the gate circuit of iL2, extract only the 5th bit of the framing code signal from the character multiplex signal input to the second gate circuit, and supply the peak value to the peak hold 1gl path. To the 1ktIt level of the video field transport circuit
5 multiplexed on a specific horizontal scanning edge by controlling lJ.
An automatic gain control device whose purpose is to keep constant the amplitude and IL level of not only the L-multiplex signal but also the character multiplex signal multiplied at any horizontal scanning edge.