JPS5684081A - Still picture receiver - Google Patents
Still picture receiverInfo
- Publication number
- JPS5684081A JPS5684081A JP16178179A JP16178179A JPS5684081A JP S5684081 A JPS5684081 A JP S5684081A JP 16178179 A JP16178179 A JP 16178179A JP 16178179 A JP16178179 A JP 16178179A JP S5684081 A JPS5684081 A JP S5684081A
- Authority
- JP
- Japan
- Prior art keywords
- clock
- circuit
- switching
- generated
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
- H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
- H04N7/0352—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal for regeneration of the clock signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
- H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
Abstract
PURPOSE:To sample data of a still picture accurately and stably by switching a clock generating circuit with the output of a detecting circuit for a reference start signal and a clock for reference start signal detection. CONSTITUTION:A clock for FC signal detection generated by clock generating circuit 15 by using a CRI signal and a reference clock generated by reference clock generating circuit 9 by using a chrominance subcarrier are applied to switching circuit 16. This circuit is so switched that while the clock generated by circuit 15 is supplied until FC signal generating circuit 13 detects the FC signal, the clock generated by circuit 9 will be supplied after the detection. Namely, FC detection pulse (c) from circuit 13 is inputted to terminal J of FF17 and clock (b) for FC signal detection is also applied to clock terminal Ck for clocking. Thus, switching output (e) is generated synchronizing with the clock (b) to swtich switching circuit 16 with the output (e). Consequently, the phase of the reference clock after the switching is never influenced direct by the phase of pulse (c).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16178179A JPS5684081A (en) | 1979-12-12 | 1979-12-12 | Still picture receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16178179A JPS5684081A (en) | 1979-12-12 | 1979-12-12 | Still picture receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5684081A true JPS5684081A (en) | 1981-07-09 |
JPS6117437B2 JPS6117437B2 (en) | 1986-05-07 |
Family
ID=15741776
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16178179A Granted JPS5684081A (en) | 1979-12-12 | 1979-12-12 | Still picture receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5684081A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6425430U (en) * | 1987-08-04 | 1989-02-13 |
-
1979
- 1979-12-12 JP JP16178179A patent/JPS5684081A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6117437B2 (en) | 1986-05-07 |
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