JPS55153484A - Interlace correction circuit for two screen television receiver - Google Patents
Interlace correction circuit for two screen television receiverInfo
- Publication number
- JPS55153484A JPS55153484A JP6042179A JP6042179A JPS55153484A JP S55153484 A JPS55153484 A JP S55153484A JP 6042179 A JP6042179 A JP 6042179A JP 6042179 A JP6042179 A JP 6042179A JP S55153484 A JPS55153484 A JP S55153484A
- Authority
- JP
- Japan
- Prior art keywords
- field
- signal
- correction
- slave screen
- interlace
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/30—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical otherwise than with constant velocity or otherwise than in pattern formed by unidirectional, straight, substantially horizontal or vertical lines
- H04N3/34—Elemental scanning area oscillated rapidly in direction transverse to main scanning direction
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
Abstract
PURPOSE:To obtain an excellent video quality without unevenness, by correct interlace at the head of a slave screen, detecting the field of content of picture changed on its way of the slave screen, and correcting the address so that correct interlace can be made. CONSTITUTION:A 0 field signal output 122 of a field polarity detecting circuit 641 of a slave screen video signal, an E field signal output 121 of a field polarity detecting circuit 642 of a television video signal, and a timing (t) signal output 124 are logically summed, and the result is input to a write-in address delay circuit 643 to correct the interlace. Next, in case of correction on the way of a slave screen, the signal whether or not the correction is made at the head of the slave screen is formed at a correction presence detecting circuit 648, it is input to a polarity selecting circuit 647, and if the correction is present, an E field signal is output as a selected polarity signal 126 and if absent, a 0 field signal is output for correction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6042179A JPS55153484A (en) | 1979-05-18 | 1979-05-18 | Interlace correction circuit for two screen television receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6042179A JPS55153484A (en) | 1979-05-18 | 1979-05-18 | Interlace correction circuit for two screen television receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55153484A true JPS55153484A (en) | 1980-11-29 |
JPS6222506B2 JPS6222506B2 (en) | 1987-05-18 |
Family
ID=13141718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6042179A Granted JPS55153484A (en) | 1979-05-18 | 1979-05-18 | Interlace correction circuit for two screen television receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55153484A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1987000715A1 (en) * | 1985-07-19 | 1987-01-29 | Matsushita Electric Industrial Co., Ltd. | Two-screen tv receiver |
JPS62176275A (en) * | 1986-01-29 | 1987-08-03 | Nec Home Electronics Ltd | Parent child image display device |
JPS6324767A (en) * | 1986-06-10 | 1988-02-02 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Television image display |
FR2611103A1 (en) * | 1987-02-17 | 1988-08-19 | Rca Corp | INVERTING INTERLACE DETECTION FOR IMAGE IMAGE VIDEO SIGNAL GENERATOR |
JPH01132281A (en) * | 1986-12-29 | 1989-05-24 | Philips Gloeilampenfab:Nv | Television receiver |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54156420A (en) * | 1978-05-31 | 1979-12-10 | Nec Home Electronics Ltd | Interlace control circuit for television receivers |
-
1979
- 1979-05-18 JP JP6042179A patent/JPS55153484A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54156420A (en) * | 1978-05-31 | 1979-12-10 | Nec Home Electronics Ltd | Interlace control circuit for television receivers |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1987000715A1 (en) * | 1985-07-19 | 1987-01-29 | Matsushita Electric Industrial Co., Ltd. | Two-screen tv receiver |
US4816915A (en) * | 1985-07-19 | 1989-03-28 | Matsushita Electric Industrial Co., Ltd. | Two-picture television receiver |
DE3690375C2 (en) * | 1985-07-19 | 1989-08-17 | Matsushita Electric Industrial Co., Ltd., Kadoma, Osaka, Jp | |
JPS62176275A (en) * | 1986-01-29 | 1987-08-03 | Nec Home Electronics Ltd | Parent child image display device |
JPS6324767A (en) * | 1986-06-10 | 1988-02-02 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Television image display |
JP2928803B2 (en) * | 1986-06-10 | 1999-08-03 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Television image display |
JPH01132281A (en) * | 1986-12-29 | 1989-05-24 | Philips Gloeilampenfab:Nv | Television receiver |
FR2611103A1 (en) * | 1987-02-17 | 1988-08-19 | Rca Corp | INVERTING INTERLACE DETECTION FOR IMAGE IMAGE VIDEO SIGNAL GENERATOR |
GB2201317B (en) * | 1987-02-17 | 1991-07-17 | Rca Licensing Corp | Picture-in-picture video signal generator |
Also Published As
Publication number | Publication date |
---|---|
JPS6222506B2 (en) | 1987-05-18 |
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