JPH11340875A - Spread spectrum communication equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify the circuit of communication equipment and to enhance the performance by eliminating the need for an orthogonal demodulation circuit when receiving and demodulating a signal that is orthogonal-modulated by a spread code. SOLUTION: A data conversion section 2 shares transmission data one by one bit each to generate I, Q data, and a data spread section 4 assigns pluralities of spread codes generated by a spread code generating section 3 to different bits to apply spread modulation to the data. Two modulated data are subjected to phase modulation by an orthogonal modulation section 5 to obtain a spread spectrum signal, which is sent via a high frequency section. The received spread spectrum signal is frequency-converted by the high frequency section, two correlation demodulators 14, 15 of a correlation demodulation section apply correlation demodulation to the signal to detect separate spread codes. A data/clock recovery section 16 regenerates a clock from the correlation demodulation signal, consisting of the detection codes and uses this clock to recover data from the one correlation demodulation signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spread spectrum communication apparatus for phase modulating a carrier with a spreading code.

[0002]

2. Description of the Related Art As a conventional spread spectrum communication method, for example, as shown in Japanese Patent Publication No. Hei 7-71022, in a transmission unit, a spread modulation unit converts continuous transmission data into every other bit. After being distributed to every other bit to obtain I data and Q data, respectively,
The Q data is multiplied by a spreading code, each data is phase-modulated by a different carrier orthogonal to each other by a phase modulation unit, transmitted as a spread spectrum signal, and the received spread spectrum signal is transmitted by a correlation demodulation unit at a receiving unit. In general, a delay detection method of correlating and demodulating with the same single spreading code as that of the section and multiplying the demodulated output by a signal obtained by delaying the data by one bit to reproduce data is widely known.

[0003]

By the way, in the above-mentioned conventional system, the receiving section performs phase detection using two orthogonal carriers in order to separate I and Q data from the received spread spectrum signal. Since it is necessary to accurately synchronize such a carrier with the carrier of the received spread spectrum signal, the configuration of the receiving section becomes complicated and large, and the quadrature demodulation is performed with high accuracy. It was difficult to do.

[0004] It is an object of the present invention to provide a spread spectrum communication apparatus which solves such a problem, simplifies the configuration of a receiving section, and can improve the performance.

[0005]

In order to achieve the above object, according to the present invention, on the transmitting side, a spreading code is changed in accordance with transmission data, and on the receiving side, the spreading code is determined by a correlation demodulator. To play the data. Then, the timing of the correlation demodulation signal for each bit is shifted by multiplying the spread code in accordance with each clock speed of the separated transmission data.

This eliminates the need for a quadrature demodulation circuit.
Data can be asynchronously reproduced without being aware that the signal is a quadrature modulated signal.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a spread spectrum communication apparatus according to the present invention, wherein 1 is an input terminal for transmission data, 2 is a data converter, 3 is a spread code generator, 4 is a data spreader, Is a quadrature modulator, 6 and 7 are local oscillators, 8 is a transmission frequency converter, 9 is a transmission amplifier, 10 is an antenna switching unit, 11 is a reception RF amplifier,
12 is a reception frequency conversion unit, 13 is a reception IF amplification unit,
Reference numerals 14 and 15 denote correlation demodulators, 16 a data / clock reproducing section, 17 an output terminal for received data, 18 an output terminal for a received clock, and 19 an antenna.

Referring to FIG. 1, first, a transmitting section will be described. Continuous transmission data input from an input terminal 1 is supplied to a spread modulating section, and is divided by a data converting section 2 on a bit-by-bit basis to form two parallel data. It is separated into data to be transmitted (that is, I and Q data). The transmitted data, and thus the I and Q data, are synchronized with the clock,
The spreading code generator 3 generates and outputs a plurality of spreading codes in synchronization with the clock and corresponding to each bit of the I and Q data. These spreading codes are supplied to the data spreading unit 4 and multiplied by the I and Q data from the data converting unit 2, respectively. The two data from the data spreading unit 4 are supplied to a phase modulation unit.

In this phase modulating section, the quadrature modulating section 5 phase-modulates the signals with the orthogonal carriers from the local oscillator 6 and adds them to form a spread spectrum signal, which is supplied to the high frequency section. In the high frequency section, the signal is mixed with the output signal of the local oscillator 7 by the transmission frequency conversion section 8 and R
The signal is frequency-converted into an F signal, amplified by the transmission amplification unit 9, and transmitted from the antenna 19 via the antenna switching unit 10.

Next, the receiving section will be described. The RF signal of the spread spectrum signal received by the antenna 19 is supplied to the high frequency section. In this high-frequency section, the RF signal is amplified by a reception RF amplification section 11, mixed with an output signal of a local oscillator 7 by a reception frequency conversion section 12, and
The signal is frequency-converted into an F signal,
The signal is amplified at 3 and supplied to the correlation demodulation unit.

In the correlation demodulation unit, two correlation demodulators 14 and 15 having different spreading codes from each other are used. When the spreading codes of the supplied IF signals coincide with each other, a burst signal is output. And outputs the demodulated signal to the received signal reproducing unit. The received signal reproducing unit includes a data / clock reproducing unit 16, and reproduces data and a clock by determining which of the correlation demodulators 14 and 15 has output the demodulated signal. The reproduced data and clock are output from output terminals 17 and 18, respectively.

FIG. 2 is a block diagram showing a specific example of a spread modulation section and a phase modulation section in the transmission section in FIG.
20 and 21 are spreading code generators, 22 and 23 are delay circuits,
24 to 27 are AND circuits; 28 and 29 are OR circuits;
Reference numerals 0 and 31 denote multipliers, 32 denotes a 90-degree phase shifter, 33 denotes an adder, and 34 denotes an output terminal. Portions corresponding to those in FIG.

In FIG. 1, transmission data is input from an input terminal 1 in synchronization with a clock φ, as shown in FIG. This data converter 2
In this example, the continuous transmission data composed of "1" and "0" bits is distributed for each bit, and as shown in FIG. 4, two data having a period T twice as long as the clock φ, that is, I data. , Q data. These I and Q data are supplied to the data spreading section 4.

The spreading code generator 3 generates and outputs spreading codes PN0 and PN1 having a period T in synchronization with the clock from the spreading code generators 20 and 21, respectively, as shown in FIG. And the data spreading unit 4 as code A
Supplied to As shown in FIG. 4, these spread codes PN0 and PN1 are delayed by delay circuits 22 and 23 by a time of T / 2 equal to the cycle of clock φ, respectively, and
Is supplied to the data diffusion unit 4.

In the data spreading section 4, the supplied I data is supplied to an AND circuit 24, and is inverted and ANDed.
It is also supplied to the circuit 25. Further, these AND circuits 2
The spread codes PN1 and PN0 of the code A are supplied to 4 and 25, respectively. Thereby, as shown in FIG. 4, when the I data is, for example, "1" bit (high level),
The spreading code PN1 is output from the D circuit 24, and when the bit is “0” bit (low level), the spreading code PN0 is output from the AND circuit 25. The output signals of these AND circuits 24 and 25 are combined by an OR circuit 28, whereby the OR circuit 28 outputs a spread code PN with "1" bits of I data.
The I ′ data which becomes the spreading code PN0 is obtained by 1, “0” bits.

In the data spreading section 4, the supplied Q
The data is supplied to the AND circuit 26, and is also inverted and supplied to the AND circuit 27. Furthermore, these AND
The spreading codes PN1 and PN0 of the code B (that is, the code A is delayed by the time T / 2) are supplied to the circuits 226 and 27, respectively. Thus, as shown in FIG. 4, when the Q data is, for example, “1” bit, the spreading code PN1 is output from the AND circuit 26, and when the Q data is “0” bit, the
The spreading code PN0 is output from the D circuit 27. These A
The output signals of the ND circuits 26 and 27 are combined by an OR circuit 29, whereby the OR circuit 29 outputs Q 'data which becomes a spreading code PN1 with "1" bits of Q data and a spreading code PN0 with "0" bits. Is obtained. These I ',
The Q ′ data is supplied to the quadrature modulator 5 of the phase modulator.

In the phase modulation section 5, the I 'data is
0 and multiplied by the carrier of the local oscillator 6,
A spread code signal phase-modulated with I 'data is obtained.
Further, the Q 'data is supplied to the multiplier 31, output from the local oscillator 6, and multiplied by the carrier shifted by the 90-degree phase shifter 32 to obtain a spread code signal phase-modulated by the Q' data. .

These spread code signals have carriers orthogonal to each other, and are added by the adder 33 without interference, whereby an IF (intermediate frequency) spectrum spread signal is obtained. This spread spectrum signal is supplied from the output terminal 34 to the high frequency section (FIG. 1).

FIG. 3 is a block diagram showing a specific example of the correlation demodulation unit and the reception signal reproduction unit in the reception unit shown in FIG. 1, wherein 35 is an input terminal, 36 is an adder, 37 is an envelope detection circuit, 38 is a bandpass filter, 39 and 40 are limiter amplifiers, 41 is a detection circuit, 42 to 44 are comparators, 45 is a waveform shaping circuit, 46 and 47 are AND circuits,
Reference numeral 8 denotes an output terminal of a carrier sense signal, and portions corresponding to those in FIG.

In the figure, here, the correlation demodulator 1
4 and 15, spreading codes PN0, P generated by the spreading code generator 3 (FIGS. 1 and 2) in the spreading modulator of the transmitting unit.
A SAW matched filter corresponding to N1 is used.

The received spread spectrum signal converted into an IF signal in the high frequency section (FIG. 1) is supplied from input terminal 35 to SAW matched filters 14 and 15. The SAW matched filter 14 has a configuration corresponding to the one spreading code PN1. The SAW matched filter 14 has a portion corresponding to the spreading code PN1 in the I ′ and Q ′ data of the supplied received spread spectrum signal.
As shown in FIG. 4, the burst-like signal is
Output as The SAW matched filter 15 has a configuration corresponding to the above-mentioned spreading code PN0,
As shown in FIG. 4, a burst signal is output as a correlation demodulation signal b at the spread code PN0 in the I ′ and Q ′ data of the supplied received spread spectrum signal. These correlation demodulated signals a and b are supplied to the received signal reproducing unit 16.

Here, the period T of the spreading code is twice the period of the original transmission data (ie, the period of the clock φ), but the I ′ data and Q ′ data are only for the time T / 2. The output a of the SAW matched filter 14
And the cycle of the burst signal obtained by combining the output b of the SAW matched filter 15 is equal to the cycle of the clock φ and T /
2 cycle.

In the received signal reproducing section 16, the correlation demodulated signals a and b are added by an adder 36. The output of the adder 36 is obtained for each of the spread codes PN0 and PN1 in the I 'and Q' data of the correlation demodulated signals a and b.
The signal has a period of T / 2. From the output signal of the adder 36, the clock frequency component is extracted by the band-pass filter 38, amplified to a predetermined level by the limiter amplifier 40, and then shaped to a constant level by the comparator 43. 2 clocks φ are obtained.

The correlated demodulated signal a is detected by an envelope detection circuit 37, further amplified to a predetermined level by a limiter amplifier 39, shaped to a fixed level by a comparator 42, and sent to a waveform shaping circuit 45. Supplied. In the waveform shaping circuit 45, for example, the output signal of the comparator 42 is sampled and held for each clock φ obtained by the comparator 43, so that the same reception data as the transmission data is obtained.

In this manner, the data and the clock φ are reproduced and output from the output terminals 17 and 18 via the AND circuits 46 and 47, respectively.

In the data / clock reproducing section 16,
Means for detecting the level of the received spread spectrum signal is provided, and in a situation where a bit error occurs in a weak electric field,
The squelch function of shutting off the reproduction data and the clock φ by turning off the AND circuits 46 and 47 is provided.

That is, the demodulated signal output from the band-pass filter 38 is an RSSI (Receive Signal Strength Indicator).
The level of the spread spectrum signal supplied to the detection circuit 41 including a cator (detection of received signal strength) circuit is detected, supplied to the comparator 44, and compared with a predetermined reference level. The comparison result is output from the output terminal 48 as a carrier sense signal, and A
It is used to control the ND circuits 46 and 47. If the detection output level of the detection circuit 41 is lower than the reference level of the comparator 44, it is determined that the reception is performed in a weak electric field where a bit error occurs, and the AND circuits 46 and 47 are turned off to set the data and clock φ. Disable output.

As described above, in the first embodiment, data can be asynchronously reproduced from a received spread spectrum signal without using a quadrature demodulation circuit.

In the first embodiment, in order to simplify the circuit configuration, data bit determination is performed by the correlation demodulation unit 1.
4 is performed using only the correlation demodulation output of FIG.
What is necessary is just to compare 15 correlation demodulation outputs.

Further, in the first embodiment, a plurality of SAW matched filters having different spreading codes are used. However, since the SAW matched filter can cope with different spreading code information depending on the signal transmission direction, correlation demodulation is performed. By controlling the signal transmission direction in the section, the same effect as described above can be obtained even if a single matched filter is used.

FIG. 5 is a block diagram showing a main part of a transmission section of a second embodiment of the spread spectrum communication apparatus according to the present invention, wherein 49 is a transmission clock output terminal, 50 is a transmission clock generation section, and 51 is a transmission clock generation section. A reference clock oscillating section, 52 is a counter circuit, 53 and 54 are EX-OR (exclusive OR) circuits, 55 and 56 are spreading code generation circuits, and portions corresponding to those in FIG. .

FIG. 6 is a timing chart showing signals of respective parts in FIG. 5, and signals corresponding to FIG. 5 are denoted by the same reference numerals.

In the first embodiment, different types of spreading codes are used in accordance with "1" and "0" bits of transmission data. In the second embodiment, however, basically, Has a configuration shown in FIG. 1, but uses a single spreading code (that is, only one type of spreading code). On the receiving side, instead of the correlation demodulation unit, it is described later with reference to FIG. The "1" and "0" bits are discriminated using the delay detection unit.

5 and 6, the period of the clock output from the transmission clock output unit 49 is T /
2, and from the spreading code generation circuits 55 and 56, the period T
Are generated and output with a T / 2 phase shift.

The reference clock output from the reference clock oscillating circuit 51 is supplied to a counter circuit 52, and is divided into a clock φ1 having a period T and a clock T having a period T different from the clock φ1 by a period of T / 2 (that is, φ was inverted)
A clock φ2 and the like are generated. Transmission clock generator 5
At 0, the output clock of the counter circuit 52 is subjected to logic synthesis processing to generate a clock a having a period T / 2 and output from the output terminal 49.

The transmission data b having a bit cycle of T / 2 input from the input terminal 1 is supplied to the data conversion unit 2 and first sampled and held by the clocks φ1 and φ2. As a result, as shown in FIG. 6, data c having a bit period T composed of every other bit D0, D2, D4,... With the sample hold by φ2, as shown in FIG. 6, every other bit D1, D3, D5,.
.. Are obtained with a bit period T composed of. That is, the transmission data b is distributed for each bit, and is divided into two data c and d having a period T, respectively.

Further, the data conversion unit 2 performs a differential conversion on each of the data c and d to invert the level of each "1" bit (in FIG. 6, a bit indicated by a high level). 2, D-converted data e and f are obtained as shown in FIG. Here, in the range shown in FIG. 6, the D-converted data e is obtained by inverting the bit D2 following the bit D0 of “1” in the data c from “1” to “0”. f
Is the bit D5 following the bit D3 of "1" in the data d.
Is inverted from “1” to “0”. The D-converted data e and f thus obtained are supplied to EX-OR circuits 53 and 54, respectively.

On the other hand, the spreading code generator 3 has two spreading code generating circuits 56 and 55, and generates the same type of spreading code PN at a period T. However, the spread code generation circuit 56 generates the spread code PN in phase synchronization with the clock φ1, and thus in phase with each bit of the D-converted data e from the data conversion unit 2.
This is supplied to the EX-OR circuit 53 as a spread code g. Further, the spread code generation circuit 55 outputs the clock φ2
This spread code PN is generated in synchronism with the phase of the D-converted data f from the data converter 2 and in phase with the respective bits of the D-converted data f.
It is supplied to the R circuit 54. The spreading code h is the same type of spreading code PN as the spreading code g, as shown in FIG. 6, but the phase is delayed by T / 2 from this.

The spread code g is subjected to arithmetic processing by the EX-OR circuit 53 with the D-converted data e from the data converter 2. As a result of this operation, the EX-OR circuit 53 obtains data consisting of a code string of the spreading code PN having a period T, that is, spread data i shown in FIG. When the bit is “1”, the spreading code PN is level-inverted. In this case, the spreading code PN thus level-inverted is represented as PN (−), and the original spreading code PN without level inversion is referred to as PN (+). Similarly, the spread code h is arithmetically processed by the EX-OR circuit 54 with the D-converted data f from the data conversion unit 2, and the EX-O circuit 54
From the R circuit 53, as shown in FIG. 6, data consisting of a code sequence of spreading codes PN (+) and PN (-) with a period T, that is, spreading data j is obtained.

These spread data i and j are phase-modulated by the quadrature modulator 5 of the phase modulator as described with reference to FIG. 2, and then supplied from the output terminal 34 to the high-frequency unit (FIG. 1).

In this way, a spread spectrum signal is formed using one type of spreading code PN and transmitted to the receiving side.

FIG. 7 is a block diagram showing a main part of a receiving unit with respect to the transmitting unit shown in FIG.
58 is a SAW matched filter, 59 is a delay circuit, 60
Is a multiplier, and portions corresponding to those in FIG. 1 are denoted by the same reference numerals.

FIG. 8 is a timing chart showing signals at various parts in FIG. 7, and signals corresponding to FIG. 7 are denoted by the same reference numerals.

In FIG. 7, the received signal processed in the high frequency section as shown in FIG. 1, that is, the spread spectrum signal described in FIGS. 5 and 6, is inputted from the input terminal 35 and supplied to the delay detection section 57. Is done. In the delay detection unit 57, the received spread spectrum signal is supplied to a SAW matched filter 58 configured according to the spread code PN, and when the received spread spectrum signal matches the spread code PN,
Correlation demodulation signal k is output in a burst. Here, since the received spread spectrum signal is obtained by orthogonally modulating and adding two spread data g and h shifted by T / 2 described in FIGS. 5 and 6, in the SAW matched filter 58, The spread codes PN of the spread data g and h are detected alternately at every time T / 2. Therefore, as shown in FIG. 8, a burst-like correlated demodulated signal k is output at a period T / 2. Note that the spreading code P in these spreading data g, h
N (+) and PN (-) have a relationship in which the correlation demodulation signal k is phase inverted.

The correlated demodulated signal k output from the SAW matched filter 58 is supplied to a multiplier 60, and the correlated demodulated signal k is supplied to a delay circuit 59 for two bits of transmission data (accordingly, for one period of the spreading code PN). By multiplying by a delayed correlation demodulation signal 1 obtained by delaying by T, phase detection is performed and a detection output signal m is obtained. The multiplier 60 multiplies the correlation demodulation signal k and the delayed correlation demodulation signal 1 by a spreading code portion having the same phase (respectively PN (+), PN
(+) Or PN (-), PN (-)) and a spreading code part (one of which is PN
The polarity of the detection output signal m is different from (+) when the other is from PN (-)).

In FIG. 8, the spread code PN is added to each of the correlated demodulated signal k and the delayed correlated demodulated signal l.
When signs (+) and (-) are added to (+) and PN (-), as shown in the figure, these correlated demodulated signals k and
Detection output signal m obtained by multiplying delayed correlation demodulation signal l
Are as shown in FIG.

The detection output signal m obtained in this way is supplied to the data / clock reproducing unit 16. The data / clock recovery unit 16 has basically the same configuration as the data / clock recovery unit 16 shown in FIG. 3. However, here, the detection output signal m is, on the other hand, directly supplied to the limiter amplifier 39. On the other hand, the polarity is adjusted to one by, for example, square detection, and then supplied to the band-pass filter 38. Thereby, the output terminal 17
, A reception clock is obtained at the output terminal 18, and a carrier sense signal is obtained at the output terminal 48.

As described above, also in the second embodiment, it is possible to asynchronously reproduce data from a received spread spectrum signal without using a quadrature demodulation circuit.

In the second embodiment, when performing correlation demodulation, the delay circuit 59 delays the correlation demodulation signal k by two bits (T) of data.
The delay may be delayed by more than bits (T / 2) or 3 bits (3T / 2), and the same effect can be obtained.

[0050]

As described above, according to the present invention,
When reproducing each data from the quadrature modulated signal, a quadrature demodulation circuit for demodulating each modulated carrier from the quadrature modulated signal becomes unnecessary, and the data can be reproduced asynchronously.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a spread spectrum communication apparatus according to the present invention.

FIG. 2 is a block diagram showing a specific example of a spread modulator and a phase shift modulator in FIG.

FIG. 3 is a block diagram showing a specific example of a correlation modulator and a received signal reproducer in FIG. 1;

FIG. 4 is a diagram showing a timing relationship between signals in FIGS. 2 and 3;

FIG. 5 is a block diagram illustrating a main part of a transmission unit in a spread spectrum communication apparatus according to a second embodiment of the present invention.

FIG. 6 is a timing chart showing signals of respective units in FIG. 5;

FIG. 7 is a block diagram illustrating a main part of a receiving unit for the transmitting unit illustrated in FIG. 5;

FIG. 8 is a timing chart showing signals of respective units in FIG. 7;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Input terminal of transmission data 2 Data conversion part 3 Spreading code generation part 4 Data spreading part 5 Quadrature modulation part 6, 7 Local oscillator 8 Transmission frequency conversion part 9 Transmission amplification part 10 Antenna switching part 11 Reception RF amplification part 12 Reception frequency conversion unit 13 Reception IF amplification unit 14, 15 Correlation demodulator 16 Data / clock recovery unit 17 Reception data output terminal 18 Reception clock output terminal 19 Antenna 20, 21 Spread code generator 22, 23 Delay circuit 30 , 31 multiplier 32 90-degree phase shifter 33, 36 adder 37 envelope detection circuit 38 band-pass filter 39, 40 limiter amplifier 41 detector 42-44 comparator 45 waveform shaping circuit 48 carrier sense signal output terminal 49 transmission clock Output terminal 50 transmission clock generator 51 reference clock oscillator 52 Counter circuit 53, 54 EX-OR (exclusive OR) circuit 55, 56 Spread code generation circuit 57 Delay detection unit 58 SAW matched filter 59 Delay circuit 60 Multiplier

Claims (6)

[Claims] 1. A transmission unit for transmitting a spread signal by multiplying transmission data by a spread code in a spread modulation unit and phase-modulating a modulation output of the spread modulation unit by a phase modulation unit, and a received spread spectrum signal. And a receiving unit that discriminates a data and a clock in a received signal reproducing unit from a demodulated output of the correlation demodulating unit.The spread modulating unit in the transmitting unit, By generating a plurality of spreading codes corresponding to each of the transmission data, the correlation demodulation unit in the receiving unit determines a code of the received spreading signal in accordance with the plurality of spreading codes,
A spread spectrum communication device for reproducing received data. 2. A transmission unit for multiplying transmission data by a spread code in a spread modulation unit, phase-modulating an output signal of the spread modulation unit in a phase modulation unit and transmitting the spread signal, and correlation demodulation of the received spread spectrum signal. A spread-spectrum communication apparatus, comprising: a demodulation unit for demodulating the data, and a receiving unit for discriminating data and a clock from a demodulated output of the correlation demodulation unit. A spread spectrum communication apparatus, wherein the spread code having a cycle longer than the cycle of the clock is multiplied at each timing. 3. The spread modulation unit according to claim 1, wherein the spread modulation unit multiplies the spread code by a period twice as long as the transmission data, and the phase modulation unit performs one of the continuous transmission data.
Every other data and every other data are 90
° A spread spectrum communication apparatus characterized in that phase modulation is performed by different carrier signals having different phases. 4. The correlation demodulation unit according to claim 1, wherein the correlation demodulation unit is a single or a plurality of correlation demodulation units corresponding to the spreading code used in the spreading modulation unit, and the reception signal reproducing unit includes the spreading code. A spread spectrum communication apparatus characterized by reproducing data by discrimination. 5. The reception signal reproducing unit according to claim 2, wherein the received signal reproducing unit multiplies the demodulated output of the correlation demodulation unit by a signal obtained by delaying the demodulated output by one bit or plural bits of data rate. Judge,
A spread spectrum communication device for reproducing received data. 6. The spread spectrum communication apparatus according to claim 1, wherein a SAW matched filter is used as the correlation demodulator.