JPH11317068A - Memory card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To discriminate various kinds of memory cards in different characteristics and to use the memory cards made to coincide with the characteristics. SOLUTION: A flash memory 22 storing the data transmitted from electronic equipment, a configuration ROM 36 storing the data related to the characteristic of the memory card 2 and a control IC 21 generating/executing a prescribed command from the data transmitted from the electronic equipment are provided on the memory card 2 storing the data transmitted from the electronic equipment. Then, when the memory card 2 is connected to the electronic equipment, the initial setting of the memory card 2 is performed using the data stored in the configuration ROM 36 by a control IC 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card for storing data transmitted from an electronic device.

[0002]

2. Description of the Related Art Conventionally, external storage devices such as magnetic tapes, magnetic disks, optical disks, and memory cards have been used to store data from electronic devices such as computers and digital still cameras. In particular, memory cards are widely used because of their excellent portability and high transfer rates.

[0003]

Various types of memory cards having different characteristics have been developed according to applications. As a result, memory cards having the same appearance but different characteristics are mixed in the market. If the appearance is the same but the characteristics are different,
When a memory card is connected to an electronic device and used, the memory card may or may not be used depending on the electronic device.

[0004] The present invention has been made in view of such circumstances, and aims to identify various types of memory cards having different characteristics and to enable the memory card to be used in accordance with the characteristics. Aim.

[0005]

A memory card according to the present invention is a memory card for storing data transmitted from an electronic device, wherein the first memory means stores data transmitted from the electronic device; A second storage unit that stores data relating to characteristics of the memory card; and a control unit that generates and executes a predetermined command from data transmitted from the electronic device. Then, when the memory card is connected to the electronic device, the control unit performs an initial setting of the memory card using the data stored in the second storage unit.

[0006] In the memory card according to the present invention, the second storage means stores, for example, version information of the memory card. In this case, when the memory card is connected to the electronic device, the control unit performs an initial setting of the memory card using the version information stored in the second storage unit.

[0007] The memory card according to the present invention further comprises:
It is preferable to include a switch for setting to prohibit data writing to the first storage means. in this case,
After performing the initial setting of the memory card, the control unit transmits the setting state of the switch to the electronic device in response to the state reading command transmitted from the electronic device.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. Here, as shown in FIG. 1, a memory card 2 that stores data transmitted from a host computer 1 that is an electronic device will be described as an example. In the present embodiment, a case will be described in which image data transmitted from the host computer 1 is written to the memory card 2, but it goes without saying that the same applies to audio data and other data.

As shown in FIG. 1, the host computer 1 includes a hard disk 11 for storing various data such as still image data and audio data, and a RAM for temporarily storing and reading out image data and the like from the hard disk 11. (Random Access Memory) 12, a display 14 for displaying an image based on image data supplied via a display interface (hereinafter referred to as a display I / F) 13, and a memory via three data lines. Serial interface (hereinafter referred to as serial I / F) 1 for transmitting and receiving data to and from the card 2
5, bus 16 and a CPU (Central Pr
Ocessing Unit) 17.

The RAM 12 temporarily stores, for example, image data stored in the hard disk 11 via the bus 16 and supplies the image data to the serial I / F 15 via the bus 16 as needed.

The display 14 has a hard disk 1
The image data read from the device 1 is supplied via the bus 16 and the display I / F 13, or the image data is supplied from the memory card 2, and a still image or a moving image based on the image data is displayed.

The serial I / F 15 transmits image data to the memory card 2 and receives image data stored in the memory card 2 via three data lines.
More specifically, the serial I / F 15 transmits image data and control data to be written to the memory card 2 and receives image data read from the memory card 2 via the first data line. . In addition, serial I / F15
Outputs a status signal indicating the switched state in response to switching of image data or control data on the first data line via the second data line. Further, the serial I / F 15 is connected to the serial clock SC at the time of transmitting the control data and the image data via the third data line.
Send LK.

The CPU 17 controls the operation of reading image data from the RAM 12 or the hard disk 11 or writing image data into the RAM 12 or the like. The CPU 17 also controls transmission and reception of image data and the like with the memory card 2. For example, CPU 17
Issues a register command for determining whether write protection of a later-described erasure prevention switch of the memory card 2 is turned on, or writes an image to the memory card 2 by specifying an address. Issue instructions.

On the other hand, as shown in FIG. 2, the memory card 2 includes a control IC 21 for receiving image data and control data from the host computer 1, and a flash memory 22 as first storage means for storing image data.
And an erroneous erasure prevention switch 23 for preventing erroneous erasure of image data stored in the flash memory 22.

The control IC 21, the flash memory 22, and the erroneous erasure prevention switch 23 are, as shown in FIG.
It is provided in a plate-like member 24 formed in a substantially plate shape. The erroneous erasure prevention switch 23 is provided on one end side of the plate member 24 in the longitudinal direction and on the opposite side to the mounting direction. The erroneous erasure prevention switch 23 is slidable in a direction orthogonal to the longitudinal direction of the plate member 24. As shown in FIG.
Is located on the left side in the mounting direction, the state in which image data can be recorded, that is, the write protection is off.

As shown in FIG. 4, when the erroneous erasure prevention switch 23 is located on the right side in the mounting direction, a gap 25 appears. At this time, memory card 2
Indicates that the image data cannot be recorded, that is, the write protection is turned on. Therefore, even if the user puts only the memory card 2 in, for example, a pocket of clothes, the user can determine the presence or absence of the gap 25 by tactile sensation, and easily determine whether or not the memory card 2 is write-protected. it can.

The control IC 21 is control means for generating and executing a predetermined command from data transmitted from the host computer 1. This control IC 21
Before writing the image data transmitted from the host computer 1 to the flash memory 22, it is determined whether the write protection of the erroneous erasure prevention switch 23 is set to ON or OFF, and the write protection is set to ON. The image data is written to the flash memory 22 only when the image data is present.

Here, the control IC 21 specifically includes a serial / parallel / parallel / serial interface sequencer (hereinafter, referred to as an S / P & P / S sequencer) 31 and an S / P & P / S sequencer 3.
Page buffer 32 for temporarily storing image data from
And a flash interface for supplying image data from the page buffer 32 to the flash memory 22.
A sequencer (hereinafter, referred to as a flash I / F sequencer) 33, an ECC encoder / decoder 34 for performing error correction processing, a command generator 35 for generating a predetermined control command, and information on the characteristics of the memory card 2 A configuration ROM (Re) which is a second storage means for storing version information and the like.
ad Only Memory) 36 and an oscillator 37 for supplying a clock to each circuit.

The S / P & P / S sequencer 31 is connected to the serial I / F 15 of the host computer 1 via the above-mentioned first to third data lines. Therefore, S /
The P & P / S sequencer 31 has a host computer 1
Supplies a status signal, a serial clock SCLK, and serial data DIO including image data and control data.

Then, the S / P & P / S sequencer 31
Converts the serial data DIO supplied from the host computer 1 into parallel data in synchronization with the serial clock SCLK. S / P & P / S sequencer 3
1 supplies, for example, control data of the parallel data to the command generator 35 and supplies image data to the page buffer 32.

The page buffer 32 stores the image data supplied from the S / P & P / S sequencer 31 in one page (=
(512 bytes). An error correction code is added to the image data stored in the page buffer 32 by the ECC encoder / decoder 34. The page buffer 32 supplies the image data of one page to which the error correction code is added to the flash memories 22a to 22d via the flash I / F sequencer 33. Thus, the image data from the host computer 1 is written in the flash memories 22a to 22d.

The image data read from the flash memories 22a to 22d is supplied to a page buffer 32 via a flash I / F sequencer 33.

The page buffer 32 has a flash I / F
The image data from the sequencer 33 is stored. At this time, the ECC encoder / decoder 34 performs an error correction process based on the error correction code added to the data stored in the page buffer 32. Then, the page buffer 32 reads the error-corrected data for each page, and supplies the data to the S / P & P / S sequencer 31. Then, the S / P & P / S sequencer 31 converts the parallel image data supplied from the page buffer 32 into serial data DIO and transmits the serial data DIO to the host computer 1 described above.

The command generator 35 has a function of S / P &
A control command is generated based on control data from the P / S sequencer 31. For example, when the command generator 35 receives a read status register command for checking the operation state of the memory card 2, the command generator 35 determines the setting of the erroneous erasure prevention switch 23, and writes the image data according to the setting. Is determined.

The command generator 35 outputs a busy command (hereinafter, referred to as a busy signal) indicating that image data is being written to the flash memory 22 or image data is being read from the flash memory 22. And sends it to the host computer 1 via the S / P & P / S sequencer 31. Then, when the writing or reading of the image data is completed, the command generator 35 indicates a ready command (hereinafter, referred to as a ready signal) indicating the completion.
And sends it to the host computer 1 via the S / P & P / S sequencer 31. The host computer 1 recognizes the operating state of the memory card 2 by receiving these busy signals and ready signals.

The configuration ROM 36 stores version information of the memory card 2 and information of initial setting values. Therefore, when the host computer 1 and the memory card 2 are connected, the command generator 35
First reads the version information and the like from the configuration ROM 36 via the S / P & P / S sequencer 31 and generates a predetermined command based on this information to perform predetermined initialization of the memory card 2. It has become.

In the host computer 1 and the memory card 2 having such a configuration, when writing the image data of the host computer 1 to the memory card 2, as shown in FIG. 5, the host computer 1 performs steps S1 to S8. At this time, the memory card 2 performs the processing of steps S11 to S14.

When writing of image data to the memory card 2 is set in the host computer 1, the CPU 1
7 issues a read status register instruction which is a state read instruction for confirming the state of the memory card 2 (step S1), and transmits this register instruction to the memory card 2 via the serial I / F 15. . In addition,
This read status register instruction is issued for each file to be transmitted.

In the memory card 2, when the command generator 35 receives the register command via the S / P & P / S sequencer 31, the command generator 35 sets the state of the erroneous erasure prevention switch 23 to the register, and stores the contents of this register. The data is transmitted to the host computer 1 via the S / P & P / S sequencer 31 (step S11). In other words, the command generator 35 sets a state of whether or not the erroneous erasure prevention switch 23 is turned on, that is, whether or not the write protection (write protection) of the memory card 2 is turned on, into a register, and stores the contents of this register in the host. Send to computer 1.

In the host computer 1, the CPU 1
7 is based on the register content from the memory card 2
It is determined whether or not the write protection is turned on (step S2). If the write protection is turned on, a write prohibition process is performed (step S3).

When the CPU 17 determines that the write protect is not turned on, it issues a write page buffer instruction and, for example,
The image data of 1 to 512 bytes is read, and the write page buffer command and the image data are transmitted to the memory card 2 via the serial I / F 15 (step S4).

The CPU 17 further issues a set command instruction, designates an address for writing the image data in the memory card 2, and issues a write instruction (step S5). The CPU 17 transmits these command instructions to the memory card 2 via the serial I / F 15.

In the memory card 2, when the command generator 35 receives a set command instruction from the host computer 1 via the S / P & P / S sequencer 31, the command generator 35 registers a busy state indicating that it is operating. And sends a busy signal indicating the contents of the register to the host computer 1 via the S / P & P / S sequencer 31 (step S12). In addition,
This busy signal is continuously transmitted to the host computer 1 until a ready state is set in the register.

Then, the command generator 35
A command to execute writing is issued, and one page of image data is written to the specified address of the flash memory 22 (step S13). When the writing of the image data for one page is completed, the command generator 35 sets a ready state in the register and sends a ready signal indicating the register contents to the S / P & P /
The data is transmitted to the host computer 1 via the S sequencer 31 (step S14).

On the other hand, in the host computer 1, the CPU
17 issues a set command instruction in step S5, issues a read status register instruction, and checks the state of the memory card 2 (step S5).
6). Then, the CPU 17 determines whether or not the signal transmitted from the memory card 2 via the serial I / F 15 is a busy signal.
Issue a status register instruction (step S
6). That is, while the busy signal is being transmitted from the memory card 2, the processes of steps S6 and S7 are repeatedly performed.

When the CPU 17 determines that the signal transmitted from the memory card 2 is not a busy signal, ie, determines that the transmitted signal is a ready signal,
It is determined whether or not there is more image data to be transmitted to the memory card 2, and if there is more image data, step S4
When there is no subsequent image data, the transmission of the image data ends (step S8). That is, the file of the image data to be recorded is written to the memory card 2 for each page by repeatedly performing the processes of steps S4 to S8 and the processes of steps S12 to S14.

As described above, every time a file is recorded,
Since it is determined whether the write protection of the memory card 2 is on or off, for example, when the memory card 2 is mounted on the host computer 1, the erroneous erasure prevention switch 23
Even if the setting of the write protection is changed, it is possible to perform the process of prohibiting the writing of the image data or to record the image data according to the setting contents.

The erroneous erasure prevention switch 23 allows the write protection setting to be changed even when the memory card 2 is mounted on the host computer 1. Thus, it is not necessary to switch the erroneous erasure prevention switch 23, and the operability of the user can be improved.

Next, the operation when erasing the image data stored in the memory card 2 will be described. When erasing the image data stored in the memory card 2, as shown in FIG. 6, the host computer 1 performs the processing of steps S21 to S27, and at this time, the memory card 2 performs the processing of steps S31 to S34. Perform processing.

When erasure of image data stored in the memory card 2 is set in the host computer 1, the CPU 17 issues a read status register command for confirming the state of the memory card 2 (step). S21), this register instruction is transferred to the serial I / F1
5 to the memory card 2. This read status register instruction is issued for each file to be transmitted.

In the memory card 2, when the command generator 35 receives the register command, the command generator 35 sets the state of the erroneous erasure prevention switch 23 in the register, and stores the contents of this register via the S / P & P / S sequencer 31. Transmit to the host computer 1 (step S3
1). In other words, the command generator 35 sets a state as to whether or not the write protection of the memory card 2 is turned on in a register, and transmits the contents of the register to the host computer 1.

In the host computer 1, the CPU 1
7 is based on the register content from the memory card 2
It is determined whether or not the write protection is turned on (step S22). If the write protection is turned on, erasure prohibition processing is performed (step S23).

Then, the CPU 17 issues a set command instruction, designates an address of image data to be erased, and issues an erase instruction (step S24). C
PU 17 transmits these command instructions to serial I / F 1
5 to the memory card 2.

On the other hand, in the memory card 2, when the command generator 35 receives the above-mentioned set command command from the host computer 1, it issues a busy signal to the S
The data is transmitted to the host computer 1 via the / P & P / S sequencer 31 (step S32).

Then, the command generator 35
A command for erasing the image data at the designated address is issued to erase the designated image data stored in the flash memory 22 (step S3).
3). In the flash memory 22, one page (5
The image data is erased for each predetermined number of blocks each of which is a set of image data of 12 bytes) and management information of 18 bytes.

When the erasing of the image data is completed, the command generator 35 sets a ready state in the register and sends a ready signal indicating the contents of the register to the S / P.
Host computer 1 via & P / S sequencer 31
(Step S34).

On the other hand, in the host computer 1, the CPU
17 issues a set command instruction in step S24, issues a read status register instruction, and checks the state of the memory card 2 (step S24).
25). Then, the CPU 17 determines whether the signal transmitted from the memory card 2 via the serial I / F 15 is a busy signal, and if not, issues a read status register command again (step S2).
6). Therefore, while the busy signal is being transmitted from the memory card 2, the processes of steps S25 and S26 are repeatedly performed.

When the CPU 17 determines that the signal transmitted from the memory card 2 is not a busy signal, ie, determines that the transmitted signal is a ready signal,
It is determined whether or not there is image data to be erased in the memory card 2. If there is continuous image data to be erased, the process proceeds to step S <b> 24. (Step S27). That is, the file of the image data to be deleted is stored in steps S24 to S27 and step S3 described above.
2 to step S34 are repeatedly performed, so that each block is erased.

As described above, every time a file is deleted,
By judging whether the write protection of the memory card 2 is on or off, even if the setting of the write protection by the erroneous erasure prevention switch 23 is changed when the memory card 2 is mounted on the host computer 1, for example, the setting contents are changed. The processing of prohibiting the erasure of the image data can be performed according to.

It should be noted that the present invention is not limited to the above-described embodiment, and that various design changes can be made within the scope of the technical idea described in the claims. Needless to say.

For example, as described above, the erroneous erasure prevention switch 23 is slidable in one direction in the longitudinal direction of the plate member 24 and on the opposite side to the mounting direction and in a direction orthogonal to the longitudinal direction. Should be fine. Therefore, for example, as shown in FIGS. 7 and 8, it may be provided on the main surface of the plate member 24. At this time, as shown in FIG. 7, when the erroneous erasure prevention switch 23 is located on the left side with respect to the mounting direction, the write protection can be set to off.
As shown in FIG. 8, when the erroneous erasure prevention switch 23 is located on the right side with respect to the mounting direction, the gap 26
Is formed. At this time, the write protection can be set to ON. Therefore, even if the user puts only the memory card 2 in, for example, a pocket of clothes, the user can determine the presence or absence of the gap 26 by tactile sensation, and easily determine whether or not the memory card 2 is write-protected. it can.

[0052]

As described above in detail, according to the memory card of the present invention, when the memory card is connected to the electronic device, the memory card is used by using the data stored in the second storage means. Since the initial setting is made, various types of memory cards having different characteristics can be identified, and the memory card can be used according to the characteristics.

After performing the initial setting, the electronic device changes the setting state of a switch for setting to prohibit the writing of data to the first storage means in response to a state read command transmitted from the electronic device. By transmitting the data, it is possible to perform data write-inhibition processing or record data according to the setting state of the switch.

Further, by making the switch freely switchable even when the memory card is attached to the electronic device, it is not necessary to remove the memory card from the electronic device when switching the switch. Operability can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a host computer to which the present invention has been applied.

FIG. 2 is a block diagram showing a configuration of a memory card to which the present invention is applied.

FIG. 3 is an external perspective view of the memory card.

FIG. 4 is an external perspective view of the memory card.

FIG. 5 is a flowchart illustrating operations of a host computer and a memory card.

FIG. 6 is a flowchart illustrating operations of a host computer and a memory card.

FIG. 7 is another external perspective view of the memory card.

FIG. 8 is another perspective view of the external appearance of the memory card.

[Explanation of symbols]

1 host computer, 2 memory card, 21
Control IC, 22 Flash memory, 23
Erroneous erase prevention switch, 31 S / P & P / S sequencer, 32 page buffer, 33 flash I
/ F sequencer, 34 ECC encoder / decoder, 35 command generator, 36 configuration ROM, 37 oscillator

Claims (3)

[Claims] 1. A memory card for storing data transmitted from an electronic device, a first storage means for storing data transmitted from the electronic device, and a second memory for storing data relating to characteristics of the memory card.
Storage means, and control means for generating and executing a predetermined command from data transmitted from the electronic device, wherein the control means stores a second command when the memory card is connected to the electronic device. A memory card, wherein initial setting of the memory card is performed using data stored in the means. 2. The memory card according to claim 1, wherein said second storage means stores version information of said memory card. 3. The memory card further includes a switch for setting to prohibit writing of data to the first storage means, and the control means transmits the data from the electronic device after performing the initial setting. 2. The memory card according to claim 1, wherein a setting state of the switch is transmitted to the electronic device in response to the state reading command issued.