JP2000099676A - Memory card and data transmitting and receiving device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent stored data from being erroneously deleted or overwriten with other data and also freely switch an erroneous deletion preventing switch. SOLUTION: Upon receiving a register instruction for confirming the state of a memory card 2 through an S/P(serial/parallel) &P/S(parallel/serial) sequencer 31, a command generator 35 sets the state of an erroneous deletion preventing switch 23 in a register, and transmits this register content through the S/P & P/S sequencer 31 to a host computer. The host computer judges whether or not write protect is turned on, based on the register content from the memory card 2, and operates a processing for prohibiting write when the write protect is turned on.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card having an erroneous erasure prevention function and a data transmission / reception device therefor.

[0002]

2. Description of the Related Art Conventionally, external storage devices such as magnetic tapes, magnetic disks, optical disks, and memory cards have been used to store data from electronic devices such as computers and digital still cameras. In particular, memory cards are widely used because of their excellent portability and high transfer rates.

[0003]

The memory card, like the flexible disk, is provided with an erasure prevention switch for preventing erroneous erasure of stored data. However, since the conventional erasure prevention switch is provided on the main surface of the card memory main body, the user cannot switch the switch when the memory card is mounted on the electronic device.

[0004] In this case, when the memory card is inserted into the electronic device and writing is not possible, the user cannot overwrite the already stored data and store new data, which is extremely inconvenient. . In such a case, it is necessary for the user to take out the memory card from the electronic device, switch the erroneous erasure prevention switch to enable writing, and re-attach the memory card, and it is desired to improve the operation of switching the erroneous erasure prevention switch. Was.

SUMMARY OF THE INVENTION The present invention has been made in view of such circumstances, and it is possible to freely set an erroneous erasure prevention switch while preventing erroneously stored data from being erased or overwritten by other data. It is an object of the present invention to provide a memory card and a data transmitting / receiving device for the memory card, which can be switched to another.

[0006]

According to the present invention, in a memory card for storing data transmitted from a control device, a flash memory for storing data from the control device, and writing of data to the flash memory is prohibited. A switch for performing setting, interface means for the control device, and flashing data transmitted from the control device via the interface means in response to a command transmitted from the control device via the interface means. And control means for controlling the switch to store it in a memory, wherein the control means transmits the setting state of the switch to the control device via the interface means.

Further, the present invention relates to a data transmitting / receiving apparatus for transmitting / receiving data between a control device and a memory card.
The memory card includes a flash memory that stores data transmitted from the control device, a switch that performs setting for prohibiting writing of data to the flash memory, an interface unit with the control device, In response to a status read command transmitted through the interface means, the setting state of the switch is transmitted to the control device via the interface means, and the control device is set when the switch is not set to write-protected. And control means for storing data transmitted together with the write command in the flash memory in response to the write command transmitted from the interface means, and wherein the control device has an interface with the memory card. Equipped with the above note Sends a status read command to the card via the interface means, and determines whether or not the write-protected data to the flash memory, when the writing of data is not prohibited,
A write command and data are transmitted to the memory card via the interface means.

Further, according to the present invention, in a memory card for storing data transmitted from a control device, a flash memory for storing data from the control device and a setting for inhibiting data writing to the flash memory are performed. A switch, interface means for the control device, and control means for controlling to erase data stored in the flash memory in accordance with a command transmitted from the control device via the interface means, The control means transmits the setting state of the switch to the control device via the interface means.

Further, the present invention relates to a data transmission / reception device for transmitting / receiving data between a control device and a memory card, wherein the memory card includes: a flash memory for storing data transmitted from the control device; A switch for setting to prohibit writing of the data, an interface means for the control device, and a setting state of the switch in response to a status read command transmitted from the control device via the interface means. And the address transmitted with the erase command in response to the erase command transmitted from the control device via the interface means when the switch is not set to write-protected. The specified data is Control means for controlling erasing from the memory, wherein the control device includes an interface means with the memory card, transmits a status read command to the memory card via the interface means, and stores data in the flash memory. It is characterized in that whether or not writing is prohibited is determined, and if data writing is not prohibited, an erasure command and an address to be erased are transmitted to the memory card via the interface means. .

[0010]

Embodiments of the present invention will be described below with reference to the drawings. The present invention can be applied to the host computer shown in FIG. 1 and a memory card that stores data from the host computer. In the present embodiment, a case will be described in which image data transmitted from a host computer is written to a memory card, but it goes without saying that the same applies to audio data and other data.

As shown in FIG. 1, the host computer 1 includes a hard disk 11 for storing various data such as still image data and audio data, and a RAM for temporarily storing and reading image data and the like from the hard disk 11. (Random Access Memory) 12, a display 14 for displaying an image based on image data supplied via a display interface (hereinafter referred to as a display I / F) 13, and a memory via three data lines. Serial interface (hereinafter referred to as serial I / F) 1 for transmitting and receiving data to and from the card 2
5, bus 16 and a CPU (Central Pr
Ocessing Unit) 17.

The RAM 12 temporarily stores, for example, image data stored in the hard disk 11 via the bus 16 and supplies the image data to the serial I / F 15 via the bus 16 as needed.

The display 14 has a hard disk 1
The image data read from the device 1 is supplied via the bus 16 and the display I / F 13, or the image data is supplied from the memory card 2, and a still image or a moving image based on the image data is displayed.

The serial I / F 15 transmits image data to the memory card 2 and receives image data stored in the memory card 2 via three data lines.
More specifically, the serial I / F 15 transmits image data and control data to be written to the memory card 2 and receives image data read from the memory card 2 via the first data line. . The serial I / F 15 outputs, via the second data line, a status signal indicating the switched state in response to switching of image data or control data on the first data line. Further, the serial I / F 15 is connected to the serial clock SCLK at the time of transmitting the control data and the image data via the third data line.
Send

The CPU 17 controls reading of image data from the RAM 12 and the hard disk 11, writing of image data to the RAM 12 and the like,
It also controls the transmission and reception of image data etc. For example, CP
U17 issues a register command for determining whether or not a write-protection of an erroneous erasure prevention switch described later of the memory card 2 is turned on, or designates an address to the memory card 2 to store predetermined image data. Issue a write instruction.

On the other hand, as shown in FIG. 2, the memory card 2 includes a control IC 21 for receiving image data and control data from the host computer 1, a flash memory 22 for storing image data, and a flash memory 22 for storing image data. An erroneous erasure prevention switch 23 is provided for preventing erroneous erasure of the image data being erased.

The control IC 21, the flash memory 22, and the erroneous erasure prevention switch 23 are, as shown in FIG.
It is provided in a plate-like member 24 formed in a substantially plate shape. The erroneous erasure prevention switch 23 is provided on one end side of the plate member 24 in the longitudinal direction and on the opposite side to the mounting direction. The erroneous erasure prevention switch 23 is slidable in a direction orthogonal to the longitudinal direction of the plate member 24. As shown in FIG.
Is located on the left side in the mounting direction, the state in which image data can be recorded, that is, the write protection is off.

As shown in FIG. 4, when the erroneous erasure prevention switch 23 is located on the right side in the mounting direction, a gap 25 appears. At this time, memory card 2
Indicates that the image data cannot be recorded, that is, the write protection is turned on. Therefore,
Even if the user puts only the memory card 2 in, for example, a pocket of clothes, the user can judge by touch the presence or absence of the gap 25 and can easily judge whether or not the memory card 2 is write-protected.

The control IC 21 stores the image data transmitted from the host computer 1 in the flash memory 2.
Before writing to the flash memory 22, it is determined whether the write protection of the erroneous erasure prevention switch 23 is set to ON or OFF, and the image data is written to the flash memory 22 only when the write protection is set to ON. It has become.

Here, the control IC 21 specifically includes a serial / parallel / parallel / serial interface sequencer (hereinafter, referred to as an S / P & P / S sequencer) 31 and an S / P & P / S sequencer 3.
Page buffer 32 for temporarily storing image data from
And a flash interface for supplying image data from the page buffer 32 to the flash memory 22.
A sequencer (hereinafter referred to as a flash I / F sequencer) 33, an ECC encoder / decoder 34 for performing error correction processing, a command generator 35 for generating a predetermined control command, and a configuration storing version information and the like. ROM (Read Only Memo
ry) 36 and an oscillator 37 for supplying a clock to each circuit. The S / P & P / S sequencer 31 is connected to the host computer 1 via the first to third data lines.
Connected to the serial I / F 15. Therefore, S
/ P & P / S sequencer 31 has status data, serial clock SCLK, serial data DIO including image data and control data from host computer 1.
Is supplied.

The S / P & P / S sequencer 31
Converts the serial data DIO supplied from the host computer 1 into parallel data in synchronization with the serial clock SCLK. S / P & P / S sequencer 3
1 supplies, for example, control data of the parallel data to the command generator 35 and supplies image data to the page buffer 32.

The page buffer 32 stores the image data supplied from the S / P & P / S sequencer 31 in one page (=
(512 bytes). An error correction code is added to the image data stored in the page buffer 32 by the ECC encoder / decoder 34. The page buffer 32 supplies the image data of one page to which the error correction code is added to the flash memories 22a to 22d via the flash I / F sequencer 33. Thus, the image data from the host computer 1 is written in the flash memories 22a to 22d.

The image data read from the flash memories 22a to 22d is supplied to the page buffer 32 via the flash I / F sequencer 33.

The page buffer 32 has a flash I / F
The image data from the sequencer 33 is stored. At this time, the ECC encoder / decoder 34 performs an error correction process based on the error correction code added to the data stored in the page buffer 32. Then, the page buffer 32 reads the error-corrected data for each page, and supplies the data to the S / P & P / S sequencer 31. Then, the S / P & P / S sequencer 31 converts the parallel image data supplied from the page buffer 32 into serial data DIO and transmits the serial data DIO to the host computer 1 described above.

The command generator 35 has a function of S / P &
A control command is generated based on control data from the P / S sequencer 31. For example, when the command generator 35 receives a read status register command for checking the operation state of the memory card 2, it determines the setting of the erroneous erasure prevention switch 23, and writes image data according to the setting. Is determined.

The command generator 35 outputs a busy command (hereinafter referred to as a busy signal) indicating that image data is being written to the flash memory 22 or image data is being read from the flash memory 22. And sends it to the host computer 1 via the S / P & P / S sequencer 31. When the writing or reading of the image data is completed, the command generator 35 generates a ready command (hereinafter, referred to as a ready signal) indicating the completion of the writing or reading, and sends it to the S / P & P / S sequencer 3.
1 to the host computer 1. The host computer 1 recognizes the operating state of the memory card 2 by receiving these busy signals and ready signals.

The configuration ROM 36 stores version information of the memory card 2 and information of initial setting values. Therefore, when the host computer 1 and the memory card 2 are connected, the command generator 35 first reads the version information and the like from the configuration ROM 36 via the S / P & P / S sequencer 31, and based on this information, By issuing a predetermined command, a predetermined initial setting of the memory card 2 is performed.

In the host computer 1 and the memory card 2 configured as described above, when writing the image data of the host computer 1 to the memory card 2, the host computer 1 performs steps S1 to S8 as shown in FIG. At this time, the memory card 2 performs the processing of steps S11 to S14.

When writing of image data to the memory card 2 is set in the host computer 1, the CPU
17 issues a read status register instruction for confirming the state of the memory card 2 (step S
1), this register command is transmitted to the memory card 2 via the serial I / F 15; This read status register instruction is issued for each file to be transmitted.

In the memory card 2, when the command generator 35 receives the register command via the S / P & P / S sequencer 31, the command generator 35 sets the state of the erroneous erasure prevention switch 23 to the register, and stores the contents of this register. The data is transmitted to the host computer 1 via the S / P & P / S sequencer 31 (step S11). In other words, the command generator 35 sets the state of whether the erroneous erasure prevention switch 23 is turned on, that is, whether the write protection (write protection) of the memory card 2 is turned on, in a register, and stores the contents of this register in the host. Send to computer 1.

In the host computer 1, the CPU 1
7 is based on the register content from the memory card 2
It is determined whether or not the write protect is turned on (step S2). If the write protect is turned on, a write prohibition process is performed (step S3).

When the CPU 17 determines that the write protect is not turned on, it issues a write page buffer instruction and, for example,
The image data of 1 to 512 bytes is read, and the write page buffer command and the image data are transmitted to the memory card 2 via the serial I / F 15 (step S4).

The CPU 17 further issues a set command instruction, and specifies a write address of the image data in the memory card 2 and issues a write instruction (step S5). The CPU 17 transmits these command instructions to the memory card 2 via the serial I / F 15.

In the memory card 2, upon receiving a set command command from the host computer 1 via the S / P & P / S sequencer 31, the command generator 35 registers a busy state indicating that the apparatus is operating. And sends a busy signal indicating the contents of the register to the host computer 1 via the S / P & P / S sequencer 31 (step S12). In addition,
This busy signal is continuously transmitted to the host computer 1 until a ready state is set in the register.

Then, the command generator 35
A command to execute writing is issued, and one page of image data is written to the specified address of the flash memory 22 (step S13). When the writing of the image data for one page is completed, the command generator 35 sets a ready state in the register, and sends a ready signal indicating the contents of the register to the S / P & P.
It is transmitted to the host computer 1 via the / S sequencer 31 (step S14).

On the other hand, in the host computer 1, the CPU
17 issues a set command instruction in step S5, issues a read status register instruction, and checks the state of the memory card 2 (step S5).
6). Then, the CPU 17 determines whether or not the signal transmitted from the memory card 2 via the serial I / F 15 is a busy signal.
Issue a status register instruction (step S
6). That is, while the busy signal is being transmitted from the memory card 2, the processes of steps S6 and S7 are repeatedly performed. When the CPU 17 determines that the signal transmitted from the memory card 2 is not a busy signal,
That is, when it is determined that the transmitted signal is a ready signal, it is determined whether or not there is continuous image data to be transmitted to the memory card 2. If there is no data, the transmission of the image data ends (step S8). That is, the file of the image data to be recorded is stored in steps S4 to S4.
By repeatedly performing the processing up to step S8 and the processing of steps S12 to S14, data is written to the memory card 2 for each page.

As described above, according to the present invention, each time a file is recorded, it is determined whether the write protection of the memory card 2 is on or off. Therefore, for example, the memory card 2 is mounted on the host computer 1. Even if the setting of the write protection by the erroneous erasure prevention switch 23 is changed, it is possible to perform the process of prohibiting the writing of image data or to record the image data according to the setting.

The erroneous erasure prevention switch 23 allows the write protection setting to be changed even when the memory card 2 is mounted on the host computer 1. Therefore, it is not necessary to switch the erroneous erasure prevention switch 23, and the operability of the user can be improved.

Next, the operation for erasing the image data stored in the memory card 2 will be described. When erasing the image data stored in the memory card 2, as shown in FIG. 6, the host computer 1 performs the processing of steps S21 to S27, and at this time, the memory card 2 performs the processing of steps S31 to S34. Perform processing.

When erasure of image data stored in the memory card 2 is set in the host computer 1, the CPU 17 issues a read status register command for confirming the state of the memory card 2 (step). S21), this register instruction is transferred to the serial I / F1
5 to the memory card 2. This read status register instruction is issued for each file to be transmitted. In the memory card 2, when the command generator 35 receives the register command, the command generator 35 sets the state of the erroneous erasure prevention switch 23 in the register, and stores the contents of this register via the S / P & P / S sequencer 31 in the host computer 1. (Step S31). In other words, command generator 3
Reference numeral 5 sets a state as to whether the write protect of the memory card 2 is on or not in a register, and transmits the contents of the register to the host computer 1.

In the host computer 1, the CPU 1
7 is based on the register content from the memory card 2
It is determined whether or not the write protection is turned on (step S22). If the write protection is turned on, erasure prohibition processing is performed (step S23).

Then, the CPU 17 issues a set command instruction, designates an address of image data to be erased, and issues an erase instruction (step S24). C
PU 17 transmits these command instructions to serial I / F 1
5 to the memory card 2.

On the other hand, in the memory card 2, when the command generator 35 receives the above-mentioned set command command from the host computer 1, it issues a busy signal to the S
The data is transmitted to the host computer 1 via the / P & P / S sequencer 31 (step S32).

Then, the command generator 35
A command for erasing the image data at the designated address is issued, and the designated image data stored in the flash memory 22 is erased. (Step S3
3). In the flash memory 22, one page (5
The image data is erased for each predetermined number of blocks each of which is a set of image data of 12 bytes) and management information of 18 bytes.

When the erasure of the image data is completed, the command generator 35 sets a ready state in the register and sends a ready signal indicating the contents of the register to the S / P.
Host computer 1 via & P / S sequencer 31
(Step S34).

On the other hand, in the host computer 1, the CPU
17 issues a set command instruction in step S24, issues a read status register instruction, and checks the state of the memory card 2 (step S24).
25). Then, the CPU 17 determines whether the signal transmitted from the memory card 2 via the serial I / F 15 is a busy signal, and if not, issues a read status register command again (step S2).
6). Therefore, while the busy signal is being transmitted from the memory card 2, steps S25 and S26 are performed.
Is repeated.

When the CPU 17 determines that the signal transmitted from the memory card 2 is not a busy signal, that is, determines that the transmitted signal is a ready signal,
It is determined whether or not there is image data to be erased in the memory card 2. If there is continuous image data to be erased, the process proceeds to step S 24. If there is no continuous image data to be erased, the erasure of the image data ends. (Step S27). That is, the file of the image data to be erased is stored in the above-described steps S24 to S27 and step S3.
2 to step S34 are repeatedly performed, so that each block is erased.

As described above, according to the present invention, each time a file is erased, it is determined whether the write protection of the memory card 2 is on or off. Therefore, for example, the memory card 2 is mounted on the host computer 1. Even if the setting of the write protection by the erroneous erasure prevention switch 23 is changed, the process of prohibiting erasure of the image data can be performed according to the setting.

It should be noted that the present invention is not limited to the above embodiment, and that various design changes are possible within the scope of the technical idea described in the claims. Needless to say.

For example, as described above, the erroneous erasure prevention switch 23 is slidable in one direction in the longitudinal direction of the plate member 24 and on the opposite side to the mounting direction, and in a direction orthogonal to the longitudinal direction. Should be fine. Therefore, for example, as shown in FIGS. 7 and 8, it may be provided on the main surface of the plate member 24. At this time, as shown in FIG. 7, when the erroneous erasure prevention switch 23 is located on the left side with respect to the mounting direction, the write protection can be set to off. Also, as shown in FIG.
Is located on the right side with respect to the mounting direction, the gap 26 is formed. At this time, the write protection can be set to ON. Therefore, even if the user puts only the memory card 2 in, for example, a pocket of clothes, the user can judge the presence or absence of the gap 26 by tactile sensation, and easily determine whether or not the memory card 2 is write-protected. it can.

[0051]

As described above in detail, in the memory card according to the present invention, the setting state of the switch for setting the writing of data to the flash memory to be inhibited is controlled by the control means via the interface means to the control device. Since transmission is performed, when data writing to the flash memory is not prohibited, data transmitted from the control device via the interface means can be stored in the flash memory, and the setting contents of the switch can be stored in the flash memory. In accordance with the data write-protection process,
Alternatively, data can be recorded.

In the data transmitting / receiving apparatus according to the present invention, the control device transmits a status read command to the memory card via the interface means, and determines whether or not data writing to the flash memory is prohibited. When the writing of data is not prohibited, a write command and data can be transmitted to the memory card via the interface means and stored in the flash memory of the memory card.

Also, in the memory card according to the present invention, the setting state of the switch for setting the writing of data to the flash memory is prohibited is transmitted by the control means to the control device via the interface means. When the writing of the data is not prohibited, the data stored in the flash memory can be erased according to a command transmitted from the control device via the interface means, and the setting contents of the switch can be erased. Erasure of data can be prohibited or erasure of data can be enabled in accordance with the conditions.

Further, in the data transmission / reception device according to the present invention, the control device transmits a status read command to the memory card via the interface means, and determines whether or not data writing to the flash memory is prohibited. If the writing of data is not prohibited, and if the writing of data is not prohibited, the erase command and the address to be erased are transmitted to the memory card via the interface means. The data specified by the specified address can be erased from the flash memory of the memory card.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a host computer to which the present invention has been applied.

FIG. 2 is a block diagram showing a configuration of a memory card to which the present invention is applied.

FIG. 3 is an external perspective view of the memory card.

FIG. 4 is an external perspective view of the memory card.

FIG. 5 is a flowchart illustrating operations of a host computer and a memory card.

FIG. 6 is a flowchart illustrating operations of a host computer and a memory card.

FIG. 7 is another perspective view of the external appearance of the memory card.

FIG. 8 is another perspective view of the external appearance of the memory card.

[Explanation of symbols]

11 hard disk, 17 CPU, 21 control IC, 22 flash memory, 23 erasure prevention switch, 31 S / P & P / S sequencer, 35 command generator

Claims (18)

[Claims] 1. A memory card for storing data transmitted from a control device, a flash memory for storing data from the control device, a switch for performing a setting for prohibiting writing of data to the flash memory, An interface unit with a control device, and control for controlling to store data transmitted from the control device via the interface unit in the flash memory in accordance with a command transmitted from the control device via the interface unit. Means, wherein the control means transmits the setting state of the switch to the control device via the interface means. 2. The memory card according to claim 1, wherein said interface means includes nine connection terminals including at least one data connection terminal. 3. The memory card according to claim 1, wherein serial communication is performed with said control device via said interface means. 4. The memory card according to claim 1, further comprising a concave portion extending over a plurality of surfaces, wherein the switch is configured in the concave portion. 5. The memory card according to claim 4, wherein the switch is slidable in a direction along at least one surface of the recess. 6. The memory card according to claim 5, wherein a gap is formed when the switch is slid in one direction. 7. A data transmitting / receiving device for transmitting / receiving data between a control device and a memory card, wherein the memory card includes a flash memory for storing data transmitted from the control device, and a data write to the flash memory. A switch for setting to prohibit, an interface means with the control device, and a setting state of the switch via the interface means in response to a status read command transmitted from the control device via the interface means. In addition to transmitting the data to the control device, the data transmitted together with the write command in response to the write command transmitted from the control device through the interface means when the switch is not set to write-protected, to the flash memory. Control to control to remember The control device includes an interface unit with the memory card, transmits a status read command to the memory card via the interface unit, and determines whether data writing to the flash memory is prohibited. A data transmission / reception device which transmits a write command and data to the memory card via the interface means when data writing is not prohibited. 8. The data transmission / reception device according to claim 7, wherein the interface means of the memory card includes nine connection terminals including at least one data connection terminal. 9. The data transmission / reception device according to claim 7, wherein the memory card and the control device perform serial communication via the respective interface means. 10. A memory card for storing data transmitted from a control device, a flash memory for storing data from the control device, a switch for setting a setting to prohibit writing of data to the flash memory, Interface means for a control device, and control means for controlling to erase data stored in the flash memory in accordance with a command transmitted from the control device via the interface means, wherein the control means comprises: A memory card for transmitting a setting state of the switch to the control device via the interface means. 11. The memory card according to claim 10, wherein said interface means includes nine connection terminals including at least one data connection terminal. 12. The memory card according to claim 10, wherein serial communication is performed with said control device via said interface means. 13. The memory card according to claim 10, further comprising a recess extending over a plurality of surfaces, wherein the switch is configured in the recess. 14. The memory card according to claim 13, wherein the switch is slidable in a direction along at least one surface of the recess. 15. A gap is formed when the switch is slid in one direction.
The memory card as described. 16. A data transmitting / receiving apparatus for transmitting / receiving data between a control device and a memory card, wherein the memory card includes a flash memory for storing data transmitted from the control device, and a data write to the flash memory. A switch for setting to prohibit, an interface means with the control device, and a setting state of the switch via the interface means in response to a status read command transmitted from the control device via the interface means. Data specified by an address transmitted to the control device and transmitted together with the erase command in response to the erase command transmitted from the control device via the interface means when the switch is not set to write-protected. From the above flash memory The control device includes an interface with the memory card, transmits a status read command to the memory card via the interface, and inhibits writing of data to the flash memory. A data transmission / reception device for transmitting an erasure command and an address to be erased to the memory card via the interface means if the data writing is not prohibited. . 17. The data transmission / reception device according to claim 16, wherein the interface means of the memory card includes nine connection terminals including at least one data connection terminal. 18. The memory card and the control device,
17. The data transmission / reception device according to claim 16, wherein serial communication is performed via each of said interface means.