JPH11184434A - Liquid crystal device and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To set freely a partial display area to a certain extent for a device user in a liquid crystal display device having a function making only a partial part of a screen a display state and making a remaining part a non-display state. SOLUTION: When an area to be partially displayed is made the surrounded area from L1-th row to L2-th row and from M1-th column to M2-th column of a liquid crystal display panel 1, a register is provided in a control circuit, and values corresponding to L1, L2, M1, M2 are made to be written in beforehand to be partially displayed according to the values written therein.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal device having a function of setting only a part of a region to a display state and setting another region to a non-display state.

[0002]

2. Description of the Related Art The number of display dots of a display device used in a portable electronic device such as a cellular phone has been increasing year by year so that more information can be displayed, and accordingly, the power consumption of the display device has also increased. I'm coming. Since the power supply of the portable electronic device is a battery, it is strongly required that the power consumption be low so that the battery life can be extended. Therefore, in a display device having a large number of display dots, the entire screen is set to the display state when necessary, but in a normal state, only a partial area of the display panel is set to the display state so that the minimum necessary display can be performed. A method of reducing power consumption by hiding an area in a non-display state has been studied.

Many conventional liquid crystal display devices have a function of controlling display / non-display of the entire screen, but have a function of setting only a certain area of the screen to a display state and setting other areas to a non-display state. Things have not yet been put to practical use. A method for realizing such a function is disclosed in JP-A-6-95621.
Example 1 and JP-A-7-281632 have been proposed. Both of these conventional examples describe the case where the liquid crystal display panel is a simple matrix type.

FIG. 7 and FIG.
An embodiment of the invention will be described below. FIG. 7 is a block diagram of the liquid crystal display device of this embodiment. The block 51 is a liquid crystal display panel, in which a substrate on which a plurality of scanning electrodes are formed and a substrate on which a plurality of signal electrodes are formed are arranged to face each other at an interval of several μm, and liquid crystal is sealed in the gap. Block 5
Reference numeral 5 denotes a Y driver for driving the scanning electrodes.
Reference numeral 6 denotes an X driver for driving signal electrodes. A plurality of voltage levels required for driving the liquid crystal are formed by a driving voltage forming circuit of the block 54, and are applied to the liquid crystal display panel via the X driver and the Y driver. Block 57 is a scanning control circuit for controlling the number of scanning electrodes to be scanned. A block 52 is an LCD controller for forming timing signals, display data signals, and control signals required for these circuits, and a block 53 is a power supply source for the above circuits. A selection voltage is sequentially applied to the scanning electrodes one row at a time, and a non-selection voltage is applied to the other rows. A signal voltage according to ON / OFF of each pixel of the selected row is sequentially applied to the signal electrode.

This embodiment describes the case where the partial display is the left half screen and the case where the partial display is the upper half thereof.
First, the case where the partial display is the left half screen will be described. The number of signal electrodes is 640. Before shifting to the partial display state of the left half screen, data in which all pixels for one row are off is written to the X driver. After that, the LCD controller doubles the cycle of the clock CLX for operating the shift register inside the X driver, halves the number of clocks in one selection period, and transfers only the display data of 320 pixels per row accordingly. I do. At this time, the right driver half of the X driver was transferred first because the X driver has a built-in circuit to store display data for one row even if the data transfer is only for 320 pixels of the left half screen. The OFF data continues to be stored, and the 320 outputs in the right half of the X driver continue to output a voltage to turn off the display. Thus, the right half screen can be turned off. Since the operation clock frequency of the X driver is reduced by half and half of the panel is turned off, the power consumption of the display device is slightly reduced as compared with the case of the full screen display state.

Next, a case where the partial display is only the upper half of the left half screen will be described. The number of scanning electrodes is 400. First, only the left half screen is displayed by the method described above. Subsequently, the LCD controller outputs the partial display control signal PD.
Is set to the “H” level, and the lower half is set to the non-display state. PD
Is "L" level, the entire screen is displayed by scanning all the scanning electrodes at 1/400 duty.
When the PD is at the "H" level, only the upper half scan electrodes of the panel are scanned at 1/200 duty, so that the upper half screen is in the display state and the remaining lower half screen is in the non-display state. . Switching to 1/200 duty is performed by halving the number of clocks in one frame period by doubling the cycle of the clock CLY for operating the shift register inside the Y driver. Although details of a method of stopping scanning of the scanning electrodes in the lower half screen in the partial display state are not described, the scanning control circuit block 54
From the 200th stage of the shift register in the Y driver when PD is set to “H” level.
The data to be transferred to the first stage is fixed at the “L” level,
As a result, the 201st to 400th outputs of the Y driver maintain the non-selection voltage level.

The ON / OFF state of a pixel is determined by the effective value of the voltage applied to the liquid crystal. The effective voltage applied to the liquid crystal in the lower half screen is 右上 of the upper right because no selection voltage is applied to the scanning electrodes.
The voltage is considerably smaller than the effective voltage applied to the liquid crystal in the off display state of the screen, and as a result, the lower half screen is completely hidden.

In the simple matrix type liquid crystal display panel, when the display duty is switched, it is necessary to change the setting of the drive voltage. This will be described below with reference to FIG. 8, which is an internal circuit of the drive voltage forming block 53.

First, the configuration and function of FIG. 8 will be described. To drive a liquid crystal display panel having a duty higher than about 1/30 duty, six levels of voltages V0 to V5 are required. The maximum voltage applied to the liquid crystal is V0-V5,
The input power supply voltage of +5 V is used as it is for V0. A voltage V5 at which the contrast is optimal is extracted from the input power supply of 0V and -24V by the variable resistor RV1 for contrast adjustment and the transistor Q1. V is set by resistors R1 to R5.
Voltages 0-V5 are divided to form intermediate voltages, and the intermediate voltages are increased in driving capability by operational amplifiers OP1 to OP4 to output V1 to V4. Switches S2a and S2b are interlock switches, and R3a and R3a are switched according to the level of signal PD.
One of b is connected. By making the resistance values of R3a and R3b different, V0 to V5 having different voltage division ratios can be formed according to the level of PD.

[0010] Between V0 and V5, V0-V1 = V1-V
2 = V3-V4 = V4-V5, and the voltage division ratio (V0-V1) / (V0-V5) is called a bias ratio. When the duty is 1 / N, the preferable bias ratio is 1 / (1 + ΔN).
8 is disclosed. Therefore, if the resistance values of R3a and R3b are set for 1/400 duty and 1/200 duty, respectively, it is possible to drive with a preferable bias ratio in each duty.

When the duty is switched, it is necessary not only to switch the bias ratio but also to change the driving voltage = V0-V5 at the same time. If the duty is switched from 1/400 to 1/200 while the drive voltage is fixed, even if the bias ratio is switched to a preferable value, the display will be extremely poor in contrast. This is because the effective voltage applied to the liquid crystal becomes too high because the time during which the selection voltage is applied to the liquid crystal is doubled. In this embodiment, the necessity of switching the bias ratio and its realizing means are described in detail, but the necessity of driving voltage switching and its realizing means are not described in detail.

Specifically, if the duty is 1 / N,
In the case of N >> 1, it is necessary to adjust V0-V5 substantially in proportion to ΔN. For example, if the optimum V0-V5 for 1/400 duty is 28V, 1/200
In the case of duty, V0-V5 is set to 28V / {2} 20
V needs to be adjusted. This voltage adjustment is performed by the device user adjusting the contrast adjustment variable resistor RV1 every time the display is switched between the full screen display state and the upper half screen display state, which is very inconvenient for the device user. It is. Although it is necessary to add a drive voltage automatic setting means, it is not as easy as the bias ratio switching means, and the drive voltage forming circuit is greatly complicated.

In the case where the partial display is quite small, about ten rows to about twenty rows, if the duty is changed accordingly, the preferable bias ratio becomes 1/3 or 1/4. The voltage required for driving the liquid crystal is not 6 levels, but 5 levels in the case of 1/4 bias and 4 levels in the case of 1/3 bias. If a five-level voltage is required, R3a and R3b
It is sufficient to set the resistance value on the side connected at the time of partial display to 0Ω, but if a four-level voltage is required, R3 *
Instead, means for setting R2 and R4 to 0Ω is required.
Japanese Patent Application Laid-Open No. 7-281632 describes an embodiment of a bias ratio switching unit and a driving voltage switching unit in such a case, but further description of the embodiment will be omitted.

[0014]

According to the above-mentioned proposed method, the function of setting only a part of the area of the liquid crystal display panel to the display state and setting the other area to the non-display state becomes possible. . However, switching the clock cycle, switching the bias ratio and driving voltage in accordance with the partial display area is limited to the setting where the partial display area is prepared. It has the disadvantage of being extremely poor.

Many liquid crystal drivers have a display off function by a control input terminal. It is possible to set a partial display area for each IC chip by individually controlling the display-off control input for each driver IC using the function. This is a method lacking in versatility because it is limited to only the method.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a highly versatile liquid crystal display device in which a partial display area can be set by software.

[0017]

According to a first aspect of the present invention, there is provided a liquid crystal device having a function of setting a partial area to a display state and setting another area to a non-display state. The position of the display area is varied by a register of the control circuit.

For example, when the region to be partially displayed is a region surrounded by the display dots from the L1 to L2 rows and from the M1 to M2 columns, registers are provided in the control circuit, and L1 and L2 are provided. , M1, M2, it is technically possible to write the values and to partially display the values according to the values written therein. The liquid crystal device having such means has a high versatility because the user can freely set an area to be partially displayed.

According to a second aspect of the present invention, in the liquid crystal device, the display region and the non-display region are separated by the signal electrode, and the voltage applied to the signal electrode in the non-display region is changed to a voltage at which the display is turned off. It is characterized by comprising a means for fixing and a means for stopping the transfer of display data corresponding to the non-display area.

In the partial display, the cycle of the data transfer clock of the display portion is set to be the same as that in the full screen display, and at least one of the data transfer clock and data is stopped during the data transfer period of the non-display portion.
It is possible to maintain versatility in the case where the display region and the non-display region are separated by the signal electrode.

In the liquid crystal device according to the third aspect, the display area and the non-display area are in the row direction separated by the scanning electrodes, and are displayed in all rows and in some rows. It is characterized in that the time for applying the selection voltage to the scanning electrodes in the regions is the same.

Even in the partial display, the time for applying the selection voltage to the scan electrodes in the display area, the bias ratio, and the drive voltage are the same as those in the full screen display, so that the display area and the non-display area are divided by the scan electrodes. The versatility in the case of a divided direction can be maintained.

According to a fourth aspect of the present invention, in the liquid crystal device, the display panel has a pixel portion formed by forming pixel electrodes in a matrix, and a switching element is formed on the pixel electrode. A means for writing the voltage applied to the liquid crystal of the pixel portion to approximately 0V.

In the case of the simple matrix system, the row can be made in a non-display state only by applying a non-selection voltage to the scanning electrode. However, in the case of the active matrix system such as a TFT or MIM, a non-selection period is required. In order to maintain the voltage of the pixel portion, it is necessary to write the off-voltage to the pixels in the non-display row before shifting to the partial display state. 0V
The AC drive peculiar to the liquid crystal is not required if written in the. By such means, even in a liquid crystal device of the active matrix type, versatility can be maintained in the case where the display region and the non-display region are divided by the scanning electrodes.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a partial display state in the liquid crystal device of the present invention, in which a hatched part is a display state and a white part is a non-display state. When necessary, a white background portion is also in a display state, but in a standby state, display is performed in only a partial area of the liquid crystal display panel 1 as shown in the figure.

FIG. 1A shows a case where the display area and the non-display area are divided by the signal electrodes, and FIG. 1B shows a case where the display area and the non-display area are divided by the scan electrodes. 1C and D are diagrams showing the case of the combination. Hereinafter, the direction divided by the signal electrodes is referred to as a column direction, and the direction divided by the scanning electrodes is referred to as a row direction. As described in the following embodiments, the size and position of the partial display area can be set through values set in registers in the control circuit (LCD controller).

FIG. 2 is a block diagram showing the configuration of the liquid crystal display device of the present invention. 1 is a liquid crystal display panel, 2 is an LCD controller, 3 is a power supply source, 4 is a drive voltage forming circuit,
Reference numeral 5 denotes a scanning electrode driving driver, and reference numeral 6 denotes a signal electrode driving driver. Since the basic elements are the same as those in FIG. 6 described in the related art, the description of each element is omitted. The function of the LCD controller, which is the point of the present invention, will be described in each embodiment together with the content of each signal. Although the LCD controller is shown as an independent circuit block in the figure, it may be built in any one of the driver IC chips.

(Embodiment 1) An example of a method for realizing a partial display state as shown in FIG. 1A will be described with reference to FIGS. FIG. 3 is a circuit diagram showing a part of an LCD controller built in the liquid crystal display device, and is a circuit block for controlling a partial display state in a column direction. FIG. 4 is a timing chart showing the operation of the circuit of FIG.

Reference numeral 7 denotes a register of about 8 bits, in which information as to whether or not to perform partial display in the column direction and information corresponding to the number of columns to be partially displayed are set. Normally, display data for a plurality of dots is transferred for each clock of the data transfer clock. Therefore, the number of data transfer clocks corresponding to the number of columns for partial display may be set in the register 7. Assuming that display data for 8 dots is transferred for each data transfer clock, if 7 bits are used, partial display up to 2 ⁷ × 8 dots = 1024 dots can be set in units of 8 dots.

Reference numeral 8 denotes a circuit block mainly composed of a counter, which includes a scanning start signal FRM, a display data latch signal LP,
Based on a timing signal such as a data transfer clock CLXI and a set value of the register 7, timing signals CNT1 and CNT2 for controlling partial display in the column direction are formed. F
The timings of RM, LP, and CLXI are as shown in FIG. In order to make the figure easier to understand, the number of CLXI clocks per LP cycle is shown smaller than the actual number. For example, when the number of display dots in the column direction is 320 and the transfer of display data is 8 dots in parallel, the number of CLXI clocks per LP cycle is 40. CLXI and DataI are signals for a data transfer clock and display data when the partial display is not performed. CLX and Data are signals sent from the LCD controller to the signal electrode driver.
These are a data transfer clock and display data, respectively.

The time t1 in FIG. 4 indicates the time at which the display is switched from the non-partial display state to the partial display state. To be precise,
Processing for partial display starts at t1.

Before t1, CNT1 and CNT2 are constantly at the H level, and at this time, the AND gates 9 and 10 are kept open, and the same signals as CLXI and DataI are sent to CLX and Data, respectively, as they are. CLX and D corresponding to the non-displayed part in the partial display state
CNT1 and CNT2 are set to have timing signals as shown on the right side of FIG. 4 so that the data stops.

The period during which one row is selected, that is,
One cycle of LP is represented as 1H period. While a row is selected, the X driver outputs a voltage according to the display data of each dot in the row.
The transfer to the driver is performed 1H before that.
Since the first row is selected for 1H immediately after the FRM and LP become H level, the display data of the first row is transferred to the X driver 1H before. As the display data on the first line, it is necessary to transfer not only the data to be displayed but also the off-display data to be non-displayed. Therefore, the CLX during the 1H period immediately after t1, that is, the period during which the display data of the first row is being transferred, requires the number of clocks for transmitting data for all the dots in one row, as in the case before t1. CNT1 is at the H level. On the other hand, C during this 1H period
NT2 keeps the display data at the L level while keeping the OFF display data at the L level only during the transfer.

If such data transfer is performed only for 1H immediately after t1, the X driver continues to store the previously transferred OFF data for the portion where no data transfer has been performed. The non-display portion can be set to the off-display state without performing data transfer for a period of time.

By the above-described method, a partial display of the direction in which the display area and the non-display area are separated by the signal electrodes can be performed as shown in FIG. 1A. According to this embodiment, the width of the partial display is made to correspond to the value set in the register, for example, 8
It can be freely changed in dot units.

In the partial display state, partial display can be performed only by stopping one of CLX and Data corresponding to a non-displayed portion. It is preferable in terms of power.

The method described above is an example in which the partial display section starts from the first column of the display panel. However, two registers are provided, and values corresponding to the start column and the end column of the partial display section are set respectively. If it is possible, not only the width of the partial display section in the column direction but also the position can be freely set.
However, in this case, it is necessary to operate the CLX during the period corresponding to the non-display section from the top row of the display panel to the row before the start row of the partial display section.

(Embodiment 2) An example of a method for realizing a partial display state as shown in FIG. 1B will be described with reference to FIGS. FIG. 5 is a circuit diagram showing a part of an LCD controller built in the liquid crystal display device, and is a circuit block for controlling a partial display state in a row direction. FIG. 6 is a timing chart showing the operation of the circuit of FIG. The display panel is line-sequentially driven line by line and has a total of 200 lines. In the partial display state, only the first 32 lines are displayed. In FIGS. 6A and 6B, portions A and B are diagrams of a liquid crystal display device of a simple matrix type and an active matrix type, respectively.

Reference numeral 11 denotes a register of about 8 bits, in which information as to whether or not to perform partial display in the row direction and information corresponding to the number of rows to be partially displayed are set. If the number of rows is set with 7 bits, 2 ⁷ = 12 for a line-sequentially driven panel for each row
Partial display of up to eight lines can be set in units of one line, and in a panel of four-line simultaneous drive, partial display of up to 2 ⁷ × 4 = 512 lines can be set in units of four lines.

Reference numeral 12 denotes a circuit block mainly composed of a counter, which includes a scanning start signal FRM and a scanning signal transfer clock CL.
A timing signal PD for controlling partial display in the row direction based on a timing signal such as YI and a set value of the register 11
Form Y and CNT3. FRM and CLYI have timings as shown in FIG. CLYI is a signal serving as a scanning signal transfer clock when not in partial display. C
LY is a scanning signal transfer clock sent from the LCD controller to the Y driver, and the AND output of CNT3 and CLYI by the AND gate 13 becomes CLY.

Normally, the Y driver has a control input for inhibiting the output of the selection voltage. PDY is a signal serving as such a control input of the Y driver. When the signal is at the L level, the output of the selection voltage is prohibited, and all outputs of the Y driver are at the non-selection voltage level.

The time t2 in FIG. 6 indicates the time at which the display is switched from the non-partial display state to the partial display state. To be precise,
Processing for partial display starts at t2. One frame period immediately after t2 is represented by F1, and the next one frame period is represented by F2.

Before t2, CNT3 is constantly at the H level. At this time, the AND gate 13 remains open, and the same signal as CLYI is sent to CLY as it is. Before t2, PDY is also constantly at the H level,
Each output of the Y driver sequentially outputs a selection voltage, and the entire screen is in a display state. In the partial display state, CNT3 and PDY have timing signals as shown in FIG. 6 so that the CLYs corresponding to the non-displayed portions 33 to 200 are stopped and the selection voltage is not output from the Y driver. To do.

Since the period of CLY is not changed even in the partial display state, the time for applying the selection voltage to the scan electrodes in the display area is the same as in the full screen display. There is no need to change the bias ratio or selection voltage.

When the display panel is of the active matrix type, since the voltage of the pixel portion is maintained during the non-selection period, it is necessary to write the off-voltage to the pixels of the non-display row when shifting to the partial display. . VCT in the figure is a signal voltage control signal, and it is assumed that when VCT is set to L level, a signal voltage for writing to a pixel can be made almost 0V. For example, in the case of a TFT panel, by writing the same voltage as the common potential, the write signal voltage to the pixel can be made almost 0V. In the case of the active matrix method, CNT3 and PDY are set to the H level so that the application of the CLY and the selection voltage is not stopped only during the period of F1, and almost 0 V is written to the pixel while the non-display row is selected.
After F2, CLY corresponding to the non-display portion is stopped, and the selection voltage is not output from the Y driver. In the case of the simple matrix method, the same timing signal may be repeated for each frame after t2.

By the above-described method, a partial display in a direction in which the display area and the non-display area are separated by the scanning electrodes as shown in FIG. 1B can be performed. According to this embodiment, the width of the partial display is made to correspond to the value to be set in the register. It can be freely changed in units of numbers.

In the partial display state, the CLY corresponding to the non-display part can be partially displayed only by stopping the application of the selection voltage without being stopped, but the CLY is also stopped as in this embodiment. This is preferable in terms of reducing power consumption. When stopping the CLY at the time of the partial display using the Y driver whose internal is not reset by the FRM, when changing from the partial display state to the full screen display state, the selection voltage is applied for one frame to avoid abnormal display. It is preferable to stop.

The method described above is an example in which the partial display section starts from the first row of the display panel. However, two registers are provided and values corresponding to the start row and the end row of the partial display section are set respectively. If it is made possible, the position as well as the width of the partial display section in the row direction can be set freely.
However, in this case, it is necessary to operate the CLY during a period corresponding to the non-display section from the first row of the display panel to the start row of the partial display section.

When the first and second embodiments are combined, partial display as shown in FIG. 1C is possible when each register is of one series, and when each register is of two series, FIG. Such partial display becomes possible.

Embodiment 3 Next, an electronic apparatus equipped with the liquid crystal device of the present invention will be described below.

An electronic apparatus constructed using the liquid crystal display device of the above-described embodiment has a display information output source 100 shown in FIG.
0, display information processing circuit 1002, display drive circuit 100
4, a display panel 1006 such as a liquid crystal panel, a clock generation circuit 1008, and a power supply circuit 1010. The display information output source 1000 includes a memory such as a ROM or a RAM, a tuning circuit that tunes and outputs a television signal, and the like, and outputs display information such as a video signal based on a clock from a clock generation circuit 1008. I do. The display information processing circuit 1002 includes a clock generation circuit 1
The display information is processed and output based on the clock from 008. The display information processing circuit 1002 can include, for example, an amplification / polarity inversion circuit, a phase expansion circuit, a rotation circuit, a gamma correction circuit, a clamp circuit, and the like. The display driving circuit 1004 includes a scanning side driving circuit and a data side driving circuit, and drives the liquid crystal panel 1006 for display. The power supply circuit 1010 supplies power to each of the above circuits.

FIG. 10 shows an electronic apparatus having such a configuration.
, A multimedia personal computer (PC) and an engineering workstation (EWS) shown in FIG. 11, a pager shown in FIG. 12, or a mobile phone, a word processor, a television, a viewfinder type video or a monitor direct view type video. Examples include a tape recorder, an electronic organizer, an electronic desk calculator, a car navigation device, a POS terminal, and a device having a touch panel.

FIG. 10 is a schematic configuration diagram showing a main part of the projection display device. In the figure, 10 is a light source, 13 and 14 are dichroic mirrors, 15, 16 and 17 are reflection mirrors, 1
8, 19, and 20 indicate relay lenses, 22, 23, and 24 indicate liquid crystal light valves, 25 indicates a cross dichroic prism, and 26 indicates a projection lens. The light source 10 includes a lamp 11 such as a metal halide and a reflector 1 that reflects light from the lamp.
Consists of two. The dichroic mirror 13 that reflects blue light and green light transmits red light of the white light flux from the light source 10 and reflects blue light and green light. The transmitted red light is reflected by the reflection mirror 17 and enters the red light liquid crystal light valve 22. On the other hand, green light of the color light reflected by the dichroic mirror 13 is reflected by the dichroic mirror 14 that reflects green light, and is incident on the liquid crystal light valve 23 for green light. On the other hand, the blue light also passes through the second dichroic mirror 14. For blue light, in order to prevent light loss due to a long optical path, a light guide means 21 including a relay lens system including an incident lens 18, a relay lens 19, and an exit lens 20 is provided. The light enters the liquid crystal light valve 24 for light. The three color lights modulated by the respective light valves enter the cross dichroic prism 25. This prism has four right-angle prisms bonded together, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface. The three color lights are combined by these dielectric multilayer films to form light representing a color image. The synthesized light is projected on a screen 27 by a projection lens 26 which is a projection optical system,
The image is displayed enlarged.

The personal computer 12 shown in FIG.
00 is a main body 1204 having a keyboard 1202
And a liquid crystal display screen 1206.

The pager 1300 shown in FIG. 12 includes a liquid crystal display substrate 1304, a light guide 1306 having a backlight 1306a, a circuit board 1308, and first and second shield plates 1310 and 13 in a metal frame 1302.
12, two elastic conductors 1314 and 1316, and a film carrier tape 1318. Two elastic conductors 1314 and 1316 and film carrier tape 13
Reference numeral 18 denotes a connection between the liquid crystal display substrate 1304 and the circuit board 1308.

Here, the liquid crystal display substrate 1304 has liquid crystal sealed between two transparent substrates 1304a and 1304b, thereby forming at least a dot matrix type liquid crystal display panel. The drive circuit 1004 shown in FIG. 9 or the display information processing circuit 1002 can be formed over one of the transparent substrates. Circuits not mounted on the liquid crystal display substrate 1304 are external circuits of the liquid crystal display substrate, and can be mounted on the circuit substrate 1308 in the case of FIG.

FIG. 12 shows the configuration of a pager, and therefore requires a circuit board 1308 in addition to the liquid crystal display substrate 1304. However, this is a case where a liquid crystal display device is used as one component for electronic equipment. When a display driving circuit or the like is mounted on a transparent substrate, the minimum unit of the liquid crystal display device is the liquid crystal display substrate 1304. Alternatively, a structure in which the liquid crystal display substrate 1304 is fixed to a metal frame 1302 serving as a housing can be used as a liquid crystal display device which is one component for electronic devices. Further, in the case of a backlight type, a liquid crystal display substrate 1304 and a light guide 1306 provided with a backlight 1306a can be incorporated in a metal frame 1302 to constitute a liquid crystal display device. Instead of these, as shown in FIG.
Two transparent substrates 130 constituting the liquid crystal display substrate 1304
4a and 1304b, a TCP (Tape Carrier Package) in which an IC chip 1324 is mounted on a polyimide tape 1322 on which a metal conductive film is formed.
e) 1320 can be connected to be used as a liquid crystal display device, which is one component for electronic equipment.

The present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the present invention. For example, the present invention is not limited to being applied to the driving of the above-described various liquid crystal panels, but is also applicable to electroluminescence and plasma display devices.

[0059]

According to the present invention, the required size and position of the partial display area can be set by the register by the user of the apparatus.
A highly versatile liquid crystal device can be provided.

[Brief description of the drawings]

FIG. 1 is a diagram showing a partial display state in a liquid crystal display device of the present invention.

FIG. 2 is a block diagram of a liquid crystal display device of the present invention.

FIG. 3 is a partial view of a control circuit of the liquid crystal display device according to the embodiment of the present invention.

FIG. 4 is a timing chart showing the operation of the circuit of FIG. 3;

FIG. 5 is a partial view of a control circuit of a liquid crystal display device according to another embodiment of the present invention.

FIG. 6 is a timing chart showing the operation of the circuit of FIG. 5;

FIG. 7 is a block diagram of a conventional liquid crystal display device having a partial display function.

8 is a detailed circuit diagram of a liquid crystal drive voltage generation circuit in FIG.

FIG. 9 is a schematic view of an electronic apparatus using the liquid crystal device of the present invention.

FIG. 10 is a schematic view of an electronic apparatus showing a configuration in which the liquid crystal device of the present invention is mounted.

FIG. 11 is a schematic view of an electronic apparatus showing a configuration in which the liquid crystal device of the present invention is mounted.

FIG. 12 is a schematic view of an electronic apparatus showing a configuration in which the liquid crystal device of the present invention is mounted.

FIG. 13 is a schematic diagram of an electronic apparatus showing a configuration in which the liquid crystal device of the present invention is mounted.

[Explanation of symbols]

1, 51: Liquid crystal display panel 2, 52: LCD controller 3, 53: Power supply 4, 54: Driving voltage generator 5, 55: Scan electrode driving driver 6, 56: Signal electrode driving driver 57: Scan control circuit 7 , 11 ... register 8 ... column direction control signal forming part 9, 10, 13 ... AND gate 12 ... row direction control signal forming part FRM ... scan start signal LP ... data latch signal CLXI, CLX ... data transfer clock CLYI, CLY ... Scanning signal transfer clock DataI, Data ... Display data CNT1 to CNT3, PDY, VCT ... Partial display control signal RV1 ... Variable resistors R, R1, R2, R3a, R3b, R4, R5 ... Resistors S2a, S2b ... Bipolar transistors OP1 to OP4 ... operational amplifier V0 V5 ... liquid crystal driving voltage

Continued on the front page (51) Int.Cl. ⁶ Identification code FI G09G 3/20 680 G09G 3/20 680S

Claims (5)

[Claims] A liquid crystal device having a function of setting a partial area to a display state and setting another area to a non-display state, wherein the position of the display area or the non-display area is changed by a register of a control circuit. A liquid crystal device characterized by the above-mentioned. 2. The liquid crystal device according to claim 1, wherein the display region and the non-display region are separated by the signal electrode in a direction in which the voltage is applied to the signal electrode in the non-display region and the display is turned off. And a means for stopping transfer of display data corresponding to the non-display area. 3. The liquid crystal device according to claim 1, wherein the display area and the non-display area are in the row direction divided by the scanning electrodes, and are displayed in all rows or in a part of rows. A liquid crystal device wherein the time for applying the selection voltage to the scan electrodes in the display area is the same. 4. A liquid crystal device according to claim 3, wherein a pixel electrode is formed in a matrix on the display panel to form a pixel portion, and a switching element is formed on said pixel electrode, and is located in a non-display area. A liquid crystal device comprising means for writing a voltage applied to liquid crystal in a pixel portion of a row to approximately 0 V. 5. An electronic apparatus comprising the liquid crystal device.