JPH07170072A - Manufacture of polyimide multilayer wiring board - Google Patents

Abstract

PURPOSE:To separate a polyimide insulating layer from a base material without producing an adversary effect on a polyimide multilayer wiring board by a method wherein the polyimide insulating layer is irradiated with ultraviolet ray. CONSTITUTION:A polyimide insulating layer 121 is formed on a quartz glass substrate 111, and a polyimide insulating layer and a wiring layer are formed thereon to form a first block together with the polyimide insulating layer 121. When the first block is separated from the quartz glass substrate 111, the rear of the quartz glass substrate 111 is irradiated with excimer laser 1 ray. A photochemical reaction takes place between the polyimide insulating layer 121 and ultraviolet ray radiated from an excimer laser 1. The polyimide insulating layer 121 positioned at its interface with the quartz glass substrate 111 is removed by this photochemical reaction, and then the quartz glass substrate 111 is separated from the first block.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a polyimide multi-layer wiring board having a multi-layer wiring layer using a polyimide resin for interlayer insulation. The present invention relates to a method for manufacturing a polyimide multilayer wiring board, which is used as a final multilayer wiring board.

[0002]

2. Description of the Related Art In a conventional method for manufacturing a polyimide multilayer wiring board, a polyimide layer and a wiring layer are sequentially laminated from the lowermost layer to the uppermost layer. As an alternative method of manufacturing a polyimide multilayer wiring board, there is a method of manufacturing the board by dividing the board into a plurality of blocks. An example of a method for manufacturing a polyimide multi-layer wiring board using this method is disclosed in Japanese Patent Laid-Open No. Hei 5 (1999)
No. 206643. In this method, a final polyimide multilayer wiring board is obtained by connecting a plurality of blocks manufactured in advance.

The above manufacturing method has the following advantages.

First, there is an advantage that the manufacturing time can be shortened. This is because a plurality of blocks can be manufactured in parallel.

Second, there is the advantage of high reliability.
In the case of the conventional manufacturing method, heating and pressurization are repeated. In particular, the lowermost layer formed first is subjected to a large number of thermal stresses in subsequent steps. Therefore, the polyimide resin is deteriorated in the lowermost layer, and the reliability of the multilayer wiring board is reduced. On the other hand, in the method of manufacturing the multilayer wiring board by dividing it into blocks, since the number of lamination of each block is relatively small, the deterioration of the polyimide layer is prevented and the reliability of the multilayer wiring board is improved.

Thirdly, there is an advantage that the manufacturing yield can be improved. In the case of the conventional manufacturing method, if a defect occurs in any of the stacked layers, the entire multilayer wiring board becomes defective. On the other hand, in the method of manufacturing the multilayer wiring board by dividing it into blocks, the operation is confirmed at the block stage, and only good blocks are connected to manufacture the final multilayer wiring board. Therefore, the manufacturing yield is improved.

[0007]

On the other hand, the above-mentioned manufacturing method has the following problems.

That is, in the above manufacturing method, each block is formed on an independent substrate. For this reason,
When connecting each block, the substrate must be removed from the block.

In the technique described in the above publication, a block is formed on an aluminum substrate, and after the block is formed, the aluminum substrate is dissolved with a hydrochloric acid aqueous solution. Then, there is a problem that the polyimide multilayer wiring board itself is deteriorated in this step.

Further, as in Japanese Patent Laid-Open No. 5-95191,
Another method is to leave the block-formed substrate itself inside the final product. However, in this method, the coefficient of thermal expansion differs between the substrate on which the block is formed and the polyimide layer. Therefore, there is a problem that the substrate may be cracked when heat is applied to connect the blocks.

[0011]

In order to solve the above problems, a method for manufacturing a polyimide multilayer wiring board according to the present invention is
A first step of providing a polyimide layer on a substrate that transmits ultraviolet rays; and a step of irradiating the surface of the substrate opposite to the surface on which the polyimide layer is formed with ultraviolet rays to separate the substrate and the polyimide layer. And two steps.

[0012]

An embodiment of the present invention will be described with reference to the drawings.

First, an outline of the polyimide multilayer wiring board manufactured in this embodiment will be described. [Outline] In the polyimide multilayer wiring board of the present embodiment, the thickness of the polyimide insulating layer, which is the wiring interlayer insulation, is 20 μm. The wiring layer has a film thickness of 10 μm and the wiring layer has a wiring width of 25 μm. Further, the diameter of the via hole connecting the wiring layers is 100 μm. Unless otherwise specified in the description, the polyimide insulating layer formed in this example,
The dimensions of the wiring layers and via holes are in accordance with these.

Further, a photosensitive polyimide having a low coefficient of thermal expansion is used for the polyimide insulating layer. The low thermal expansion coefficient photosensitive polyimide is a photosensitive polyimide having a thermal expansion coefficient of 10 ppm to 30 ppm. On the other hand, the polyimide adhesive layer,
A polyimide resin having a glass transition point is used.

The wiring layer and the bumps are made of gold.
Specifically, it is formed by forming a pattern by a photolithography technique using a photoresist and then performing electrolytic gold plating on this pattern. [Manufacture of First Block] Referring to FIG. 1A to FIG. 1C and FIG. 2A to FIG.
In step 6, the first block 100 is formed on the quartz glass substrate 111. [Step 1] Referring to FIG. 1A, in step 1, a uniform polyimide insulating layer 121 is formed on the quartz glass substrate 111. The thickness of the quartz glass substrate 111 is 2 mm. In addition, the polyimide insulating layer 121 is
It is formed by using a low thermal expansion photosensitive polyimide. The thickness of the polyimide insulating layer 121 is 10 μm. The low thermal expansion photosensitive polyimide has a thermal expansion coefficient of 10 ppm to 30
It is a photosensitive polyimide in the ppm range. [Step 2] Referring to FIG. 1B, in step 2, the wiring layer 131 is formed on the polyimide insulating layer 121.

The wiring layer 131 is formed by a usual method. That is, a pattern is formed by a photolithography technique using a photoresist, and then electrolytic gold plating is applied to this pattern to form the wiring layer 131.
Is formed. That is, the material of the wiring layer 131 is gold. The film thickness of the wiring layer 131 and the width of the wiring pattern are
10 μm and 25 μm, respectively. Wiring layer 131
Is used not only as a connection wiring but also as a wiring for grounding. [Step 3] Referring to FIG. 1C, in step 3, the polyimide insulating layer 122 is formed on the wiring layer 131. Via holes 141 are formed in the polyimide insulating layer 122. The polyimide insulating layer 122 and the via hole 141 are formed by the following steps.

As a first step, a varnish of low thermal expansion photosensitive polyimide is applied on the wiring layer 131.

In the second step, the applied polyimide varnish is exposed and developed to form via holes 141.

As a third step, the polyimide varnish in which the via holes 141 are formed is cured. As a result, the polyimide insulating layer 122 and the via hole 14 are formed.
1 is formed. The thickness of the polyimide insulating layer 122 is 2
It is 0 μm. [Step 4] Referring to FIG. 2A, in step 4, the wiring layer 132, the polyimide insulating layer 123, and the wiring layer 133 are sequentially stacked on the polyimide insulating layer 122. These layers are formed by repeatedly performing the steps 2 and 3. The dimensions and materials of these layers are the same as those formed in steps 2 and 3. [Step 5] Referring to FIG. 2B, in step 5, a polyimide adhesive layer 151 and a via hole 143 are formed on the wiring layer 133. The polyimide adhesive layer 151 and the via hole 143 are formed by the following steps.

In the first step, a polyimide varnish having a glass transition point is applied on the wiring layer 133. That is, the polyimide adhesive layer 151 and the polyimide insulating layer 1
The properties of the polyimide used are different from 21 to 123.

In the second step, the applied polyimide varnish is exposed and developed to form a via hole 143.

As a third step, the polyimide varnish in which the via hole 143 is formed is cured. As a result, the polyimide adhesive layer 151 and the via hole 143 are formed.
Is formed. The thickness of the polyimide adhesive layer 151 is 10μ
m. [Step 6] Referring to FIG. 2C, bumps 161 are formed in step 6. The bump 161 connects the second block and the first block, which will be created in the process described later. The bump 161 is connected to the wiring layer 133 via the via hole 143.

The bumps 161 are patterned by a photolithography technique using a photoresist,
It is formed by performing electrolytic gold plating on this pattern. The thickness of the gold plating is 10 μm.

The steps 1 to 6 form the first block 100. In step 4 of this embodiment, as an example, two wiring layers are laminated. In the actual process, the number of wiring layers formed in step 4 is determined according to the total number of wiring layers to be included in the first block 100. [Second Block] FIGS. 3A to 3C and FIG.
Referring to (a) to (c), step 7 to step 1
3, the second block 200 is the ceramic substrate 2
11 is formed. Steps 1-6 and Steps 7-1
There is no restriction on the temporal order in which 3 and 3 are executed. That is, steps 7 to 13 may be executed before steps 1 to 6. [Step 7] Referring to FIG. 3A, in step 7, the wiring layer 231 is formed on the ceramic substrate 211.

The ceramic substrate 211 has pins 212 on the surface opposite to the surface on which the wiring layer 231 is formed. The pins 212 are used as input / output signal pins and power supply pins after the completion of the polyimide multilayer wiring board.

The wiring layer 231 is formed by the same method as in step 2. The wiring layer 231 is used not only as a connection wiring but also as a ground wiring. [Step 8] Referring to FIG. 3B, in step 8, the polyimide insulating layer 221 is formed on the wiring layer 231. Via holes 241 are formed in the polyimide insulating layer 221. The polyimide insulating layer 221 and the via hole 241 are formed by the same method as in step 3. [Step 9] Referring to FIG. 3C, in step 9, on the polyimide insulating layer 221, the wiring layer 232,
The polyimide insulating layer 222 and the wiring layer 233 are formed. These layers are formed in the same way as in step 4. [Step 10] Referring to FIG. 4A, step 1
At 0, a polyimide insulating layer 223 is formed on the polyimide insulating layer 222. Via holes 243 are formed in the polyimide insulating layer 223. The polyimide insulating layer 223 and the via hole 243 are formed by the same method as in step 3. [Step 11] Referring to FIG. 4B, step 1
1, the wiring layer 234 is formed on the polyimide insulating layer 223.
Is formed. The wiring layer 234 is formed by the same method as in step 2. [Step 12] Referring to FIG. 4C, step 1
2, the polyimide adhesive layer 251 is formed on the wiring layer 234.
Is formed. Step 5 of the polyimide adhesive layer 251
Is formed in the same way as. The thickness of the polyimide adhesive layer 251 is the same as in step 5.

The second block 200 is formed by the steps 6 to 12. Step 9 of this embodiment
In No. 11, as an example, three wiring layers were laminated. In the actual process, the number of wiring layers formed in steps 9 to 11 is determined according to the total number of wiring layers to be included in the second block 200. [Connection between First Block 100 and Second Block 200] Referring to FIGS. 5 to 8, in steps 13 to 20, the first block 100 and the second block 200 are connected. [Step 13] Referring to FIG. 5, in step 13, the first block 100 is placed on the second block 200.
Is temporarily bonded. Specifically, the polyimide adhesive layer 151
And the polyimide adhesive layer 251 are temporarily bonded. That is,
The first block 100 is temporarily attached to the second block 200 in an upside down state. The temporary adhesion of the first block 100 is performed in the following steps.

As a first step, the second block 200 is used.
An adhesive layer 1271 is provided on the uppermost layer. Adhesive layer 12
71 is provided by applying an adhesive. Also,
An adhesive sheet may be used as the adhesive layer 1271.

Examples of the material of the adhesive layer 1271 include a melt-curable maleimide resin and a melt-type fluorine-based film. Further, as an example of the melt-type fluorine-based film, PAF which is a copolymer of fluorinated ethylene and perfluoroalkyl perfluorovinyl ether can be mentioned.

Although the adhesive layer 1271 is provided on the uppermost layer of the second block 200 in this embodiment, the adhesive layer 1271 may be provided on the uppermost layer of the first block 100. In addition, the first block 100 and the second block 200
May be provided in both.

As the second step, the first block 100 is used.
Is positioned. That is, the first block 10
The first block 100 is positioned so that the zero bump 161 is inserted into a predetermined via hole 244 of the second block 200.

As the third step, the first block 100 is used.
Are placed on the second block 200. [Step 14] Referring to FIG. 6A, step 1
4, the quartz glass substrate 111 is irradiated with ultraviolet rays by the excimer laser 1. This step is a characteristic part of the present invention.

Since the quartz glass substrate 111 is transparent,
The ultraviolet rays emitted by the excimer laser 1 pass through the quartz glass substrate 111 and reach the polyimide insulating layer 121.
In the polyimide insulating layer 121 located at the interface with the quartz glass substrate 111, a photochemical reaction occurs in a portion irradiated with ultraviolet rays. Due to this photochemical reaction, the quartz glass substrate 111 and the polyimide insulating layer 121 are separated.

When KrF is used as the laser gas,
The excimer laser 1 having a frequency of 50 Hz and an energy density of 0.8 J / square centimeter can remove the polyimide insulating layer 121 having a thickness of about 1 μm.

As the excimer laser, for example, an industrial excimer laser INDEX manufactured by Sumitomo Heavy Industries, Ltd.
200 series can be used. Also, regarding the photochemical reaction between the irradiation light of the excimer laser 1 and the polyimide insulating layer 121, “Material Science” No. 2 published by the Japan Society for Materials Science
Volume 6, Issue 3 (July 1989), pp. 115-121.

In this step, since the quartz glass substrate 111 is peeled off by the excimer laser 1, the first block 100 is not deteriorated. Also in this step,
Since the exfoliation is performed by the photochemical reaction, the first block 100 is not overheated. Therefore, the thermal stress does not cause the first block 100 to fail. [Step 15] Referring to FIG. 6B, step 1
At 5, the excimer laser 1 is moved. That is, the excimer laser 1 is moved so as to scan the entire surface of the quartz glass substrate 111 in order to peel off all the bonding surfaces of the quartz glass substrate 111 and the polyimide insulating layer 121. [Step 16] Referring to FIG. 7A, step 1
At 6, the quartz glass substrate 111 is removed from the polyimide insulating layer 121.

The coefficient of thermal expansion differs between the polyimide layer forming the first block 100 and the quartz glass substrate 111 by about one digit. Therefore, if the quartz glass substrate 111 is heated while remaining, the first block 100 may be damaged by thermal stress. However, in this embodiment, the quartz glass substrate 111 is removed in this step. Therefore, in the heating / pressurizing step of the next step, the first block 100 does not have a failure due to thermal stress. [Step 17] Referring to FIG.
In step 17, the first block 100 and the second block 200 are connected by heating and pressurizing.

Each block is heated to a temperature equal to or higher than the glass transition point of the polyimide adhesive layers 151 and 251. By this heating, the polyimide adhesive layer 151 and the polyimide adhesive layer 251 adhere to each other.

In this step, the bump 161 is also used.
Melts and connects to the wiring layer 234. That is, the first block 100 and the second block 200 are electrically connected.

Further in this step, step 1
The adhesive layer 1271 provided in No. 3 burns and disappears.

The specific heating / pressurizing method is as follows. The heating / pressurizing step is executed by an auto-preg type vacuum press device. Nitrogen gas is used as the pressurized gas. Heating temperature, pressurizing pressure and heating / pressurizing time are 3 respectively.
50 ° C., 20 kg / square centimeter, and 60 seconds. In this heating / pressurizing step, the substrate is placed on the platen. The placed substrate is sealed with a polyimide film and the inside is evacuated. Thereby, pressing can be performed uniformly. The sealing with the polyimide film is performed by applying an adhesive member around the platen and adhering the periphery of the polyimide film to the adhesive member. [Step 18] Referring to FIG. 7C, step 1
8, the via hole 1 is formed in the polyimide insulating layer 121.
241 is formed. The via hole 1241 is formed by a dry etching process. [Step 19] Referring to FIG. 8A, step 1
9, the bump 126 is formed on the polyimide insulating layer 121.
1 is formed. The bump 1261 is in the via hole 12.
It is connected to the wiring layer 131 via 41. Bump 126
1 is formed in the same way as step 6. [Step 20] Referring to FIG. 8B, step 2
At 0, a polyimide adhesive layer 1251 is formed on the polyimide insulating layer 121. Polyimide adhesive layer 1251
A via hole 1242 is formed in this. The polyimide adhesive layer 1251 and the via hole 1241 are formed by the same method as in step 5.

By steps 13 to 20, the first block 100 and the second block 200 are connected to each other to form the block laminated body 1200. [Step 21] Referring to FIG. 9, in step 21, the third block 30 is formed on the block laminate 1200.
0 is connected. The third block 300 is formed in the same manner as the first block 100. Block stack 1
200 and the third block 300 are steps 13-2.
Connected in the same way as 0. In addition, the third block 30
The quartz glass substrate 311 adhered to
It is removed from the third block 300 in the same manner as 4-16. Steps 13 to 20 are repeated until all the predetermined blocks are stacked. [Other Substantive Embodiments] The present invention can be carried out in various modifications other than the above-described embodiments.

First, although gold is used as the wiring material in the above embodiments, a low resistance metal such as copper can be used.

Secondly, although the ceramic substrate 211 is used as the base material of the second block 200 in the above-described embodiment, a hard organic resin substrate may be used instead of the ceramic substrate 211.

As an example of the hard organic resin substrate, a molded substrate of polyimide resin can be cited. In the case of a polyimide resin molded substrate, the pin 212 is attached by driving the pin 212 into a through hole formed in the substrate.

When the polyimide resin molded substrate is used as the base material of the second block 200, the thermal expansion coefficient of the second block 200 laminated thereon can be matched with the thermal expansion coefficient of the base material. . By making the coefficients of thermal expansion equal, damage due to thermal stress is prevented. For this reason,
It is suitable for manufacturing a large-area and high-lamination wiring board where thermal stress is a particular problem.

Thirdly, in the present embodiment, the peeling process using the excimer laser is applied to the case where the polyimide multilayer wiring board is divided into blocks to be manufactured, but the scope of application of the present invention is not limited to this. Absent. That is, the present invention can be applied to all techniques that require peeling between the polyimide insulating layer and the base material.

[0048]

As described above, according to the present invention, the photochemical reaction between the excimer laser and the polyimide insulating layer is utilized to separate the block on which the polyimide multilayer wiring board is formed and the base material thereof. Therefore, the polyimide multilayer wiring board does not deteriorate in the peeling process. In addition, the trouble of the polyimide multilayer wiring board that occurs in the peeling process can be reduced. That is, according to the present invention, the reliability of the polyimide multilayer wiring board can be improved.

[Brief description of drawings]

FIG. 1 is a diagram showing a method of manufacturing a first block in the order of steps, according to an embodiment of the present invention.

FIG. 2 is a diagram showing a method of manufacturing a first block in the order of steps, according to an embodiment of the present invention.

FIG. 3 is a diagram showing a method of manufacturing a second block in the order of steps, according to an embodiment of the present invention.

FIG. 4 is a diagram showing a method of manufacturing a second block in the order of steps, according to an embodiment of the present invention.

FIG. 5 is a view showing a method of connecting the first block and the second block in the order of steps in the embodiment of the present invention.

FIG. 6 is a view showing a method of separating the first block and its base material in the order of steps in one embodiment of the present invention.

FIG. 7 is a diagram showing, in the order of steps, a method of connecting the first block and the second block in the embodiment of the present invention.

FIG. 8 is a diagram showing, in the order of steps, a method of connecting the first block and the second block in the embodiment of the present invention.

FIG. 9 is a diagram showing, in the order of steps, a method of connecting the block laminate and the third block in the embodiment of the present invention.

[Explanation of symbols]

 1 Excimer Laser 100 First Block 111 Quartz Glass Substrate 121 Polyimide Insulating Layer 122 Polyimide Insulating Layer 123 Polyimide Insulating Layer 131 Wiring Layer 132 Wiring Layer 133 Wiring Layer 141 Via Hole 143 Via Hole 151 Polyimide Adhesive Layer 161 Bump 200 Second Block 211 ceramic substrate 212 pin 221 polyimide insulating layer 222 polyimide insulating layer 223 polyimide insulating layer 231 wiring layer 232 wiring layer 233 wiring layer 234 wiring layer 241 via hole 243 via hole 244 via hole 251 polyimide adhesive layer 300 third block 311 quartz glass Substrate 1200 Block laminated body 1241 Via hole 1242 Via hole 1251 Polyimide adhesive layer 1261 Bump 1271 Adhesion

Claims (12)

[Claims] 1. A first step of providing a polyimide layer on a substrate that transmits ultraviolet rays, and irradiating the surface of the substrate opposite to the surface on which the polyimide layer is formed with ultraviolet rays to the substrate and the polyimide layer. And a second step of peeling off the polyimide multilayer wiring board. 2. The method for manufacturing a polyimide multilayer wiring board according to claim 1, wherein the board contains quartz glass. 3. The method of manufacturing a polyimide multilayer wiring board according to claim 1, wherein the polyimide layer contains a photosensitive polyimide. 4. The method of manufacturing a polyimide multilayer wiring board according to claim 1, wherein in the second step, the ultraviolet rays are irradiated by an excimer laser. 5. A first step of providing a first polyimide layer on a first substrate which transmits ultraviolet rays, and a second step of laminating a wiring layer and a polyimide layer on the first polyimide layer. The first block is manufactured by the third step of providing the first polyimide adhesive layer on the polyimide insulating layer and the wiring layer formed in the second step, and the polyimide insulating layer is formed on the second substrate. And a wiring layer are alternately laminated, and a fourth step is performed, and a fifth step is performed in which a second polyimide adhesive layer is provided on the polyimide insulating layer and the wiring layer formed in the fourth step. A sixth step of manufacturing a block and temporarily adhering the first polyimide adhesive layer and the second polyimide adhesive layer, and a surface opposite to the surface of the first substrate on which the first polyimide layer is provided. A seventh step of irradiating the surface with ultraviolet rays to separate the first substrate from the first polyimide layer; and heating and pressurizing the first block and the second block. And a second step of adhering the second polyimide adhesive layer to each other and connecting the first block and the second block to each other. . 6. A bump is formed on a surface of at least one of the first block and the second block, and in the eighth step, wiring of at least one of the first block and the second block is formed. The method for manufacturing a polyimide multilayer wiring board according to claim 5, wherein a layer is connected to the bump. 7. The method for manufacturing a polyimide multilayer wiring board according to claim 5, wherein the first substrate contains quartz glass. 8. The method of manufacturing a polyimide multilayer wiring board according to claim 5, wherein the second board is a ceramic board. 9. The method for manufacturing a polyimide multilayer wiring board according to claim 5, wherein the second substrate contains a polyimide resin. 10. The method of manufacturing a polyimide multilayer wiring board according to claim 5, wherein the first polyimide layer contains a photosensitive polyimide. 11. The first step in the sixth step
6. The polyimide adhesive layer of 1 and the second polyimide adhesive layer are temporarily adhered via the adhesive layer.
A method for producing the polyimide multilayer wiring board described. 12. The method for manufacturing a polyimide multilayer wiring board according to claim 7, wherein the ultraviolet rays are irradiated by an excimer laser.