JPH0560115B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an image display device that displays both binary data and multivalued data.

2. Description of the Related Art Conventionally, an image display device as shown in FIG. 6 has been used to display a mixture of multivalued data 22 and binary data 23 on one screen as shown in FIG. This has separate display memories 24 and 26 for multi-value data and binary data, respectively.
When displaying, multivalued data is converted into analog by the D/A converter 25, binary data is converted to an appropriate brightness level by the brightness level converter 27, and after these two processes, the sum of both analog values is converted. Adder 28
It is output to the output terminal 29 as a video signal.

Problems to be Solved by the Invention In such a conventional configuration, two
Separate display memories are required for each value data, and the sum with binary data must be calculated after multi-value data is converted into analog data, so the circuit configuration is complicated.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image display device that can simultaneously display multi-value data and binary data with a simple configuration.

Means for Solving the Problems The image display device of the present invention includes a data display memory that stores binary data and multivalued data, and a data display memory that stores binary data and multivalued data.
A binary data display position address storage circuit that stores the position where value data is displayed on the screen, and an address that the display is sequentially scanning and an address read from the binary data display position address storage circuit. Binary/multi-value data identification signal generating means for comparing and detecting the timing of displaying the binary data;
a data conversion means for synthesizing pseudo multi-value data from the binary data read from the data display memory; and one of the data output from the data conversion means and the multi-value data read from the data display memory. The present invention is characterized by further comprising a switching means for outputting display data based on the result of the binary/multi-valued data identification signal generating means.

Function With this configuration, when displaying binary data and multivalued data, the data to be displayed is identified and the data is selected by the switching means. It can be displayed on one screen.

Embodiment Hereinafter, an embodiment of the present invention will be described based on FIGS. 1 to 4. FIG. 1 shows an image display device of the present invention. In Fig. 1, 1 is a data display memory that stores binary data and multi-value data to be displayed;
is the data bus coming from data display memory 1,
The number of lines is equal to the number of gradation bits of the multivalued data to be displayed, and in this embodiment, if one image has 8-bit gradation, the data bus has eight data lines. 3 is one data line that has the value of binary data of the data bus 2 coming from the data display memory 1, and in this example, the most significant bit (hereinafter referred to as MSB)
Binary data is being sent out. 4 is a binary data/multi-value data conversion circuit for making the data line 3 equal to the number of data buses that multi-value data has; 5 is a binary data/multi-value data conversion circuit after passing through the binary data/multi-value data conversion circuit 4; A data bus, 6 is a multiplexer that switches between binary data bus 5 and data bus 2, and 7 is a D/A that converts digital data on the data bus output from multiplexer 6 into analog.
Converter; 8 is a display for displaying analog-converted data; 9 is a binary/multi-value data identification signal that specifies the switching state of the multiplexer 6;
10 is an identification signal generator that generates a binary/multi-value data identification signal 9; 11 is a storage circuit in which a binary data display position address is written; 12 is a display control circuit that controls the display 8; and 13 is a display control circuit. The display position address 14 of the scanning screen sent out from the circuit 12 is 2 sent out from the storage circuit 11.
This is the value data display position address.

Next, the configuration shown in FIG. 1 will be explained in detail based on its operation.

First, binary data and multivalued data to be displayed on the display 8 are written into the data display memory 1. When writing binary data at this time, the display position address at which the binary data should be displayed is written in the memory circuit 1 at the same time. Furthermore, binary data is written to the data display memory 1 in such a way that it is output to one data line of the eight data buses in this embodiment, which is the MSB data line 3 in this embodiment. . Therefore, in the present invention, when data is written into the data display memory 1, the data is managed so that it can be determined whether the data to be written is binary or multi-valued. The data written in the data display memory 1 in this manner is sequentially sent to the data bus 2. Of this data bus 2, the MSB data line 3 through which the value of binary data is transmitted when the binary data is sent out is 2.
The data enters the value data/multi-value data conversion circuit 4. Two possible circuits for this are shown in FIG. 2 and FIG. 3.

In Figure 2, the data line 3 is wired ORed into 7 lines to form a binary data bus 5 with a total of 8 data lines, the same as the multi-level data, and the binary data becomes pseudo-multilevel data. has been converted.

FIG. 3 takes into consideration measures against flicker that occurs when displaying binary data such as characters. 1
Reference numeral 5 denotes a switching circuit which connects the data line 3 to at least one of the eight output lines and sets the other outputs to the "L" level to convert binary data into pseudo multi-value data. Reference numeral 16 denotes a control signal which specifies which of the eight output lines the switching circuit 15 connects the data line 3 to, and is output from the CPU 17.

The differences between Figure 3 and Figure 2 are as follows. In Fig. 2, wired OR was used, so the value when converting to multi-value data was fixed, but in Fig. 3, the data line 3 having binary data was connected to the switching circuit 15.
Since it controls whether to connect to the eight data lines of the binary data bus 5, the brightness level when displaying binary data as multi-value data can be controlled. Generally, as a display 8
The relationship between screen brightness and flicker phenomenon when displaying using a CRT is shown in Figure 4. In this figure, the horizontal axis shows the brightness level on the screen, and the vertical axis shows the critical frequency of flicker. At this critical frequency, we perceive a flicker in response to a stimulus of periodic flashing light, but as we gradually increase the frequency of the flashing, we eventually stop sensing flicker and it becomes indistinguishable from uniform light. The frequency at this critical point is shown. Further, t in the figure is the afterglow time of the phosphor of the display, and indicates the afterglow time until the brightness drops to 5%. A typical CRT display uses an image rate of 50Hz or 60Hz per second. As can be seen from this figure, there is a proportional relationship between the brightness on the screen and the critical frequency of flicker, and it can be seen that flicker can be suppressed by changing the value of brightness.

Therefore, in this embodiment, when flicker occurs due to the display state of the binary data displayed on the display, the CPU 17 controls the switching circuit 15 to lower the brightness level of the two data to eliminate the flicker. can be suppressed.

In the binary data/multi-value data conversion circuit 4 as described above, the binary data is pseudo-converted into multi-value data and has eight data lines.The binary data bus 5 is connected to one side of the multiplexer 6. connected to the input. The data bus 2 is also connected to the other input of the multiplexer 6.

On the other hand, the binary data display position address stored in the storage circuit 11 is sent to the identification signal generator 10 during display operation. Further, the display position address 13 of the scanning screen sent from the display control circuit 12 is also sent to the identification signal generator 10. The identification signal generator 10 compares the two address values and when they match, generates a binary/multi-value data identification signal 9 and sends it to the multiplexer 6. Multiplexer 6 selects either binary data bus 5 or data bus 2. The signal selected by the multiplexer 6 in this manner is sent to the D/A converter 7, where it is converted into an analog signal and displayed on the display 8 as a video signal.

Effects of the Invention As described above, according to the image display device of the present invention, there is provided a data display memory that stores binary data and multivalued data, and a memory that stores the position where the binary data is displayed on the screen. A value data display position address storage circuit compares the address that the display display is sequentially scanning with the address read from the binary display position address storage circuit to detect the timing of binary data display. a value/multivalue data identification signal generation means; a data conversion means for synthesizing pseudo multivalue data from the binary data read from the data display memory; Since a switching means is provided for outputting one of the read multi-value data as display data based on the result of the binary/multi-value data identification signal generating means, the binary data can be output with a simple circuit configuration.・Can display multivalued data simultaneously.

Further, when the data conversion means is constituted by an instruction means for externally instructing a switching circuit for connecting the binary data read data line of the data display memory to any one of the plurality of output data lines. The flicker phenomenon that occurs when displaying binary data such as characters can also be suppressed.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the image display device of the present invention, and FIGS. 2 and 3 are first and second specific configuration diagrams of the binary data/multivalue data conversion circuit in FIG. 1, respectively. , FIG. 4 is an explanatory diagram of the relationship between flicker and screen brightness, FIG. 5 is an explanatory diagram of a display screen in which binary data and multi-value data are mixed, and FIG. 6 is a block diagram of a conventional image display device. 1... Memory for data display, 4... Binary data/multi-value data conversion circuit, 6... Multiplexer, 10... Identification signal generator, 11... Binary data display position address storage circuit, 12... Display control circuit.

Claims (1)

[Scope of Claims] 1. A data display memory that stores binary data and multi-value data, a binary data display position address storage circuit that stores a position where the binary data is displayed on a screen, and a display memory that stores binary data and multi-value data. binary/multi-value data identification signal generating means for detecting the timing of binary data display by comparing the address at which the display is sequentially scanned with the address read from the binary display position address storage circuit; a data conversion means for synthesizing pseudo multi-value data from the binary data read from the data display memory; and one of the data output from the data conversion means and the multi-value data read from the data display memory. An image display device comprising: switching means for outputting display data based on the result of the binary/multivalued data identification signal generating means. 2 The data conversion means is connected to 2 of the data display memory.
Claim 1, characterized in that the device comprises a switching circuit for connecting a value data read data line to one of a plurality of output data lines, and an instruction means for instructing this switching circuit from the outside. image display device.