JPH05191817A - Automatic convergence correction circuit for projective tv receiver - Google Patents

Abstract

PURPOSE:To insert a pattern signal for detecting convergence deviation into a video signal also when the video signal having no overscan area such as a computer signal, etc., is received. CONSTITUTION:As for a horizontal synchronizing signal b having 600 horizontal periods per vertical period, the frequency is increased by 15% by a frequency conversion circuit 22, and the signal is converted into a horizontal synchronizing signal(d)having 690 horizontal periods per vertical period and is supplied to a control circuit 14. A video signal temporary storage circuit 12 synchronizes stored video signals aR, aG, aB with a horizontal synchronizing signal (d) after 47H for the overscan area of the horizontal synchronizing signal (d) for which a frequency conversion is performed from the timing of the termination of the pulse period of a vertical synchronizing signal (c) from an input terminal 21 passes and reads them every horizontal period. RGB video output circuits 13, 14, 15 insert pattern signals hR, hG, hB for detecting convergence deviation in the overscan areas of video signals fR, fG, fB, respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic convergence correction circuit for a projection television receiver which performs automatic convergence correction, and particularly to automatic convergence correction even when receiving a video signal having no overscan area such as a computer signal. The present invention relates to an automatic convergence correction circuit for a projection television receiver capable of performing the following.

[0002]

2. Description of the Related Art Recently, in television receivers,
In addition to watching TV broadcasts, VTRs, video disc players, video games, and even personal computers, character multiplex decoders, and other various models are now required to be connected, which is the answer. As one of them, a projection type television receiver using an RGB three primary color projection tube type projector has been developed.

In a projection television receiver using an RGB three-primary-color projection tube type projector, static and dynamic convergence adjustments are made when a television broadcast is received, but even if these adjustments are completely made, it will take a long time. In use, misconvergence occurs due to drift of optical system components due to temperature, or drift of the projection tube and its peripherals, circuits, and the like. Conventionally, this misconvergence is almost corrected to a level at which there is no practical problem by performing readjustment of static convergence by an automatic convergence correction circuit, that is, performing automatic convergence.

FIG. 6 is a waveform diagram showing an NTSC decoded video signal received by a projection type television receiver using such a conventional RGB three primary color projection tube type projector.

In FIG. 6, a projection television receiver for receiving an NTSC video signal normally cuts about 5% before and after the video signal period in one vertical period, that is, a total of 10% is cut.
This cut period is referred to as an overscan period.
In the RGB three-primary-color projection tube system projector, a convergence deviation detection pattern signal for static convergence is inserted in the front overscan period.

FIG. 7 is an explanatory view for explaining a method of detecting a convergence deviation detecting pattern signal in the projection type television receiver of FIG.

As shown in FIG. 7, reference numeral 91 is a scanning area of the image projected by the projector on the back side of the screen, and this scanning area 91 is provided with an overscan area 93 outside the effective screen area 92. There is. Vertical line and horizontal line images 94 and 95 based on the convergence deviation detection pattern signal are inserted in the overscan area 93. Further, when the overscan area 93 is projected, vertical lines and horizontal lines of images 94, 9 are displayed on the frame portion of the screen.
Optical sensors (for example, phototransistors) 96 and 97 for detecting 5 are arranged. The optical sensors 96 and 97 are
By detecting the shift between the vertical lines and the horizontal lines of the images 94 and 95, the vertical and horizontal convergence drifts are detected. In the projection television receiver, when the occurrence of misconvergence due to the convergence drift is detected by the optical sensors 96 and 97, it is fed back to the automatic convergence correction circuit to stabilize the convergence.

However, in such a projection type television receiver, when receiving a computer signal such as a signal from a microcomputer having an increased resolution (for example, 640 dots × 410 lines) or a high density captain decoder. Requires the entire video signal period,
There is no overscan area in which the pattern signal for detecting the convergence deviation is inserted. Here, it is considered that the convergence deviation detection pattern signal is inserted in the front porch period or the back porch period of the vertical synchronizing signal, or the front porch period or the back porch period of the horizontal synchronizing signal, but the period is generally very short. There are only a few, and it is practically very difficult to insert the pattern signal for detecting the convergence deviation.

[0009]

As described above, in the projection television receiver, when a video signal having no overscan area such as a computer signal is received, a convergence deviation detection pattern signal can be inserted. However, there is an inconvenience that automatic convergence cannot be performed.

Therefore, the present invention eliminates the above problems,
An object of the present invention is to provide a convergence correction circuit for a projection television receiver that can insert a convergence deviation detection pattern signal into a video signal even when receiving a video signal having no overscan area.

[0011]

SUMMARY OF THE INVENTION An automatic convergence correction circuit of a projection television receiver according to the present invention provides a convergence deviation detecting pattern signal displayed in an overscan area of a screen projected on a projection screen by a projection tube. To change at least one of the horizontal scanning frequency and the vertical scanning frequency of the video signal received by the projection television receiver in an automatic convergence correction circuit of the projection television receiver that performs automatic convergence correction by detecting. And an overscan area generating means for generating the overscan area on the screen, and a convergence deviation detecting pattern signal inserting means for inserting a convergence deviation detecting pattern signal into the overscan area generated by the overscan area generating means. Characterized by comprising a.

[0012]

According to this structure, even when the projection television receiver receives a video signal having no overscan area, at least one of the horizontal scanning frequency and the vertical scanning frequency of the input video signal is changed. Then, the overscan area can be generated on the screen, and the convergence deviation detection pattern signal can be inserted into the overscan area by the convergence deviation detection pattern signal inserting means.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a convergence correction circuit of a projection television receiver according to the present invention.

In FIG. 1, reference numerals 11, 21, and 31 denote
Video signals aR of three RGB colors in a computer signal,
The input terminals aG, aB, the horizontal synchronizing signal b synchronized with the video signals aR, aG, aB and the vertical synchronizing signal c synchronized with the video signals aR, aG, aB are introduced.

The horizontal synchronizing signal b from the input terminal 21 is supplied to the frequency conversion circuit 22 and the control circuit 41. The frequency conversion circuit 22 converts the supplied horizontal synchronization signal b into a horizontal synchronization signal d whose frequency is increased by 15% to control the control circuit 41, a phase lock loop circuit (hereinafter referred to as a PLL circuit) 42, and a horizontal screen phase adjustment circuit. 23
Supply to.

The vertical synchronizing signal c from the input terminal 31 is supplied to the vertical screen position adjusting circuit 33 and the control circuit 4
1 is supplied.

The control circuit 41 uses the horizontal synchronizing signal b from the input terminal 21, the vertical synchronizing signal c from the input terminal 31, and the frequency-converted horizontal synchronizing signal d from the frequency converting circuit 22 to temporarily store the video signal. Video signal temporary storage circuit 1 by creating control data e for writing and reading
It supplies to 2.

On the other hand, the RGB three-color video signals aR, aG and aB from the input terminal 11 are supplied to the video signal temporary storage circuit 12. Video signal temporary storage circuit 1
2 is controlled by the control data e from the control circuit 41 to divide the video signals aR, aG, and aB for each horizontal period in the horizontal synchronizing signal b from the input terminal 21, and the vertical synchronizing signal c from the input terminal 31. In addition to temporarily storing one vertical period of time, the stored video signals aR, aG, a
B is a horizontal period synchronized with the horizontal synchronization signal d after the horizontal period of the overscan area of the horizontal synchronization signal d from the frequency conversion circuit 22 has passed from the timing of the end of the pulse period of the vertical synchronization signal c from the input terminal 21. Read each time. In this case, the video signal temporary storage circuit 12 changes the read clock frequency (not shown) so that the video signals aR, a
G and aB are temporally compressed at the same ratio as the period compression rate of the horizontal synchronizing signal of the frequency conversion circuit 22 to obtain video signals fR and fG.
, FB. Video signal temporary storage circuit 1
The video signals fR, fG, and fB from 2 are supplied to one input terminals of the RGB video output circuits 13, 14, and 15, respectively. The PLL circuit 42 creates a clock pulse g of n × fH (fH is the frequency of the external horizontal synchronization signal, n is a natural number) from the horizontal synchronization signal d from the frequency conversion circuit 22, and the convergence deviation detection pattern generation circuit 43. Supply to. The convergence deviation detection pattern generation circuit 43 creates the convergence deviation detection patterns hR, hG, hB of RGB three colors at predetermined scanning line positions from the horizontal synchronizing signal d and the clock pulse g of n × fH. It is supplied to the other input terminals of the RGB video output circuits 13, 14, 15. In this case, the convergence deviation detection pattern generation circuit 43 detects the detection patterns hR and hG.
, HB are supplied one by one for each frame, and only one of the detection patterns hR, hG, hB is supplied in one frame.

RGB video output circuit 13, 14, 15
Are the convergence deviation detection patterns h in the overscan areas of the video signals fR, fG, and fB, respectively.
Insert R, hG, and hB to insert projection tubes 16 and 1 respectively.
It is supplied to cathodes 7 and 18. Projection tube 16,1
Reference numerals 7 and 18 project red, green, and blue projection lights, respectively, and each of the projection tubes 16, 17, and 18 has a horizontal deflection coil 51, a vertical deflection coil 52, a horizontal convergence coil 53, and a vertical convergence coil. 54 is provided.

On the other hand, the horizontal synchronizing signal d from the frequency converting circuit 22 is converted by the horizontal screen phase adjusting circuit 23 into a horizontal synchronizing pulse i whose screen phase shift amount is adjusted and supplied to the horizontal oscillation / AFC circuit 24. .. Horizontal oscillation / AF
The C (automatic frequency control) circuit 24 creates a horizontal oscillation pulse j based on the AFC pulse from the horizontal output circuit 25 at the subsequent stage and supplies it to the horizontal output circuit 25. Horizontal output circuit 2
5 produces an AFC pulse from the horizontal oscillation pulse j and supplies it to the horizontal oscillation / AFC circuit 24, and also produces a horizontal deflection pulse k and supplies it to the horizontal deflection coils 51 of the projection tubes 16, 17, and 18. The horizontal screen position adjusting circuit 23
In this case, the phase shift amount of the screen can be adjusted by the externally attached capacitor C1 and variable resistor R1.

On the other hand, the vertical synchronizing signal c supplied to the input terminal 31 is converted into a vertical synchronizing pulse 1 by the vertical screen phase adjusting circuit 33. The vertical synchronization pulse l is converted into a vertical oscillation pulse m by the vertical oscillation / AFC circuit 34 and supplied to the vertical output circuit 35. The vertical output circuit 35 is
An AFC pulse is generated from the vertical oscillation pulse m and supplied to the vertical oscillation / AFC circuit 34, and a vertical deflection pulse n is generated and supplied to the vertical deflection coils 52 of the projection tubes 16, 17, and 18. The vertical screen position adjusting circuit 33 can adjust the phase shift amount of the screen by the externally attached capacitor C2 and variable resistor R2.

Next, the automatic convergence system will be described.

The projection light from the projection tubes 16, 17, 18 projects an image of the scanning area 61 on the back side of the screen. In this scanning area 61, an overscan area 63 formed by the video signal temporary storage circuit 12 is projected outside the effective screen area 62. Overscan area 6
3 is a convergence deviation detection pattern generation circuit 4
3 for detecting RGB three-color pattern signals hR, hG,
Vertical line and horizontal line images 64 and 65 by hB are inserted while sequentially switching. Overscan area 6
In the frame portion of the screen where 3 is projected, optical sensors 66 and 6 for detecting vertical and horizontal images 64 and 65, respectively.
7 are arranged. The optical sensors 66 and 67 detect vertical and horizontal convergence drifts by detecting the deviations of the vertical and horizontal video images 64 and 65, respectively, and detect the vertical and horizontal convergence drift detection signals o of the detection results. , P are supplied to vertical and horizontal convergence drift correction current generation circuits 7 and 8, respectively.

The horizontal convergence drift correction current generating circuit 7 projects the correction currents qR, qG, and qB for the deviation of the convergence when the convergence drift detection signal o from the optical sensor 66 changes due to horizontal convergence drift or the like. Flow through horizontal convergence coils 53 of tubes 16, 17, 18.

The vertical convergence drift correction current generating circuit 8 projects the correction currents rR, rG, and rB for the deviation of the convergence when the convergence drift detection signal p from the optical sensor 67 changes due to vertical convergence drift or the like. Flow through vertical convergence coils 54 in tubes 16, 17, 18.

FIG. 2 is a block diagram for explaining the horizontal convergence drift correction current generating circuit 7 of FIG. 1 in more detail.

In FIG. 2, the horizontal convergence drift correction amount generating circuit 71 detects the horizontal drift of the red, green and blue when the convergence drift detection signal o from the optical sensor 66 changes due to horizontal convergence drift or the like. Correction amounts for convergence deviations sR, sG, sB
Are sequentially generated in synchronization with the switching of the detection pattern signals hR, hG and hB, and are guided to the common terminal c of the switch 72. The switch 72 has first to third output terminals a1 and a1.
2 and a3 are connected in order, and the correction amounts sR, sG and sB from the common terminal are guided to the hold capacitors 731, 732 and 733, respectively. The hold capacitors 731, 732, 733 hold the red, green, and blue convergence drift correction amounts sR, sG, and sB. On the other hand, the horizontal convergence correction waveform generating circuit 74 generates a waveform of each color for correcting the convergence deviation of the horizontal static convergence and the dynamic convergence. The correction amount of the hold capacitors 731, 732, 733 is
Addition points 761, via amplifiers 751, 752, 753
At 762 and 763, the waveforms of the respective colors of the horizontal convergence correction waveform generating circuit 74 are added and supplied to the horizontal convergence output circuits 771, 772 and 773. The horizontal convergence output circuits 771, 772, 773 have correction currents qR, qG, q for red, green, and blue depending on the correction amount of each color.
B is supplied to the horizontal convergence coil 53 of the projection tubes 16, 17, and 18.

FIG. 3 is a block diagram for explaining the vertical convergence drift correction current generating circuit 8 of FIG. 1 in more detail.

In FIG. 3, the vertical convergence drift correction amount generation circuit 81 detects the vertical drift of red, green and blue when the convergence drift detection signal p from the optical sensor 67 changes due to vertical convergence drift or the like. Correction amounts tR, tG, tB for deviation of convergence
Are sequentially generated and are supplied to the hold capacitors 831, 832, 833 via the switch 82. on the other hand,
The vertical convergence correction waveform generation circuit 84 generates a waveform of each color for correcting the convergence deviation between the static convergence and the dynamic convergence in the vertical direction. The correction amount of the hold capacitors 831, 832, 833 is the
Addition points 861,862,8 via 1,852,853
At 63, the waveforms of the respective colors of the vertical convergence correction waveform generation circuit 84 are added, and the vertical convergence output circuit 8 is added.
71, 872, 873. The convergence output circuits 871, 872, 873 generate red, green, and blue correction currents rR, rG, and rB according to the correction amount of each color.
6, 17, 18 vertical convergence coils 54 are supplied.

The operation of this embodiment will be described below with reference to FIGS. 4 and 5.

4 and 5 are waveform charts for explaining the operation of the embodiment shown in FIG. 1. FIG. 4 shows the video signals aR, aG, aB supplied to the video signal temporary storage circuit 12, and FIG. The video signal fR output from the video signal temporary storage circuit 12,
fG and fB are shown.

When the horizontal scanning frequency FH of the input video signals aR, aG, and aB is 30 KHz and the vertical frequency Fv is 50 Hz, assuming that 1V is one vertical period and 1H is one horizontal period, the relation of the equation (1) is obtained. It holds.

When 1V = (1/50) / (1/30000) = 600H (1), as shown in FIG. 4, the front and back porch of the vertical synchronizing signal have 2H and the vertical synchronizing signal width respectively. 6H, and the video signal period is allocated to 590H.

On the other hand, the horizontal synchronizing signal b from the input terminal 21 for 600 horizontal periods per vertical period is supplied to the frequency conversion circuit 2
2 increases frequency by 15%, 6 per vertical period
The control circuit 4 converts the horizontal synchronizing signal d for 90 horizontal periods.
1, and is supplied to the PLL circuit 42 and the horizontal screen phase adjustment circuit 23. On the other hand, the vertical synchronizing signal c from the input terminal 31 is supplied to the vertical screen position adjusting circuit 33 and the control circuit 41 without frequency conversion. As a result, the projection tubes 16, 17, and 18 are driven by 690 horizontal scanning lines.

On the other hand, the video signal temporary storage circuit 12 is controlled by the control data e from the control circuit 41, and the video signals aR, aG and aB shown in FIG. The vertical synchronizing signal c from the input terminal 31 is temporarily stored for one vertical period, and the stored video signals aR, aG,
After 47 H of the horizontal sync signal d for the overscan area has elapsed from the timing of the end of the pulse period of the vertical sync signal c from the input terminal 31, aB is read every horizontal period in synchronization with the horizontal sync signal d. In this case, the video signals aR, aG,
aB is temporally compressed at the same ratio as the period compression rate of the horizontal synchronizing signal of the frequency conversion circuit 22 to obtain video signals fR, fG, f.
It is output as B. Since the frequency of the horizontal synchronization signal d is increased by 15% by the frequency conversion circuit 22,
In the above, the video signals fR, fG, and fB satisfy the relationship of Expression (2), where 1V is one vertical period and 1H is one horizontal period.

1V = (1/50) / (1/34500) = 690H (2) As shown in Expression (2), the video signals fR, fG, and fB are
The number of horizontal scanning lines increases by 90. As a result, 47 horizontal periods are secured in the front porch as an overscan area. Convergence deviation detection pattern generation circuit 4
3 is a convergence deviation of RGB three colors from the horizontal synchronizing signal d and a clock pulse of n × fH (fH is a frequency of the horizontal synchronizing signal d, n is a natural number) to a position corresponding to 47 on the front porch of the horizontal synchronizing signal d. Detection patterns hR, h
G and hB are created and are sequentially supplied to the RGB video output circuits 13, 14 and 15 for each frame. The RGB video output circuits 13, 14 and 15 have video signals fR and f, respectively.
Convergence deviation detection pattern signals hR, hG, and hB are inserted into the G and fB overscan areas, respectively, and are supplied to the cathodes of the projection tubes 16, 17, and 18, respectively. As a result, the projection tubes 16, 17, 18 are
In the overscan area 63, the image 6 of the vertical and horizontal lines formed by the pattern signals hR, hG, hB for detection of RGB three colors by the pattern generation circuit 43 for detection of convergence deviation.
4 and 65 are projected while switching sequentially. Optical sensor 6
Reference numerals 6 and 67 detect the deviations of the vertical and horizontal video images 64 and 65, respectively, and detect the horizontal and vertical direction convergence drift detection signals o and p as the detection results, respectively. It supplies to 8. As a result, the horizontal convergence drift correction current generation circuit 7 outputs the correction currents qR, qG, and qB for the deviation in convergence to the projection tubes 16, 17, and 18.
Of the vertical convergence coil 5 of the projection tubes 16, 17 and 18, and the vertical convergence drift correction current generating circuit 8 supplies the correction currents rR, rG and rB with respect to the vertical deviation of the convergence.
Flush to 4. This corrects the horizontal and vertical convergence deviation of the projected image.

Although not shown, in the case of receiving a video signal in which an overscan area is not provided, such as a video signal of a normal television broadcast signal, a switch switching means or the like is used to input the input terminal. The video signals aR, aG, and aB from 11 are supplied to one input terminals of the RGB video output circuits 13, 14, and 15 without passing through the video signal temporary storage circuit 12, and the horizontal synchronizing signal b is supplied to the frequency conversion circuit 22. It may be supplied to the PLL circuit 42 and the horizontal screen position adjusting circuit 23 without going through.

According to such an embodiment, when a computer signal having no overscan area for inserting the convergence deviation detection pattern signal is received, the number of horizontal scanning lines of the video signal is increased to reduce the overscan area. By providing a pattern signal for detecting convergence deviation in this overscan area, automatic convergence correction can be performed, and static convergence can be stabilized.

In the above embodiment, the case where the convergence deviation detection pattern signal is inserted in the front porch period has been described, but it is inserted in the back porch period and the two optical sensors 66 and 67 are displayed on the screen. The two optical sensors 66 and 67 may be disposed in the lower portion, or may be inserted in both the front and back porch periods and disposed in both the upper and lower portions.

Further, in the above embodiment, the input video signal a
By changing the horizontal scanning frequency of R, aG, and aB, the period of the front or back porch of the vertical synchronizing signal was increased. It is also possible to provide a scan area to display vertical line and horizontal line images by the detection pattern signal. In this case, for example,
15% of both horizontal scanning frequency and vertical frequency
When the number of scanning lines decreases, the number of scanning lines does not change, but one cycle of the horizontal period becomes 15% longer. By distributing this increased time to the front or back porch period of the horizontal synchronizing signal, the front or back porch period of the vertical synchronizing signal is increased. Then, by inserting the detection pattern signal in this period in the same manner as described above, the static convergence can be stabilized as in the embodiment of FIG.

[0042]

As described above in detail, according to the present invention, even when a video signal without an overscan area such as a computer signal is received, a convergence deviation detection pattern signal can be inserted, so that automatic convergence is achieved. Correction can be performed and the static convergence can be stabilized.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a convergence correction circuit of a projection television receiver according to the present invention.

FIG. 2 is a block diagram of a horizontal convergence drift correction current generation circuit of FIG.

FIG. 3 is a block diagram of the vertical convergence drift correction current generation circuit of FIG.

4 is a waveform diagram showing a video signal supplied to the video signal temporary storage circuit of FIG.

5 is a waveform diagram showing a video signal output from the video signal temporary storage circuit of FIG.

[Fig. 6] N received by a conventional projection television receiver.
The wave form diagram which shows a TSC decoding video signal.

7 is an explanatory diagram illustrating a method of detecting a convergence deviation detection pattern signal in the projection television receiver of FIG.

[Explanation of symbols]

 7 Horizontal convergence drift correction current generation circuit 8 Vertical convergence drift correction current generation circuit 12 Video signal temporary storage circuit 16, 17, 18 Projection tube 22 Frequency conversion circuit 42 PLL circuit 43 Convergence deviation detection pattern generation circuit 53 Horizontal convergence coil 54 Vertical Convergence coil 63 Overscan area 64,65 Video 66,67 Optical sensor

Claims (1)

[Claims] 1. An automatic convergence correction circuit for a projection television receiver for performing automatic convergence correction by detecting a convergence deviation detection pattern signal displayed in an overscan area of a screen projected on a projection screen by a projection tube. In the above, the overscan area generating means for generating the overscan area on the screen by changing at least one of the horizontal scanning frequency and the vertical scanning frequency of the video signal received by the projection television receiver, An automatic convergence correction circuit for a projection television receiver, comprising: convergence deviation detection pattern signal insertion means for inserting a convergence deviation detection pattern signal into the overscan area generated by the overscan area generation means. .