KR100218446B1 - Television/pc combined on screen processing circuit - Google Patents

Abstract

The present invention relates to a technique for displaying on-screen images of the same position and the same type in an image signal processor having different frequencies of horizontal scan lines. Conventionally, an internal circuit of a microcomputer for displaying on-screen information on a TV screen is provided. Since there is no proper means for displaying on-screen information on the PC screen without changing, there is a defect that cannot provide more information to the user at a lower price.

Accordingly, in order to solve this problem, the present invention provides a video image processing apparatus for displaying on-screen information on a TV screen. Select the oscillation signal of the crystal oscillator (X-TAL1) to supply the appropriate system clock signal (CLK) to the on-screen on the TV screen, or select the oscillation signal of the crystal oscillator (X-TAL2) to turn on the PC screen. A switch 302 for supplying an appropriate system clock signal CLK to the screen; A divider 316 for dividing the horizontal flyback pulse H_FBP1 into two portions so as to be suitable for the on-screen display of the PC screen; The switching control signal (TV / ), The switch includes a horizontal flyback pulse (H_FBP1) or a horizontal flyback pulse (H_FBP2) output from the divider (316) and outputs to the on-screen processing microcomputer (301) side. .

Description

TV receiver / PCS on screen processing circuit

1 is an on-screen processing block diagram of a typical television receiver.

2 is a general TV / PC on-screen processing block diagram.

3 is an exemplary view by a general TV / PC on-screen processing,

a shows an example of on-screen information display in the TV screen mode.

b is an example of on-screen information display in the PC screen mode.

4 is an exemplary block diagram of the television receiver / PCC on-screen processing circuit of the present invention.

5 is an exemplary view of on-screen information display according to the present invention,

a is an exemplary view by supplying a system clock signal of 8 MHz.

b is an exemplary diagram of a system clock signal of 8 MHz and divided horizontal flyback pulses.

* Explanation of symbols for main parts of the drawings

301: microcomputer 301A: on-screen memory

301B: On Screen Signal Transmitter 301C: Down Counter

302, 305, 308, 317: Switch 303: VG

304: decoder 306: line memory

307 and 312 switch unit 309 amplifier

301: Citi 311: Synchronous separator

313: automatic frequency control unit 314: horizontal / vertical drive unit

315: flyback detector 316: frequency divider

The present invention relates to a technology for displaying on-screen images of the same position and the same type in an image signal processor having different frequencies of horizontal scan lines. In particular, an on-screen image signal used in a television receiver is to be displayed on a monitor of a personal computer. The present invention relates to a television receiver / PCC on-screen processing circuit adapted to display in the same position and in the same form as a television receiver.

FIG. 1 is a block diagram of an on-screen processing of a general television set, and as shown therein, an on-screen image based on a horizontal flyback pulse (H＿FBP) and a vertical flyback pulse (V＿FBP) output from a flyback detector 109. A microcomputer (101) for determining the display position of and outputting the on-screen color signals (R2, G2, B2) together with the switching control signal (CS) at that time; A decoder 102 for decoding the luminance signal Y and the color signal C of the TV main picture and restoring the red, green, and blue color signals R1, G1, and B1 of the main picture; A switch 103 switched by the switching control signal CS for synthesizing the red, green and blue color signals R1, G1 and B1 and the on-screen color signals R2, G2 and B2 on the main screen; An amplifier (104) for amplifying the red, green, and blue color signals (R, G, B) synthesized by the switch (103) to a level suitable for displaying on the cathode side of the Citi 105; A synchronization separator (106) for separating the horizontal synchronization signal (H _sync ) and the vertical synchronization signal (V _sync ) from the luminance signal (Y); An automatic frequency adjusting unit (107) for automatically adjusting phases of the separated horizontal synchronization signal (H _sync ) and vertical synchronization signal (V _sync ); A horizontal / vertical driver 108 for driving the horizontal, vertical deflection coils HD and VD of the Citi 105 by amplifying the synchronization signal adjusted by the automatic frequency controller 107 to an appropriate level; The flyback detector 109 detects the current of the two deflection coils HD and VD in the Citi 105 and generates the horizontal flyback pulse HVFBP and the vertical flyback pulse VVFBP. The following describes the operation thereof.

The luminance signal Y and the color signal C for displaying an image of the TV main screen are supplied to the decoder 102, from which the red, green, and blue color signals R1, G1, and B1 are restored. Supplied to one input of 103).

Referring to the internal operation of the microcomputer 101 for outputting the on-screen video signal, the down counter 101C is a horizontal flyback pulse (H＿FBP) and a vertical flyback pulse (H＿FBP) output from the flyback detector 109, which will be described later. From the rising edge of V＿FBP), the system clock of predetermined frequency (4MHZ) is down counted, and the position information PI to transmit the on-screen signal is output to the on-screen signal transmitter 101B, and the on-screen signal transmitter 101B On-screen color signals R2, G2 and B2 stored in the on-screen memory 101A are read and supplied to the other input of the switch 103 based on the position information PI, and the switching control signal CS )

Accordingly, the switch 103 is switched by the switching control signal CS so that the red, green, and blue color signals R1, G1, B1 of the main screen and the on-screen color signals R2, G2, B2 are synthesized. And output.

The red, green, and blue color signals R, G, and B synthesized by the switch 103 are amplified to a level suitable for display by the amplifier 104 and then supplied to the cathode of the Citi 105 to display the screen. The synthesized video signal is displayed on the screen.

On the other hand, in order to control the horizontal and vertical deflection (beam) of the Citi 105, the synchronous separator 106 is a horizontal synchronous signal (H _sync ) and a vertical synchronous signal (V) in the luminance signal (Y) for the main picture _sync ) is outputted separately, which is amplified to a suitable level through the horizontal / vertical driving unit 108 after the phase is adjusted in the automatic frequency control unit 107, and the amplified output by the Citi 105 (105) The horizontal and vertical deflection coils (HD) and (VD) mounted on the neck of the drive are driven to control the deflection.

At this time, the flyback detector 109 senses the current of the two deflection coils in the Citi 105 to generate the horizontal flyback pulse (H_FBP) and the vertical flyback pulse (V_FBP), the pulse (H_FBP) , V_FBP is fed back so that the automatic frequency control unit 107 can be used to adjust the phase, and on the other hand, it is supplied to the down counter 101C of the microcomputer 101 to display the display position of the on-screen signal. It is used as a reference signal to determine.

On the other hand, Figure 2 shows an example designed to display the video signal of the VG (or PC) in the on-screen processing circuit of the general television receiver as shown in Figure 1 without changing the circuit of the microcomputer, the operation thereof is simplified The explanation is as follows.

Switch 204 is a switching control signal (TV / Red, green, and blue color signals (R1, G1, B1) of the main screen output from the VG 202 and red, green, and blue color signals (R2) of the main screen, output from the decoder 203, under the control of , G2 and B2 are selected and supplied to one side input of the next switch 205, and the switch 205 is controlled by the switching control signal CS output from the microcomputer 201. The on-screen color signals R4, G4, and B4 are combined with the color signals R3, G3, and B3 of the main screen to be output.

On the other hand, the switch unit 209 including the two interlocking switches SW1 and SW2 is controlled by the switch control signal TV / PC and the luminance signal Y for the television receiver is transmitted through one switch SW1. ) of the horizontal sync signal (H _sync1) or V whether using the horizontal synchronizing signal (H _sync2) and one of the switch, and supplied to one input of the automatic frequency control section 210, by selecting one signal from among (SW2) isolated from Through the other signal input of the automatic frequency control unit 210 by selecting one of the vertical synchronization signal (V _sync1 ) or the vertical synchronization signal (V _sync2 ) for the V _receiver separated from the luminance signal (Y) for the television _receiver To supply.

However, the horizontal frequency of the VG 202 is 31.5KHZ, which is twice the TV horizontal frequency, and the vertical frequency is 60HZ in graphic mode and 70HZ in text mode.

Therefore, if the on-screen information displayed on the TV screen is the same as that of FIG. 3a, when the on-screen information of the same content is displayed on the PC screen, it appears in a different position as shown in FIG. That is, the on-screen information designed based on the system clock of 4MHZ is displayed on the PC screen with double horizontal frequency to display on the TV screen. On-screen information 2 displayed in the second half does not appear on the screen. As a result, the display position is doubled on the horizontal axis and pulled in half on the vertical axis.

As described above, in the conventional TV receiver / PCB on-screen processing circuit, on-screen information cannot be displayed on TV screens and PC screens in a compatible manner, and thus a variety of services cannot be provided to users. To solve this problem, a means of designing and storing various on-screen information corresponding to the TV mode corresponding to the PC mode has been proposed, but in this case, a large amount of memory is required, resulting in a cost increase. There was a defect that the screen quality deteriorated.

Accordingly, an object of the present invention is to provide a TV receiver / PC for displaying on-screen information on the TV screen and the PC screen by adding a simple circuit to the outside of the microcomputer without separately adding on-screen information for the PC mode. An on-screen processing circuit is provided.

4 is a block diagram of an exemplary TV receiver / PCC on-screen processing circuit of the present invention for achieving the above object. As shown therein, a TV system clock signal or a PC system clock through the switch 302 is shown. When the signal is supplied, the vertical flyback pulse (V_FBP) is directly supplied from the flyback detector 315 and the horizontal flyback pulse (H_FBP) is directly or two-divided. A microcomputer 301 for outputting a color signal and a switching control signal; Switching control signal (TV / Select the oscillation signal of the crystal oscillator (X-TAL1) to supply the appropriate system clock signal to the on-screen on the TV screen, or select the oscillation signal of the crystal oscillator (X-TAL2) to suit the on-screen on the PC screen. A switch 302 for supplying a system clock signal; Switching control signal (TV / Select the main picture color signals R2, G2, B2 of the TV output from the decoder 304 or the main picture color signals R1, G1, B1 of the PC output from the BG 303 An output switch 305; A line memory 306 for delaying one horizontal line output of the on-screen color signals R4, G4 and B4 and the switch control signal CS1 output from the microcomputer 301; Switching control signal (TV / Color signals R4, G4, B4 and switching control signal CS1 selected for the on-screen output from the microcomputer 301, or color signals and switching control signals delayed through the line memory 306. A switch unit 307 for selecting and outputting the selected unit; The color signals R3, G3 and B3 output from the switch 305 are selected according to the switching control signal CS2 output from the switch unit 307, or the color signals R5, A switch 308 for selecting and outputting G5 and B5; An amplifier 309 which amplifies the color signal RGB synthesized by the switch 308 to a level suitable for displaying the output and outputs it to the Citi 301 side; Switching control signal (TV / Select the horizontal and vertical sync signal (H _sync1 ) (V _sync1 ) separated from the TV video signal, or select the horizontal and vertical sync signal (H _sync2 ) and (V _sync2 ) separated from the video signal. Switch unit 312 and the; Based on the automatic frequency control unit 313 for adjusting the phase of the horizontal and vertical synchronization signals (H _sync3 ) and (V _sync3 ) output from the switch unit 312 and the adjusted horizontal and vertical synchronization signals, A horizontal / vertical driving unit 314 for controlling the driving of the horizontal and vertical deflection coils HD and VD of the 301; A flyback detector 315 for sensing the currents of the two deflection coils HD and VD in the Citi 301 to generate the horizontal flyback pulse H_FBP1 and the vertical flyback pulse V_FBP; A divider 316 for dividing the horizontal flyback pulse H_FBP1 into two portions so as to be suitable for an on-screen display of a PC screen; The switching control signal (TV / ) Is configured as a switch 317 which selects the horizontal flyback pulse (H_FBP1) or the horizontal flyback pulse (H_FBP2) output from the divider 316 and outputs them to the microcomputer 301. If described in detail with reference to Figure 5 attached the effects and effects of the present invention.

First, in TV mode, the switching control signal (TV / ) Is supplied high, so that each switch is short-circuited to the fixed terminal H to output the on-screen information similar to that in the prior art of FIG.

That is, the switch 302 is short-circuited to the fixed terminal H, and the 4 MHZ system clock signal CLK output from the crystal oscillator X-TAL1 is supplied to the down counter 301C through the switch 302. In addition, the switch 317 is short-circuited to the fixed terminal (H), the predetermined frequency (output from the flyback detection 315 The horizontal flyback pulse (H_FBP1) is directly supplied to the down counter (301C), and the vertical flyback pulse (V_FBP) is supplied to the down counter (301C) through the switch 317.

Accordingly, the down counter 301C down-counts the 4MHZ system clock signal CLK from the rising edges of the horizontal flyback pulse H_FBP1 and the vertical flyback pulse V_FBP and transmits an on-screen signal. PI) is output to the on-screen signal transmitter 301B, and the on-screen signal transmitter 301B outputs the on-screen color signals R4, G4 and B4 stored in the on-screen memory 301A based on the position information. Read it and output it together with switching control signal CS.

In this case, the decoder 304 restores the red, green, and blue color signals R2, G2, and B2 from the luminance main signal Y for the TV main screen, and outputs them to the fixed terminal H of the switch 305. The switch 305 is a switching control signal (TV / Since the short circuit is shorted to the fixed terminal H, the red, green, and blue color signals R2, G2, and B2 are supplied to the fixed terminal L of the next switch 308 through the switch 305.

In the switch unit 307, the switching control signal TV / Switch SW1 is short-circuited to the fixed terminal H1 and the switch SW2 is short-circuited to the fixed terminal H2 by means of the on-screen color signals R4, G4 and B4 outputted from the on-screen transmitter 301B. ) Is supplied to the fixed terminal H of the switch 308 through the switch SW1, and the switch 308 is switched by the switching control signal CS2 so that the color signals R3 and G3 of the TV main screen are switched. On-screen color signals R5, G5, and B5 are combined with the color signals R, G, and B of the form B3).

The red, green, and blue color signals R, G, and B output in a synthesized form through the switch 308 are amplified to a level suitable for display by the amplifier 309 and then the cathode of the Citi 301 The synthesized video signal is supplied to and displayed on the screen.

At this time, in the switch unit 312, the switching control signal TV / The switch SW3 is short-circuited to the fixed terminal H1 and the switch SW4 is short-circuited to the fixed terminal H2, so that the horizontal sync signal H _sync1 and the vertical sync signal V _{sync1 for the TV} are automatic frequency. After the phase is adjusted and supplied to the controller 313, the amplifier is amplified to an appropriate level through the horizontal / vertical driving unit 314. The horizontal and vertical deflections mounted on the neck of the Citi 301 are output by the amplified output signal. Coils HD, VD are driven to deflect at a corresponding angle.

On the other hand, in the PC picture mode, the switching control signal (TV / ) Is supplied low, and each switch is short-circuited to the fixed terminal (L). In this case, a process of outputting on-screen information will be described as follows.

Since the switch 302 is shorted to the fixed terminal L, a system clock signal CLK of 8 MHz is supplied to the down counter 301C through the switch 302. In addition, while the vertical flyback pulse V_FBP output from the flyback detector 315 is directly supplied to the down counter 301C, the switching control signal TV / Since the switch 317 is short-circuited to the fixed terminal L by the horizontal flyback pulse H_FBP1 is divided into two through the divider 316 and then supplied to the down counter 301C through the switch 317. .

Accordingly, the down counter 301C down counts the 8MHZ system clock signal CLK from the rising edge of the vertical flyback pulse V_FBP and the horizontal flyback pulse 15.75KHZ (H_FBP2) divided by two. The position information PI to transmit a signal is output to the on-screen signal transmitter 301B, and the on-screen signal transmitter 301B is configured to display the on-screen color signal stored in the on-screen memory 301A based on the position information. R4, G4 and B4 are read and output together with the switching control signal CS.

At this time, the switch 305 is a switching control signal (TV / supplied to the low state Because of the short circuit to the fixed terminal (L), the color signal (R1, G1, B1) for the VG is supplied to the fixed terminal (L) of the next switch 308 through the switch 305.

In the switch unit 307, the switching control signal TV / The switch SW1 is short-circuited to the fixed terminal L1 and the switch SW2 is short-circuited to the fixed terminal L2 by means of the on-screen color signals R4, G4 and B4 outputted from the on-screen transmitter 301B. ) Is delayed by one horizontal line through the line memory 306, and then is supplied to the fixed terminal H of the switch 308 through the switch SW1 and through the line memory 306 and the switch SW2. The switch 308 is switched by the switching control signal CS, and the color signal of the form in which the on-screen color signals R5, G5, and B5 are combined with the color signals R3, G3 and B3 of the main screen for the VG. R, G, B).

The red, green, and blue color signals R, G, and B output in a synthesized form through the switch 308 are amplified to a level suitable for display by the amplifier 309 as in the TV mode, and then The synthesized video signal is supplied to the cathode of the tee 301 and displayed on the screen.

At this time, in the switch unit 312, the switching control signal TV / The switch SW3 is short-circuited to the fixed terminal L1 and the switch SW4 is short-circuited to the fixed terminal L2, so that the horizontal synchronization signal H _sync2 and the vertical synchronization signal V _sync2 are automatically After the phase is adjusted and supplied to the frequency adjusting unit 313, the amplification is performed at a suitable level through the horizontal / vertical driving unit 314. The horizontal and vertical parts mounted on the neck of the Citi 301 are output by the amplified output signal. The deflection coils HD and VD are driven to control the deflection at a corresponding angle.

After all, in the PC screen mode, the crystal oscillator through the switch 302 to output the system click (CLK) for determining the displayed horizontal position of the on-screen color signals (R4, G4, B4) at twice the frequency compared to the TV screen mode The 8MHz frequency signal output from (X-TAL2) is supplied to the system clock (CLK), which makes it possible to correct the horizontal position of the on-screen signal as shown in FIG. It can be seen that the display.

To solve this problem, in the PC picture mode, the horizontal flyback pulse (H_FBP1) is divided into two through the divider 316, and the horizontal flyback pulse (H_FBP2) of 15.75KHZ corresponding to half the frequency of the TV picture mode is downcounter 301C). As a result, as shown in FIG. 5B, although the lines constituting the on-screen characters are missing in the middle, ie, dotted lines, the vertical position is generally correctly displayed.

In order to solve the problem that the on-screen characters are displayed in a dotted line form, a line memory 306 is provided, and the on-screen color signals R4, G4, and B4 output to the previous line by controlling the switching of the switch unit 307 are provided. ) Is repeated again on the next line.

As described in detail above, the present invention provides a separate oscillator for correcting the horizontal position of the on-screen characters displayed on the PC screen without changing the internal circuit of the microcomputer for displaying the on-screen signal on the TV screen. By adding a separate frequency divider to correct the vertical position and vertical screen, regardless of the TV screen or PC screen, it is possible to display on-screen characters normally, thereby providing high-quality on-screen information at a low price.

Claims (2)

In an image processing apparatus for displaying on-screen information on a TV screen, the system clock signal CLK that is drained from each other is selectively supplied, and the vertical flyback pulse V_FBP is directly supplied from the flyback detector 315. The horizontal flyback pulse H_FBP includes a microcomputer 301 which is supplied with a direct or two-divided process and outputs an on-screen color signal and a switching control signal suitable for a TV screen or a PC screen; Switching control signal (TV / Select the oscillation signal of the crystal oscillator (X-TAL1) to supply the appropriate system clock signal (CLK) to the on-screen on the TV screen, or select the oscillation signal of the crystal oscillator (X-TAL2) to turn on the PC screen. A switch 302 for supplying an appropriate system clock signal CLK to the screen; Switching control signal (TV / Select the main picture color signals R2, G2, B2 of the TV output from the decoder 304 or the main picture color signals R1, G1, B1 of the PC output from the BG 303 An output switch 305; Main screen color signals R3, G3 and B3 output from the switch 305 and on-screen color signals output from the microcomputer 301 according to the switching control signal CS1 output from the microcomputer 301. A switch 308 for synthesizing and outputting (R4, G4, B4); Switching control signal (TV / ) Select the horizontal and vertical actuator signals (H _sync1 ) and (V _sync1 ) separated from the TV video signal, or the horizontal and vertical sync signals (H _sync2 ) and (V _sync2 ) separated from the video signal. A switch unit 312 for outputting the deflection drive control signal of the Citi 301; A divider 316 for dividing the horizontal flyback pulse H_FBP1 into two portions so as to be suitable for the on-screen display of the PC screen; The switching control signal (TV / And a switch 317 for selecting the horizontal flyback pulse H_FBP1 or the horizontal flyback pulse H_FBP2 output from the divider 316 and outputting them to the microcomputer 301. TV receiver / PCS on-screen processing circuit. According to claim 1, On-screen color signals (R4, G4, B4) and switching control signal (CS) output from the microcomputer 301 to prevent the display of the on-screen characters in a dotted line form one horizontal A line memory 306 for outputting a line delay; The on-screen color signals R4, G4 and B4 and the switch control signal such that the on-screen color signals R4, G4 and B4 output on the immediately preceding line are output to the switch 308 side again and again on the next line. (CS) and a switch unit (307) for selectively outputting a color signal and a switching control signal output from said line memory (306).