JPH05151369A - Integrated circuit - Google Patents

Abstract

PURPOSE:To provide a one-chip microcomputer which is characterized by a high speed execution of a program, change facility of the program and a simple circuit configuration. CONSTITUTION:The one-chip microcomputer is loaded with a ROM 13 in which a program for transferring an instruction code to a built-in high speed RAM from an external storage device is stored, a high speed RAM 14 for storing the instruction code and an external storage interface 12. Before the program is executed, a processor 11 of the one-chip microcomputer executes a transfer program and transfers the instruction code on the external storage device 2 to the built-in high speed RAM 14. After the transfer is finished, the processor 11 accesses the built-in high speed RAM 14 and executes the program at a high speed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit intended to execute microinstructions at a particularly high speed.

[0002]

2. Description of the Related Art A conventional one-chip microcomputer stores an instruction code in a built-in ROM or an externally connected memory and executes it. Some of the one-chip microcomputers have a built-in RAM, but the purpose of the RAM was to store work data and cache memory of programs.

When a one-chip microcomputer executes an instruction stored in a memory connected to the outside of the one-chip microcomputer, its execution speed depends on the access speed of the external memory. When a RAM is built in the one-chip microcomputer as a cache memory, its control circuit becomes complicated, and it is difficult to realize it due to restrictions in terms of layout.

[0004]

Conventionally, a program of a one-chip microcomputer is stored in a built-in ROM or an externally connected memory, and the program stored in the built-in ROM can be executed at high speed, but the program is modified or changed. I can't. Further, although the program stored in the external memory can be easily modified and changed, there is a problem that the program cannot be executed at high speed due to the signal delay due to the wiring capacity and the bad in the memory and the one-chip microcomputer. .. Further, if the cache memory is built in the one-chip microcomputer, the program can be executed at high speed, but the chip area becomes large.

[0005]

SUMMARY OF THE INVENTION The present invention is to solve the above-mentioned problems and comprises a processor for executing microinstructions, a ROM storing a program for transferring an instruction code from an external storage device, and the external storage. It is an integrated circuit configured to include a RAM that stores an instruction code transferred from a device and an interface with the external storage device.

[0006]

The program for the processor to execute the microinstruction is stored in the storage device outside the integrated circuit,
It is transferred to the built-in RAM by the instruction code transfer program stored in the ROM built in the integrated circuit. The micro instruction is executed according to the instruction code transferred to the RAM. Further, the integrated circuit incorporates an interface to facilitate connection with an external storage device.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 shows an integrated circuit of the minimum structure according to the present invention. Before executing the program 21 stored in the external storage device 2, the processor 11 of the integrated circuit 1 has a built-in ROM 13
Executing the instruction code transfer program 131 stored in
The program 21 is transferred to the built-in high-speed RAM 14. After the transfer is completed, the processor 11 executes the program on the built-in high-speed RAM 14. External storage device 2 to built-in high-speed RAM
The transfer of the program to 14 takes some time, but since the program execution time after that is shortened, the execution time is shortened as a whole. In particular, when there are many loops in the program 21, this shortening effect is remarkable.

In FIG. 1, when the internal data bus 15 of the integrated circuit 1 and the external data bus 3 have different bus widths, a data conversion time is required when reading an instruction code from the external memory 2. When the program 21 is directly read from the external storage device 2 and executed by the processor 11, the access time of the external storage device 2 and the data conversion time by the external storage interface 12 have a great influence on the execution time of the program 21.

On the other hand, the program 21 uses the data exchange function of the external storage interface 12 and uses the built-in high-speed RA.
When the program 21 is executed after expanding on M14,
The time for developing the program 21 on the internal high-speed RAM 14 is affected by the access time of the external storage 2 and the data exchange time, but the execution time of the program 21 expanded on the internal high-speed RAM 14 depends on the access time of the internal high-speed RAM 14. However, it does not depend on the data conversion time or the external storage access time. Further, if the function of compressing the instruction code of the program 21 and storing it in the external memory 2 and the function of decompressing the instruction code in the external memory interface 12 is built into the external storage interface 12, the occupied storage capacity in the external storage device 2 is reduced. be able to.

FIG. 2 shows that the integrated circuit 1 has a DMA (direc)
An example of a case in which a t memory access controller is built in will be described. The instruction code transfer program 131 includes a control program for the DMA controller 16. Before executing the program 21, the processor 11 controls the DMA controller 16 to transfer the program 21 on the external storage device 2 to the built-in high-speed RAM 14 via the external storage interface 12. The external storage interface 12 exchanges data as necessary.

After transferring the program 21 to the internal high-speed RAM 14, the processor 11 executes the program 21 on the internal high-speed RAM 14. In the embodiment of FIG. 2, the transfer of the program 21 is performed by the DMA controller 16, so that the transfer time of the program 21 is significantly shortened as compared with the embodiment of FIG.

[0012]

As described above, according to the present invention, it is possible to design a one-chip microcomputer characterized by high-speed execution of a program, easiness of changing the program, and a simple circuit configuration.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a configuration diagram showing another embodiment of the present invention.

Claims (1)

[Claims] 1. A processor for executing microinstructions,
A ROM storing a program for transferring an instruction code from an external storage device, a RAM storing the instruction code transferred from the external storage device, and an interface with the external storage device. Integrated circuit.