JPH0512147A - Information processor - Google Patents

Abstract

PURPOSE:To easily and efficiently manage a LAN node address of a grobal address type and to prevent the rewriting/destruction of the LAN node address after shipment. CONSTITUTION:A LAN address register 44b composed of an on-board writing type PLD is prepred as a storage device for the LAN node address. The writing of the LAN node address to the LAN address register 44b is programmed by a CPU 12 to be connected via a system bus 41. When the LAN node address is written, a control signal line for writing is cut by a jumper 44d.

Description

Detailed Description of the Invention

 [Object of the Invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing device such as an electronic filing device for registering or retrieving image information, and particularly to a LAN (Local Area).
a Network) connected to an information processing device to be used.

[0002]

2. Description of the Related Art Conventionally, LAN node address systems include a global address system having a fixed address for each connected device and a local address system having an arbitrary address.

In the global address system, since the change of the node address by the software is prohibited, the DIP switch having the address is fixed with an adhesive such as a bond, or a dedicated ROM (read only
Memory) is used to store addresses in this.

However, when the DIP switch is fixed with a bond or the like so that it cannot be tampered with, it is difficult to manage to set a different node address for each device.
It was difficult to deal with mistakes such as setting mistakes.

On the other hand, when ROM is used, each R
Since it is necessary to prepare each program (node address) corresponding to the OM, it is difficult to manage the node address and prepare the program, and it is not efficient because the device needs to be replaced when the setting is mistaken. There was a drawback.

Therefore, the on-board write type PLD (P
A programmable logic device) is prepared, and an LA is connected to this from an external personal computer.
A method of writing an N node address has been proposed (for example, Japanese Patent Application No. 2-340388).

However, in the case of the method of writing the node address from the external personal computer to the on-board write PLD, the management of the node address and the response to the setting error are efficient, but in addition to this system. It had the drawback of requiring equipment such as a personal computer.

Further, in the above method, since the connector is used for connection with the personal computer, the stored node address may be destroyed due to an external factor such as a software bug. There was a drawback that there was.

[0009]

As described above, in the conventional case, it is not easy to manage the LAN node address of the global address system, and even if it is managed efficiently, the However, there is a drawback in that it requires a special facility and the node address may be destroyed.

Therefore, according to the present invention, the node address information of the global address system can be easily and efficiently managed without the need for external equipment, and the node address information due to external factors can be managed. It is an object of the present invention to provide an information processing device capable of preventing rewriting and destruction of the device. [Constitution of Invention]

[0011]

In order to achieve the above-mentioned object, in the information processing apparatus of the present invention, the information processing apparatus connected to a network is mounted on a substrate,
Storage means capable of writing device-specific node address information from the outside, control means for internally controlling writing of the node address information to the storage means, and the storage means for controlling the storage means by the control means. After the writing of the node address information, it is composed of a preventing means for preventing the erroneous writing of the node address information.

[0012]

According to the present invention, it becomes possible to control the writing of the node address information from the inside in the state of being mounted on the board by the means described above, so that the degree of freedom of setting can be improved and This ensures reliable protection.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 and 2 show a configuration of an electronic filing device according to the present invention.

That is, the electronic filing apparatus includes a memory module 10, a control module 11, an image processing module 30, a communication control module 31, and a system bus 4.
1 and a controller 1 including an image bus 42, a scanner 20, an optical disk device 22, a keyboard 23, and C.
An RT display 24, a printer 25, magnetic disk devices 27 and 28, a mouse 29, etc. are connected and configured.

The control module 11 includes a CPU 12 that performs various controls for storing, retrieving, and editing processing of image data (image information), the optical disk device 22, the magnetic disk devices 27 and 28, and the CPU 12 and the like. It is composed of an interface circuit 17 for connection. Further, the keyboard 23 and the mouse 29 are connected to the CPU 12 described above.

The memory module 10 includes a main memory 13 for storing various control programs and management data for storing and retrieving image data, and a storage capacity corresponding to image data for several pages of an A4 size document (document). A page memory 14 as an image memory, a display memory 15 as a display interface, a display controller 16, and the like.

A buffer memory area 14a is provided in a part of the page memory 14. The buffer memory area 14a is controlled to write and read by a counter (not shown).

The page memory 14 is a memory for temporarily storing, for example, image data stored in the optical disc 19, image data read from the optical disc 19, and the like.

The display memory 15 is the CRT display 2
It is for temporarily storing the image data displayed by 4. In the display memory 15, the image data actually displayed in the display window on the CRT display 24, that is, the page memory 14 is displayed.
The image data that has been subjected to enlargement, reduction, rotation, insertion, black-and-white inversion, etc. is stored. The display control unit 16 controls the display process of the CRT display 24.

The image processing module 30 has an enlarging / reducing circuit 34 for enlarging and reducing the image data, a vertical / horizontal converting circuit 35 for performing a rotation process by vertically / horizontally converting the image data, and compressing the image data (reducing redundancy). ) Encoding processing and decompression (recovering reduced redundancy)
Compression / expansion circuit (CODEC) 3 for performing decoding processing for performing
6, a scanner interface 37 for the scanner 20,
The printer interface 38 for the printer 25, the enlargement / reduction circuit 34, and the vertical / horizontal conversion circuit 35 are connected to the CODEC 36, the scanner interface 37, the internal bus 39 for connecting the printer interface 38, and the like.

The communication control module 31 is, for example, an LA.
BCP as a LAN control unit connected to another electronic filing device or a computer system via an N (Local Area Network) 300
(Bus Communication Procedures
Sor) and the like. The communication interface 44 controls transmission and reception of image data and the like with other electronic filing devices and computer systems.

The communication interface 44 has a LAN controller and a node address write control circuit, which will be described later, and an LA for storing the LAN node address (node address information) of the global address system.
An N address register 44b is provided. The LAN address register 44b is for storing the LAN address of the global address system, and is mounted on a board (not shown).
A program (node address data) can be written externally, for example, on-board write PL
D (Programmable Logic Device)
e). However, in the case of the present embodiment, the writing of the program to the LAN address register 44b is controlled by the CPU 12 described above.

As the communication control module 31,
Interface with external equipment such as FCP (facsimile connection mechanism) and personal computer (RS-232
UPC connected via C, GPIB, SCSI)
(Universal communication processor) may be provided.

The system bus 41 is a bus for control signals and connects the control module 11 with the memory module 10, the image processing module 30, and the communication control module 31. The image bus 42 is a bus for image data, and includes the memory module 10 and the image processing module 3.
0, the communication control module 31 is connected.

The scanner 20 is a two-dimensional scanning device having a reading section composed of, for example, a CCD image sensor, and two-dimensionally scans a document with a laser beam light so as to respond to image data on the document. It is to obtain an electric signal.

The optical disk device 22 sequentially stores image data read by the scanner 20 or code data read from the floppy disk 28a via the magnetic disk device 28 on the optical disk 19. Further, the optical disc 19 is searched for search information (title information corresponding to individual image data) specified by the keyboard 23 or the like, or image data corresponding to display attribute information such as image size, image direction, and page number. is there.

The keyboard 23 is a man-machine for inputting specific search information corresponding to image data composed of code data and image data stored in the optical disk 19 and various operation commands such as storage, search and edit processing. It is a data input device as an interface.

The mouse 29 moves a cursor (not shown) displayed on the display window on the CRT display 24, for example, in the vertical and horizontal directions, and gives an instruction at a desired position to move the cursor to the position. This is an input device for selecting or instructing the displayed contents (various modes, area designation or icons for image editing, etc.).

The CRT display 24 is, for example, a cathode ray tube display device, and image data read by the scanner 20, code data read by the magnetic disk device 28, or read by the optical disk device 22. In addition to code data and image data, operation menus and the like are displayed. This CRT display 24 has a maximum of 4 in the display area for displaying image data.
It is a multi-window type display device capable of simultaneously displaying four image data by using one window. The image data displayed in each window is
Editing such as enlargement, reduction, rotation, and scrolling can be performed independently.

The printer 25 includes image data read by the scanner 20, code data read from the floppy disk 28a, code data and image data read from the optical disk 19, and a CRT.
The image data displayed on the display 24 is printed out as visible information on a recording medium such as recording paper, that is, is output as a hard copy.

The magnetic disk device 27 is a hard disk device, and various control programs are stored in the magnetic disk 27a mounted on the magnetic disk device 27, and search information input from the keyboard 23,
One piece of code data corresponding to this search information, a storage address on the optical disc 19 in which image data is stored, a data size, a flag for discriminating between code data and image data, and image size, image direction, rotation angle, etc. Retrieval / display data (management data) including display attribute information of is stored as a database (DB). The search / display data is read and stored from the optical disc 19 when the optical disc 19 is mounted.

Here, the above-mentioned storage address is a logical address, and the physical track address and physical sector address are calculated from this at the time of access.

The magnetic disk device 28 is, for example, 5.2.
A 5-inch floppy disk device, a CA created by a text file (document) created by a word processor (not shown) or a personal computer
This is for reading a code data file such as a D drawing file and a worksheet file (drawing data) from the floppy disk 28a. As the floppy disk 28a, one corresponding to various OS (operating system) is set.

The CPU 12 controls the overall operation of the electronic filing apparatus and the controller 1 for controlling the flow of data and the like. Further, the CPU 12 has the LAN address register 44b.
For writing the LAN node address to the LAN, and the program to be written is automatically generated. Next, the LAN address register 44b
The writing of the LAN node address to the will be described. FIG. 3 shows the configuration around the LAN address register 44b for writing the LAN node address.

In the figure, the LAN controller 44a
Is for controlling the LAN communication by reading the LAN node address in the LAN address register 44b.

Since the LAN address register 44b is composed of the on-board write PLD as described above, the LAN node address can be written while it is mounted on the board. There is.

Node address write control circuit 44c
Generates a write control signal necessary for writing the LAN node address to the LAN address register 44b.

In the case of this embodiment, for example, a node
A jumper 44d is provided on the control signal line between the address write control circuit 44c and the LAN address register 44b, and both are connected via this jumper 44d.

This jumper 44d has a LAN address
This is to prevent the control signal line from being cut after the LAN node address is written to the register 44b, and the LAN node address from being rewritten after shipping.

In such a configuration, the LAN node
When writing an address, the CPU 12 is connected to the communication interface 44 via the system bus 41. Then, the CPU 12 controls the node address write control circuit 44c to generate a write control signal. This write control signal is sent on the control signal line via the jumper 44d and sent to the LAN address register 44b.

Then, the LAN address register 44b
Is programmed, that is, the LAN node address by the CPU 12 is written in the LAN address register 44b. Thus, the LAN address register 44
The unique LAN node address of this electronic filing device will be stored in b.

That is, the CPU 12 can automatically generate a program in which the LAN node address is incremented when writing the LAN node address in the LAN address register 44b. Therefore, it is possible to always write different LAN node addresses to the LAN address register 44b, and it is possible to easily manage node addresses of the global address system.

When the LAN node address is stored,
Shipment inspections are carried out. When all the inspections are completed, the jumper 44d is removed and the control signal line is cut. This prevents L from being erroneously rewritten or destroyed due to external factors, such as after shipment.
The AN node address can be protected. Note that the LAN node address can be reset easily by connecting the control signal line with the jumper 44d. As described above, the writing of the node address information can be controlled from the inside when mounted on the board.

That is, an on-board write type PLD is prepared as a storage device for the LAN node address, and the LAN node address can be written to this PLD by the CPU. As a result, it becomes possible to freely program from the inside while being mounted on the board without the need for external equipment such as a personal computer. Therefore, since the LAN node address can be automatically generated by using the CPU, it is possible to easily manage the global address and prevent the setting error from occurring. In addition, even if a setting error occurs, you do not need to replace the device, etc.
Reconfiguration of the AN node address is easily possible.

Further, by cutting the control signal line for writing, it is possible to prevent damage due to external factors after shipping, and it is possible to reliably protect the LAN node address.

Although the control signal line for writing is cut by the jumper in the above embodiment, the present invention is not limited to this. For example, the control signal line may be cut by cutting a pattern. .. Further, the present invention is not limited to the electronic filing device and can be applied to various information processing devices having a LAN function. Of course, various modifications can be made without departing from the spirit of the invention.

[0047]

As described above in detail, according to the present invention, it is possible to easily and efficiently manage the node address information of the global address system without requiring external equipment, and An information processing device capable of preventing rewriting or destruction of node / address information due to external factors can be provided.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an electronic filing device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of an electronic filing device as well.

FIG. 3 is a diagram showing a peripheral configuration of a LAN address register for writing a LAN node address.

[Explanation of symbols]

1 ... Controller, 12 ... CPU, 41 ... System bus, 44 ... Communication interface, 44a ... LAN controller, 44b ... LAN address register (ON.
Board write type PLD), 44c ... Node address write control circuit, 44d ... Jumper, 300 ... LAN.

Claims (1)

Claim: What is claimed is: 1. An information processing device connected to a network, wherein a node peculiar to the device from the outside is mounted on a board.
Storage means capable of writing address information, control means for internally controlling writing of the node address information to the storage means, and after writing the node address information to the storage means by the control means An information processing apparatus comprising: a prevention unit that prevents erroneous writing of the node address information.