JPH04336448A - Fabrication of semiconductor device - Google Patents

Fabrication of semiconductor device

Info

Publication number
JPH04336448A
JPH04336448A JP10740891A JP10740891A JPH04336448A JP H04336448 A JPH04336448 A JP H04336448A JP 10740891 A JP10740891 A JP 10740891A JP 10740891 A JP10740891 A JP 10740891A JP H04336448 A JPH04336448 A JP H04336448A
Authority
JP
Japan
Prior art keywords
wafer
die
picker
reinforcing plate
protective tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10740891A
Other languages
Japanese (ja)
Inventor
Yukihiro Tominaga
冨永 之廣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP10740891A priority Critical patent/JPH04336448A/en
Publication of JPH04336448A publication Critical patent/JPH04336448A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding

Abstract

PURPOSE:To protect a wafer against cracking during probing process or conveyance by applying a reinforcing board to the rear surface of the wafer applied with a surface protective tape immediately after rear surface grinding process during which strength of the wafer deteriorates considerably. CONSTITUTION:Upon finish of rear surface grinding work of a semiconductor wafer 21, a protective tape 23 is applied through a water soluble glue onto a device fabricating surface 24. A reinforcing board 25 having picker holes 26 is further applied thereon. The protective tape 23 is then peeled off and the wafer 21 is cleaned. The wafer 21 is then scribed along a scribe line by means of a dicing plate until the reinforcing board 25 is reached thus dicing the wafer. Thereafter the wafer is irradiated with ultraviolet ray from the direction of the reinforcing board 25 in order to lover the bonding force. Consequently, the wafer is protected against cracking during peeling process of surface protective tape, probing process, assembling process, and the like. Furthermore, the picker holes facilitate die pick up process.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は、半導体装置の製造、
中でもウエハプロセスで素子形成完了後のウエハのダイ
シング、ピックアップ工程のための補強方法に関するも
のである。
[Industrial Field of Application] This invention relates to the manufacture of semiconductor devices,
In particular, it relates to a reinforcing method for wafer dicing and pickup steps after completion of element formation in the wafer process.

【0002】0002

【従来の技術】図2(a)〜(f)は、従来の半導体素
子のウエハプロセス完了後から、ダイススクライブ、ピ
ックアップまでの工程を示したものである。
2. Description of the Related Art FIGS. 2(a) to 2(f) show the steps from completion of a conventional semiconductor device wafer process to die scribing and pickup.

【0003】図2(a)は、半導体素子作成工程を完了
した、半導体ウエハ1であり、一般的に6″φウエハで
625μm、8″φウエハで725μmの厚さ2を有し
ている。しかしこのようなウエハ厚2は、ダイス実装に
不適当であり、半導体ウエハ1の裏面は、200〜45
0μmの実装仕様に適した厚さに研削されている。この
研削工程においてデバイス面3を保護するため、表面保
護テープ4が接着用糊(図示しない)によって接着され
ている。この状態において図2(b)に示すように、半
導体ウエハ1は実装の仕様に合せ200〜450μmの
厚さ2′に研削される。その後表面保護テープ4を機械
的に剥離し、接着用糊を洗浄工程で除去した図が図2(
c)である。しかる後、チップの電気的特性良・否判定
を行なうプロービング工程を経て、組立工程に搬送され
る。その後図2(d)に示す様に、チップスクライブ工
程およびダイス抜き取りを行なうため、ダイシングテー
プ5が半導体ウエハ1裏面に接着糊を用いて接着される
。さらに図2(e)に示すように、スクライブラインに
沿って、ウエハ1はダイシングされるが、6はこの時の
ダイシング溝であり、ダイシングテープ5に達するよう
にウエハ1はダイシングされる。7は、この処理により
、分離されたダイスであり、ダイシング後、ダイシング
テープ5とダイス7を分離しやすくするため、テープ面
より、紫外線を照射し接着糊を硬化させる。その後ダイ
スダイシングテープ5をピッカー針8により突き破るこ
とにより、ダイシングテープ5よりダイス7は剥離され
、コレット9で真空吸着されダイス7は抜き取られる。
FIG. 2(a) shows a semiconductor wafer 1 that has completed the semiconductor device fabrication process, and generally has a thickness 2 of 625 μm for a 6″φ wafer and 725 μm for an 8″φ wafer. However, such a wafer thickness 2 is inappropriate for die mounting, and the back surface of the semiconductor wafer 1 has a thickness of 200 to 45 mm.
It is ground to a thickness suitable for 0μm mounting specifications. In order to protect the device surface 3 during this grinding process, a surface protection tape 4 is attached with adhesive glue (not shown). In this state, as shown in FIG. 2(b), the semiconductor wafer 1 is ground to a thickness 2' of 200 to 450 μm in accordance with mounting specifications. Figure 2 (
c). Thereafter, the chip goes through a probing process to determine whether the electrical characteristics of the chip are good or not, and then is transported to an assembly process. Thereafter, as shown in FIG. 2(d), a dicing tape 5 is adhered to the back surface of the semiconductor wafer 1 using an adhesive in order to perform a chip scribing process and die extraction. Furthermore, as shown in FIG. 2(e), the wafer 1 is diced along the scribe line, and 6 is a dicing groove at this time, and the wafer 1 is diced so as to reach the dicing tape 5. Reference numeral 7 indicates the dice separated by this process. After dicing, in order to facilitate separation of the dicing tape 5 and the dice 7, ultraviolet rays are irradiated from the tape surface to harden the adhesive paste. Thereafter, the dice 7 are peeled off from the dicing tape 5 by piercing the dice dicing tape 5 with the picker needle 8, and the dice 7 are vacuum-adsorbed by the collet 9 and extracted.

【0004】0004

【発明が解決しようとする課題】しかしながら、実装仕
様によって200〜450μmに薄く研削されたウエハ
においては、厚さ的に強度が低下し、プロービング工程
やウエハ搬送工程、さらにはダイシングテープ接着工程
において、ウエハ割れが発生する問題があった。特に最
近、使用されるようになった、8″φウエハや200μ
m以下のICカード用等のウエハは、ウエハ割れが多く
発生する要因となっている。又一般的に前処理のウエハ
処理工場と組立工場間の搬送は大きなウエハ割れ要因と
なっていた。この様な薄いウエハの対応技術として、特
願昭61−180890号においては、裏面に有機膜を
約10μmコートし、強度向上を計っているが、6″φ
以下のウエハにおいては、有効なものの、8″φ以上の
ウエハでは、ウエハ強度を満足させるには不充分であり
、さらに特願昭60−146522号では、ウエハ強度
を向上させるため、ウエハ裏面に発泡スチロールの基板
を貼り付け、ダイスのピックアップは、この発泡スチロ
ールをピッカー針で貫通させることにより行なう方法も
提案されている。しかし基板材がやわらかいため、ダイ
ススクライブ時ウエハが固定されずチップの欠けが起る
という欠点があった。
[Problems to be Solved by the Invention] However, in wafers that are ground thin to 200 to 450 μm depending on packaging specifications, the strength decreases due to the thickness, and the strength of the wafers decreases due to the thickness, and the strength of the wafers decreases due to the thickness. There was a problem of wafer cracking. In particular, 8″φ wafers and 200μ wafers have recently been used.
Wafers for IC cards and the like with a diameter of less than m are a cause of many wafer cracks. Additionally, transportation between a pre-processing wafer processing factory and an assembly factory is generally a major cause of wafer cracking. As a technology for dealing with such thin wafers, Japanese Patent Application No. 180890/1983 proposes coating the back side with an organic film of about 10 μm to improve strength.
Although it is effective for the following wafers, it is insufficient to satisfy the wafer strength for wafers of 8"φ or more. Furthermore, in Japanese Patent Application No. 60-146522, in order to improve the wafer strength, A method has also been proposed in which a Styrofoam substrate is attached and the dice are picked up by piercing the Styrofoam with a picker needle.However, because the substrate material is soft, the wafer is not held in place during die scribing, resulting in chips being chipped. There was a drawback that

【0005】この発明は以上述べたウエハの薄形化や大
口径化にともない、相対的にウエハ強度が低下し、プロ
ービング工程や、ウエハ搬送時において、ウエハ割れが
発生するという問題点を、ウエハ強度を向上させること
により防止したものである。
The present invention solves the above-mentioned problem that wafer strength is relatively reduced as wafers become thinner and have larger diameters, and wafer cracks occur during the probing process or during wafer transportation. This was prevented by improving the strength.

【0006】[0006]

【課題を解決するための手段】この発明は前述の目的の
ために、半導体装置の製造方法において、裏面研削時に
、デバイス面を保護するために用いたテープを残した状
態において、裏面にウエハ強度を向上させる、補強板を
接着するようにしたものであり、この板の素材を紫外線
透過率の良い材質とし、ダイス抜き取り工程で用いるピ
ッカー用の穴を有する構造にしたものである。
[Means for Solving the Problems] For the above-mentioned purpose, the present invention provides a method for manufacturing a semiconductor device in which, during backside grinding, a tape used to protect the device surface is left on the backside to give strength to the wafer. This plate is made of a material with good ultraviolet transmittance and has a structure with a hole for a picker used in the die extraction process.

【0007】[0007]

【作用】前述のように、この発明によれば、ウエハ強度
の大巾に低下する、裏面研削工程の直後に、表面保護テ
ープを貼り付けた状態で、ウエハ裏面に補強板を貼り付
け、ウエハ強度を向上させたため、表面保護テープ剥離
工程、プロービング工程や、アセンブリ工程等で発生す
るウエハの割れを無くすことが出来る。又、ピッカーに
対応するように、ピッカー穴を有しているため、ダイス
ピッカー処理によるダイス抜き取り工程まで使用するこ
とが出来、ダイシングテープ貼り付け工程が除去出来る
[Operation] As described above, according to the present invention, immediately after the backside grinding process, in which the wafer strength is significantly reduced, a reinforcing plate is attached to the backside of the wafer with a surface protection tape attached, and the wafer is Since the strength is improved, it is possible to eliminate cracks in the wafer that occur during the surface protection tape peeling process, probing process, assembly process, etc. Further, since it has a picker hole to accommodate a picker, it can be used up to the step of removing the dice by die picker processing, and the step of attaching the dicing tape can be eliminated.

【0008】[0008]

【実施例】図1は、この発明の実施例を示す工程のウエ
ハ断面図である。図1(a)は裏面研削後を示したもの
であり、21は半導体ウエハで、22で示すように実装
の仕様のため、200〜450μmの厚さに研削されて
おり、23はこの研削工程において、デバイス作製面2
4を保護するための保護テープであり、水溶性の接着糊
(図示しない)でデバイス作製面24に貼り付けてある
。次に図1(b)のように、テープ貼り付け状態のまま
、厚さ300〜1000μmの補強板25を接着糊で貼
り付ける。この方法において補強板25は、たとえば紫
外線透過率の良好な石英とし、又接着糊は、紫外線によ
り硬化し、接着強度が弱くなる素材を使用すれば、後述
する補強板からのダイス剥離を容易にすることができる
。さらにこの補強板25は、ピッカー穴26を有する構
造としておく。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a cross-sectional view of a wafer showing steps of an embodiment of the present invention. Figure 1(a) shows the back surface after grinding, 21 is a semiconductor wafer, 22 is a semiconductor wafer that has been ground to a thickness of 200 to 450 μm due to mounting specifications, and 23 is a semiconductor wafer after this grinding process. , device fabrication surface 2
4, and is attached to the device fabrication surface 24 with a water-soluble adhesive (not shown). Next, as shown in FIG. 1(b), a reinforcing plate 25 having a thickness of 300 to 1000 μm is attached using adhesive while keeping the tape attached. In this method, the reinforcing plate 25 is made of, for example, quartz with good ultraviolet transmittance, and the adhesive is made of a material that is cured by ultraviolet rays and has a weak adhesive strength, so that it is easy to peel the dice from the reinforcing plate, which will be described later. can do. Furthermore, this reinforcing plate 25 is structured to have a picker hole 26.

【0009】次に、図1(c)に示すように、保護テー
プ23を剥離し、水溶性の糊をスピン洗浄法等で洗浄す
る。しかる後、図1(d)に示すように、スクライブラ
インに沿ってダイシングプレートで、補強板25に達す
るまでスクライブしダイスに分割する。27は、このと
きのスクライブ溝であり、28は分割されたダイスであ
る。そして、スクライブ完了後、補強板25方向より紫
外線を接着糊に照射し、接着強度を低下させる。その後
図1(e)に示すように、ピッカー穴26よりピッカー
29を突き上げることにより、ダイス28を補強板25
より剥離し、コレット30で真空吸着し、ダイス抜き取
りを行う。この時のダイス28とピッカー26と補強板
25との位置関係の断面図を示したものが図3(a)で
あり、その平面図を示したのが図3(h)である。補強
板25は、ダイス28のサイズにより、あらかじめ、ダ
イス28に対応するように、又、ピッカー針26の径よ
り充分に大きく、さらにピッカー間隔はピッカー穴の間
隔に応ずるように設定する。尚このピッカー穴26は、
ひとつのダイスに対して、図では、4個で設置し、ピッ
カー針4本でダイスを支持するようにしているが、3個
以上であれば何個でも可能である。以上のように設置さ
れたピッカー穴26は、ウエハとの貼り合せにおいて、
スクライブラインを目標として、これと等間隔となるよ
うに合せて接着糊31で接着する。
Next, as shown in FIG. 1(c), the protective tape 23 is peeled off, and the water-soluble glue is washed away by a spin washing method or the like. Thereafter, as shown in FIG. 1(d), the film is scribed along the scribe line with a dicing plate until it reaches the reinforcing plate 25, and divided into dice. 27 is a scribe groove at this time, and 28 is a divided die. After the scribing is completed, the adhesive paste is irradiated with ultraviolet rays from the direction of the reinforcing plate 25 to reduce the adhesive strength. Thereafter, as shown in FIG. 1(e), by pushing up the picker 29 from the picker hole 26, the die 28 is inserted into the reinforcing plate 25.
The film is peeled off, vacuum-adsorbed using a collet 30, and the die is extracted. FIG. 3(a) shows a cross-sectional view of the positional relationship between the die 28, the picker 26, and the reinforcing plate 25 at this time, and FIG. 3(h) shows a plan view thereof. Depending on the size of the die 28, the reinforcing plate 25 is set in advance to correspond to the die 28 and to be sufficiently larger than the diameter of the picker needle 26, and the picker spacing is set in accordance with the spacing of the picker holes. This picker hole 26 is
In the figure, four picker needles are installed for one die, and the die is supported by four picker needles, but any number of picker needles may be used as long as it is three or more. The picker hole 26 installed as described above is used when bonding the wafer.
Aiming at the scribe line, adhere it to the scribe line at equal intervals using adhesive glue 31.

【0010】図4はダイススクライブ時において、ダイ
シングブレートで補強板をカットしないようにしたもの
であり、スクライブラインに沿って、ダイスブレードよ
け溝32を設置したものであり、溝巾33は、約40μ
mのダイスブレード厚に対して、100〜1000μm
と充分にマージンを取るとともに、溝深さ34は、切り
込み量に対して約100μmと深めに設定する。
FIG. 4 shows a structure in which the reinforcing plate is not cut by the dicing plate during die scribing, and a die blade avoidance groove 32 is installed along the scribe line, and the groove width 33 is as follows. Approximately 40μ
100-1000 μm for a die blade thickness of m
In addition to providing a sufficient margin, the groove depth 34 is set to be approximately 100 μm deep relative to the depth of cut.

【0011】[0011]

【発明の効果】以上のように、この発明によれば、ウエ
ハ強度の大巾に低下する、裏面研削工程の直後に、表面
保護テープを貼り付けた状態で、ウエハ裏面に補強板を
貼り付け、ウエハ強度を向上させたため、表面保護テー
プ剥離工程、プロービング工程や、アセンブリ工程等で
発生するウエハの割れを無くすことが出来る。更に、こ
の補強板は石英等の材質を用いるため、ダイススクライ
ブの基板としても使用が可能であり、又ピッカーに対応
するように、ピッカー穴を有しているため、ダイスピッ
カー処理によるダイス抜き取り工程まで使用することが
出来、ダイシングテープ貼り付け工程が除去出来るとい
う特徴がある。
[Effects of the Invention] As described above, according to the present invention, a reinforcing plate is attached to the back side of the wafer with the surface protection tape attached immediately after the back side grinding step, which significantly reduces the wafer strength. Since the wafer strength is improved, it is possible to eliminate wafer cracks that occur during the surface protection tape peeling process, probing process, assembly process, etc. Furthermore, since this reinforcing plate is made of a material such as quartz, it can also be used as a substrate for die scribing, and since it has a picker hole to accommodate a picker, it can be used in the die extraction process using a die picker. It has the feature that it can be used up to the point where the dicing tape is applied, and the step of attaching the dicing tape can be eliminated.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の実施例説明図[Fig. 1] Illustration of an embodiment of the present invention

【図2】従来例の説明図[Fig. 2] Explanatory diagram of conventional example

【図3】ダイスとピッカー穴と補強板の関係図[Figure 3] Relationship diagram between die, picker hole, and reinforcing plate

【図4】
ブレードよけ溝を設けた補強板
[Figure 4]
Reinforcement plate with blade guard grooves

【符号の説明】[Explanation of symbols]

21    半導体ウエハ 22    ウエハ厚 23    保護テープ 25    補強板 26    ピッカー穴 27    スクライブ溝 28    ダイス 29    ピッカー 30    コレット 21 Semiconductor wafer 22 Wafer thickness 23 Protective tape 25 Reinforcement plate 26 Picker hole 27 Scribe groove 28 Dice 29 Picker 30 Colette

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】  半導体装置の製造において、ウエハプ
ロセスで半導体素子形成を完了した後のダイシング、ピ
ックアップなどの工程の為の補強方法として、前記半導
体ウエハ研削後、表面保護テープを貼り付けた状態で裏
面に補強板を接着するようにしたことを特徴とする半導
体装置の製造方法。
1. In the manufacture of semiconductor devices, as a reinforcing method for processes such as dicing and pickup after completion of semiconductor element formation in a wafer process, the semiconductor wafer is ground with a surface protection tape attached thereto. A method for manufacturing a semiconductor device, characterized in that a reinforcing plate is bonded to the back surface.
【請求項2】  請求項1記載の補強板を高紫外線透過
材とし、その接着剤を紫外線硬化材として、ダイススク
ライブ後に前記補強材面より紫外線を照射し、前記接着
強度を低下させるようにしたことを特徴とする半導体装
置の製造方法。
2. The reinforcing plate according to claim 1 is made of a highly ultraviolet transmitting material, the adhesive thereof is made of an ultraviolet curing material, and after die scribing, ultraviolet rays are irradiated from the reinforcing material surface to reduce the adhesive strength. A method for manufacturing a semiconductor device, characterized in that:
【請求項3】  請求項1記載の補強板をダイスに対応
するように配設し、かつダイスピッカー用の穴を設け、
該穴よりピック針で突き上げ、ダイスを前記補強板より
剥離するようにしたことを特徴とする半導体装置の製造
方法。
3. The reinforcing plate according to claim 1 is arranged to correspond to the die, and a hole for a die picker is provided,
A method for manufacturing a semiconductor device, characterized in that the die is peeled off from the reinforcing plate by pushing up through the hole with a pick needle.
【請求項4】  補強板に、ダイススクライブ時にその
ダイシングブレードで前記補強板がカットされないため
のブレードよけ溝を設けたことを特徴とする請求項1な
いし3記載の半導体装置の製造方法。
4. The method of manufacturing a semiconductor device according to claim 1, wherein the reinforcing plate is provided with a blade-preventing groove to prevent the reinforcing plate from being cut by a dicing blade during die scribing.
JP10740891A 1991-05-13 1991-05-13 Fabrication of semiconductor device Pending JPH04336448A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10740891A JPH04336448A (en) 1991-05-13 1991-05-13 Fabrication of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10740891A JPH04336448A (en) 1991-05-13 1991-05-13 Fabrication of semiconductor device

Publications (1)

Publication Number Publication Date
JPH04336448A true JPH04336448A (en) 1992-11-24

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP10740891A Pending JPH04336448A (en) 1991-05-13 1991-05-13 Fabrication of semiconductor device

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Country Link
JP (1) JPH04336448A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1261938A1 (en) * 2000-03-10 2002-12-04 SCHLUMBERGER Systèmes Reinforced integrated circuit
WO2002089176A3 (en) * 2001-04-10 2004-03-11 Muehlbauer Ag Method for separating electronic components from a composite
US7459343B2 (en) 2004-05-28 2008-12-02 Shinko Electric Industries Co., Ltd. Method of manufacturing semiconductor device and support structure for semiconductor substrate
JP2015072994A (en) * 2013-10-02 2015-04-16 株式会社ディスコ Processing method of wafer
JP2016115800A (en) * 2014-12-15 2016-06-23 株式会社ディスコ Processing method for wafer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1261938A1 (en) * 2000-03-10 2002-12-04 SCHLUMBERGER Systèmes Reinforced integrated circuit
WO2002089176A3 (en) * 2001-04-10 2004-03-11 Muehlbauer Ag Method for separating electronic components from a composite
US7459343B2 (en) 2004-05-28 2008-12-02 Shinko Electric Industries Co., Ltd. Method of manufacturing semiconductor device and support structure for semiconductor substrate
JP2015072994A (en) * 2013-10-02 2015-04-16 株式会社ディスコ Processing method of wafer
JP2016115800A (en) * 2014-12-15 2016-06-23 株式会社ディスコ Processing method for wafer

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