JPH037174B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for adjusting the waveform of a transmission code pulse in a data transmission device that transmits data in series.

In recent years, with the development of optical transmission technology, industrial data way systems have been using Munciester codes, which facilitate generation of bit-synchronized clocks, as encoding systems. In a Mantier code code converter, strict adjustment of the code pulse waveform (pulse width) is generally required, but the adjustment becomes even more difficult when taking advantage of the high-speed transmission of optical transmission.

FIG. 1 shows a block diagram of the configuration of a general optical transmission system. In the figure, 1 and 7 are data terminals, 2 is a code converter, and 3 is an electrical to optical converter (E/
4 is an optical transmission line, 5 is an optical to electrical converter (O/E converter), and 6 is a code decoder. Next, the operation of the circuit shown in FIG. 1 will be explained. The data terminal 1 receives the NRZ (Non
(Return to Zero) code data signal and synchronous clock signal are sent to the code converter 2. The code converter 2 converts these data signals with synchronized clock signals into Manchester codes, and the E/O converter 3
to communicate. The E/O converter 3 converts the Mantier code into light intensity and transmits it to the O/E converter 5 via the optical transmission line 4. The O/E converter 5 performs optical to electrical conversion and inputs the result to the code decoder 6. The code decoder 6 uses the Manchiesta code as
The NRZ data signal and the synchronous clock signal are decoded and transmitted to the data terminal 7.

FIG. 2 shows a tire chart of each signal during code conversion by the code converter 2. In the same figure,
CK and DT are the synchronous clock signal and data signal from data terminal 1. CKA and CKB are clock signals created from the falling and rising edges of the synchronous clock signal CK, and DF is a signal obtained by sampling the data signal DT using the clock signal CKA.
The Manchester code signal MCD is created from CKA, CKB, and DF according to the following set conditions and reset conditions [Set condition = ・
CKA+DF・CKB, reset condition=DF・CKA+
DF・CKB]. As shown in the figure, the pulse width of the Mantis code is determined by the phase difference between CKA and CKB.

FIG. 3 shows a time chart of various signals during code decoding by the code decoder 6. The code is decoded using clock signals CKA and CKB created from the rising and falling edges of the Manchester code MCD, and clock signals CKAD and CKBD that are delayed from these signals.
NRZ data signal DT and clock signal CK are generated. In addition, the setting condition of data signal DT =
BF/CKBD, same reset condition = AF/CKAD. Also, the setting condition of the BF signal =・CKB,
The reset condition is CKBD. Furthermore, the AF signal set condition = CKA, and the same reset condition =
It is CKAD.

As shown in FIG. 3, when decoding a code, it is desired that fluctuations in the clock signals CKA and CKB, that is, fluctuations in the pulse width of the mantier code MCD, which is the original waveform, be small. If the pulse width fluctuation is large, for example, the clock signal CKB may become the clock delay signal CKAD.
The decoding of the code will be disrupted due to the delay. This situation will be explained based on FIG. T ₀
is the time width of 1 bit, _T1 is the time width of 1/2 bit,
Δτ is the pulse width variation, a _x and a _y are the rising and falling detection delay times, D _x is the clock delay time, d _x
is the pulse width of the delay clock.

From FIG. 4, the following two equations hold true as conditions for code decoding.

Condition 1...D _x T ₁ +Δτ+a _y = (T ₀ /2+ΔT) + Δτ+a _y (However, ΔT is biased by half bit pulse width) Condition 2...D _x T ₀ -Δτ+a _x -d _xThe above two conditions are satisfied range, that is, the operating range S
, the transmission speed is 14 Mbit/s (T ₀ = 71ns T ₁ =
35ns), a graph with D _x on the vertical axis and Δτ on the horizontal axis is shown in FIG. however
Let a _x = a _y = d _x = 10 ns.

It can be seen from this graph that in order to decode the code, both the pulse width variation Δτ and the code half-bit pulse width variation (bias) ΔT must be made small. This is because the larger the pulse width variation Δτ and the half-bit pulse width variation ΔT, the smaller the operating range S becomes. However, the pulse width variation Δτ is determined by the characteristics of the electrical to optical converter and the optical to electrical converter (approximately ±10 ns for a device with a performance of 14 Mbit/S), and cannot be changed. Therefore, only the half-bit pulse width bias ΔT can be adjusted.

From Figure 5, we can see that this half-bit pulse width bias ΔT
It can be seen that it is necessary to make it 6ns or less. When the bias ΔT exceeds 6 ns, the pulse width variation Δτ becomes 10 ns.
If it is not below, it will not fall within the operating range S, but as mentioned above, this is because Δτ≈10 ns is the limit due to the performance of the converter.

Next, a conventional method for realizing the above-mentioned request from the code decoder using a code converter will be described. As explained in FIG. 2, the half-bit pulse width is generated in the code converter 2 from the rising and falling edges of the clock signal CK. Half-bit pulse width deviation
If it is less than 6 ns, it is equivalent to the delay time of the logic element STTL, so while observing the output pulse waveform with a synchroscope, for example, change the signal switching connection and adjust the number of stages of the logic element to increase the output pulse width. adjustments were being made. This work has many disadvantages, such as requiring a synchroscope, making adjustments cumbersome, not being able to make fine adjustments, and requiring the transmission circuit card to be inserted and removed for adjustment.

The present invention aims to solve the above-mentioned problems. Specifically, there is no need to insert or remove the relevant transmission circuit unit during adjustment work, there is no need for a synchroscope, and continuous fine adjustment of half-bit pulse width is possible. The purpose of this invention is to provide a code pulse waveform adjustment method.

The key points of the present invention are that the data transmission device is provided with an operation mode called a waveform adjustment mode, and in this operation mode, a half-bit width pulse signal is continuously generated, and a mark/space ratio discriminator for the transmission waveform is provided. The purpose of the present invention is to adjust the pulse waveform while discriminating the mark/space ratio of continuously generated half-bit width pulse signals.

FIG. 6 is a block diagram showing one embodiment of the present invention. In FIG. 6, 11 is an oscillator, 12 is a clock pulse width adjuster, 13 is a clock driver, 14 is a clock extractor, 15 is a Manchester code converter, 16 is an AND gate for setting the waveform adjustment mode,
17 is a transmission waveform mark/space ratio discriminator;
18 is a display, and 19 is a waveform adjustment mode setting device.

To explain the circuit operation of FIG. 6, when the input signal M of the AND gate 16 is "1" (mode setter 19 is open), normal data transmission is executed.
When the input signal M is "0" (mode setter 19 is closed), the Manchester code converter 15 outputs "0" continuous data, that is, a continuous pulse signal train of half bit width from the output terminal OUT. The transmitted waveform mark/space ratio discriminator 17 is as disclosed in the specification of Japanese Patent Application No. 145077/1985 filed by the present applicant, and its output characteristics are shown in FIG. 7th
In the figure, the mark ratio is 50 (1 ± α)% (however, α
is within the allowable limit width), the discriminator 17
Outputs OK from , which causes the display 18 to
It can be made to light up an LED (light emitting diode). The clock pulse width adjuster 12 makes it possible to adjust the clock pulse width by changing the DC potential of the input waveform (approximately a sine wave) to the comparator 2C using a variable resistor 2R that can be operated from the front of the unit. , when the variable resistor is operated from the front of the transmission circuit unit, the clock signal CLK and, in turn,
The pulse width of the synchronous clock signal CK from the data terminal changes, and the output CKA of the clock extractor 14 and
CKB phase difference changes. This means that the mode setting device 19 attached to the front of the unit can be set to M=
By setting the data signal to the “0” side, the data signal set to the waveform adjustment mode is transferred to the Munciesta code converter 15.
This means that the half-bit mark width can be continuously adjusted.

When adjusting the half-bit pulse width, the optimum adjustment point can be found by the functions of the mark/space ratio discriminator 17 and the display 18 of the transmission waveform. That is, by turning clockwise (or counterclockwise), find the point at which the light emitting diode LED turns on and the point at which it turns off, and then set it to a point in between, which will be the optimal point. According to experience, the setting error in this case can be kept below ±2 ns. Transmission waveform mark/space ratio discriminator 17 and display section 18
It is also possible to attach it externally without installing it in the transmission circuit unit.

In the embodiment shown in FIG. 6, a mechanical switch is used as the mode setting device 19, and the opening/closing signal of this switch is shown to be input directly to the AND gate 16, but this does not apply to the waveform adjustment in the transmission device. The present invention can also be implemented by indirect means, such as by providing a signal or command indicating a mode, thereby driving a flip-flop circuit (not shown), and using its output. Further, in the embodiment shown in FIG. 6, the input data (DT) is cut by the waveform adjustment mode signal to generate the waveform adjustment mode signal (in this case, a continuous "0" signal). This can be done by generating a continuous "1" signal (in this case, the AND gate 16 will be configured with an OR circuit), or by generating a continuous "0" signal from the DT signal itself by a waveform adjustment mode signal or command. Alternatively, it is also possible to configure it so that "1" continues.

The transmission waveform mark/space ratio discriminator 17 is, as mentioned above, disclosed in the specification of Japanese Patent Application No. 145077/1982, and its outline will be explained below.

FIG. 8 is a circuit diagram showing a specific example of the mark/space ratio discriminator 17. In the same figure, 81
82 is a buffer amplifier, 82 is an integrator, 83 is a high potential level detection comparator, 84 is a low potential level detection comparator, and 85 is an OR circuit.

Since it is difficult in hardware technology to detect the mark/space ratio of a code pulse in units of a single pulse, in FIG. 8, the integral value of N pulses (N is an integer) is used. Now, the input to buffer amplifier 81 is marked: Space = a: b
Assuming that it is a pulse signal of (a+b=constant),
If the charge and discharge time constants of the integrator 82 are the same and the power supply voltage is E ₀ , the integrator 82
The output V ₀ of is V ₀ =E ₀ ·a/a+b. FIG. 9 shows a graph of the relationship between V ₀ and a.

Assuming that mark a is the initial value, the integrator output voltage V ₀ when it changes by ±X% is V ₀ =
Since E ₀ ·a/a+b (1±X), the reference voltage V ₁ in Fig. 8 should be changed to E ₀ a/a+b (1+X), and the reference voltage V ₂ should be changed to E ₀ a/a+b (1-X). If set, it is possible to detect that the pulse has become thicker or thinner by X% or more, that is, that the mark/space ratio has changed. good).

According to the present invention, an operation mode for continuously outputting a half-bit width pulse signal is provided, and a clock pulse width adjustment mechanism of the clock oscillator is provided so that the pulse width of the half-bit width pulse signal can be continuously finely adjusted. is provided on the front of the unit, and a mark/space ratio discriminator for the transmission pulse waveform and its display mechanism are also provided, so that adjustments can be made from the front of the unit without having to insert or remove the transmission circuit unit. Since the half-bit pulse width can be continuously finely adjusted and the display is lit when the half-bit pulse width is within the standard value, there is no need to use a synchroscope.
In terms of performance, the conventional half-bit pulse width is (standard value ±3 ns), whereas it is easily (standard value ±3 ns).
2ns).

The present invention requires a clock pulse width adjustment mechanism, a waveform adjustment mode setter, a mark/space ratio discriminator for transmission waveforms, and a display, but since these circuit configurations are simple, the increase in hardware cost is avoided. Very little. On the other hand, according to the present invention, it is extremely easy to adjust the transmission waveform in order to realize stable transmission operation, so the industrial value thereof is extremely large.

The present invention is applicable not only to optical transmission systems but also to electrical transmission systems. Moreover, it is applicable not only to transmission systems but also to pulse generators.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of a general optical transmission system, Figure 2 is a time chart of various signals during code conversion in the code converter in Figure 1, and Figure 3 is the code/decoder in Figure 1. Fig. 4 is a time chart of various signals to explain the conditions for correct decoding operation in the decoder, and Fig. 5 shows the possible decoding operation range of the decoder. 6 is a block diagram showing an embodiment of the present invention, FIG. 7 is a graph showing the output characteristics of the mark/space ratio discriminator 17 in FIG. 6, and FIG. 8 is a graph showing the output characteristics of the mark/space ratio discriminator 17 in FIG.
A circuit diagram showing a specific example of the space ratio discriminator 17,
FIG. 9 is a graph showing the relationship between the mark/space ratio of the pulse signal input to the integrator in FIG. 8 and the integrator output voltage. Description of symbols, 1, 7... Data terminal, 2... Code converter, 3... Electrical to optical converter, 4... Optical transmission line, 5... Optical to electrical converter, 6... Code demodulator,
11... Oscillator, 12... Pulse width adjuster, 13
...Driver, 14...Clock extractor, 15...
...Manchiesta code converter, 16...AND gate, 17...Mark/space ratio discriminator, 1
8...Display device, 19...Mode setting device.

Claims (1)

[Claims] 1. In a data transmission device that converts transmission data into code pulses with a predetermined mark-to-space ratio and transmits the converted data, input data is converted into code pulses with a mark-to-space ratio according to a phase difference between two clock signals. a code converter that converts and outputs the data, and a code converter that continuously converts transmission data to be transmitted in the transmission mode and data of either "0" or "1" for adjustment in the pulse waveform adjustment mode. a mode switching means for inputting the input into the pulse waveform adjustment mode; and a discriminating means for discriminating the mark-to-space ratio of the pulses continuously generated from the code converter when the mode switching means switches to the pulse waveform adjustment mode. , pulse width adjusting means for variably adjusting the mark-to-space ratio of code pulses output from the code converter by variably adjusting the phase difference between two clock signals of the code converter; and as a result of the variable adjustment, the A code pulse in a data transmission device, comprising: means for indicating when the mark-to-space ratio output from the discrimination means falls within a desired range for data transmission; waveform adjustment method. 2. In the waveform adjustment method according to claim 1, an operating section for mode switching of the mode switching means and an operating section for variable adjustment of the pulse width adjusting means are operable from the outside. A method for adjusting the waveform of a code pulse in a data transmission device, characterized in that the code pulse is provided at a certain point.