JPH03192293A - Multi-screen display system - Google Patents

Abstract

PURPOSE:To enable multi-screen control with simple hardware constitution by providing a multi-screen display control memory wherein the display start positions of a frame memory are stored corresponding to the display positions on a screen. CONSTITUTION:This system is provided with a basic timing generating circuit 1 which counts basic to a display part 5 and the physical electron beam of the screen and the multi-screen display control memory 2 stored with address information on the frame memory stored with the display contents at the position of input screen position information corresponding to the screen position information. The output of the frame memory 3 is inputted to a video converting circuit 4 and displayed on the display part 5, and the contents of the multi- screen control memory 2 and frame memory 3 can freely be altered from a processor through the bus 6 of a processor. Consequently, the multi-screen control becomes possible with the simple hardware constitution.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a multi-screen display system.

[Conventional technology]

Conventionally, this type of display method has been used to display multiple screens on one screen.
Multi-screen display was performed using software by transferring images to two frame memories at high speed.

[Problem to be solved by the invention]

This increases the amount of time the processor takes to control the display screen, which has the disadvantage of slowing down the original processing.

An object of the present invention is to provide a system that allows multi-screen control to be performed with a simple hardware configuration without requiring a processor to transfer a rectangular area of the screen.

[Means to solve the problem]

The multi-screen display method of the present invention is a multi-screen display tn method that includes a frame memory that stores content to be displayed on the display screen, and a video converter that converts the signal output from the frame memory into a video signal. It has a multi-screen display control memory that stores the display start position of the frame memory in correspondence with the display position of the screen.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

A basic timing generation circuit 1 counts basic timing for the display unit 5 and physical electron beam spots on the screen, and stores display content at a position corresponding to screen position information input from the basic timing generation circuit 1. A multi-screen display control memory 2 storing address information of the frame memory 3 is provided.

The output of the frame memory 3 is input to a video conversion circuit 4 and displayed on a display section 5.

The contents of the multi-screen control memory 2 and the frame memory 3 can be freely changed by the processor via the processor bus 6.

FIG. 2 shows the correspondence between the multi-screen control memory 2, frame memory 3, and display screens. This will be explained in more detail with reference to FIG.

FIG. 2 shows an example in which the multi-screen control memory divides the screen into a 4×4 motorix pattern as shown at 21.

The number of multi-screens is 2, and each display screen is 22.2
Assume that all 0s or 1s are displayed, such as 3.

21 indicates valid data (details are shown in FIG. 3). Areas without a circle simply indicate that data at the next address will be displayed on the screen.

Based on the data shown in 21, 22, and 23, a multi-screen as shown in 24, for example, is displayed on the screen.

FIG. 3 shows a memory configuration of the multi-screen display control memory 2 corresponding to each grid shown in FIG.

31 corresponds to a memory configuration corresponding to one grid. 3
2 is an instruction to access the frame memory 3, and the circle 21 in FIG. 2 means that there is an instruction here.

33 indicates the access address of the frame memory 3 at that time.

By doing so, if the frame memory 3 is a display-only memory, the frame memory 3 will be accessed for display only when an access instruction is given, and access contention for the display frame memory will also be reduced.

〔Effect of the invention〕

As explained above, the present invention enables display access instructions and access to multi-screen control memory without having the processor perform the transfer between memories in the frame memory for multi-window display. By specifying an address, the hardware automatically performs multi-windowing, which has the effect of reducing the load on the processor.

2 is a diagram for explaining the contents of No. 2. FIG.

DESCRIPTION OF SYMBOLS 1... Basic timing generation circuit, 2... Multi-screen display control memory, 3... Frame memory, 4... Video conversion circuit, 5... Display unit, 6... Bus.

Claims (1)

[Claims] In a multi-screen display system that includes a frame memory that stores content to be displayed on the display screen and a video converter that converts the signal output from the frame memory into a video signal, the display start position of the frame memory is set to the screen. 1. A multi-screen display system comprising a multi-screen display control memory storing data corresponding to display positions.