JPH02278287A - Video signal synthesizing system - Google Patents

Abstract

PURPOSE:To improve the picture quality by constituting this system so that with regard to a video signal which is read out, based on a synchronizing signal from a video signal generating part, it is further synthesized to a color video signal and outputted by a synchronizing signal and a subcarrier. CONSTITUTION:Based on a synchronizing signal inputted from a video synchronizing signal generating part 1, a display timing generating part 2 inputs a timing signal to a video signal generating part 3, inputs a serial video signal having plural bits to a D/A converter and converts it to an analog video signal, and based on the converted video signal, and a synchronizing signal and a subcarrier signal which are inputted, a video signal synthesizing part 5 synthesizes them to a color video signal and outputs it. Accordingly, a video signal to be sent out can be interlaced, and also, a phase between a subcarrier and a video signal, etc., can be held exactly. In such a way, the picture quality can be improved.

Description

[Detailed Description of the Invention] [Summary] Regarding a video signal synthesis method in which an image read from a memory is synthesized into a color video signal and sent out, a video synchronization signal generation section is provided, and the synchronization signal and subcarriers generated by this are provided. The video synchronization system, which generates subcarriers and synchronization signals (SYNC) to generate a color video signal, aims to improve both performance by reading out video signals from VRAM and combining them into a color video signal. a signal generating section; a display timing generating section that generates a timing signal for reading out a serial video signal (digital) having multiple bits from the VRAM based on the synchronizing signal input from the video synchronizing signal generating section; A VRAM that sends out a serial video signal (digital) having multiple bits according to a timing signal input from a display timing generation section, and a video signal sent out from this VRAM and a subcarrier signal input from the video synchronization signal generation section. , a video signal synthesis unit that synthesizes color video signals based on a synchronization signal (SYNC),
The video signal synthesis section is configured to send out a color video signal after synthesis.

[Industrial application field]

The present invention relates to a video signal composition method for combining images read from a memory into a color video signal and transmitting the resultant color video signal.

[Conventional technology and problems to be solved by the invention] Conventionally, when a computer, etc. writes a screen image to memory, reads it out, converts it into a color video signal, and displays it on a display, the computer's clock, etc. is used. In synchronization with this, the signal was retrieved from memory, converted to a video signal, and displayed. For this reason, there is a problem that the ink race is not performed strictly and that the phase difference between the subcarrier and the video signal causes a deterioration in image quality.

The present invention provides a video synchronization signal generation section, and based on the synchronization signal and subcarriers generated by the video synchronization signal generation section, VRAM
The purpose is to read out video signals from the computer and combine them into a color video signal to improve image quality.

[Means to solve problems]

1) Means for solving the problem will be explained with reference to FIG.

In FIG. 1, a video synchronization signal generating section 1 generates subcarriers and a synchronization signal (SYNC) for generating a color video signal.

The display timing generator 2 generates a timing signal for reading out a serial video signal (digital) having multiple bits from the VRAM 3 based on the synchronization signal input from the video synchronization signal generator 1.

The VRAM 3 outputs a serial video signal (digital) that waits for a plurality of bits in response to a timing signal input from the display timing generator 2.

The DAC 4 converts a digital video signal into an analog video signal.

The video signal synthesis unit 5 sends out the signal from the VRAM 3 and outputs it to the DA
Video signal (RGB) converted to analog by Q4
, a subcarrier signal, and a synchronization signal (SYNC) inputted from the video synchronization signal generating section 1 to synthesize a color video signal.

[Effect]

As shown in FIG. 1, in the present invention, based on a synchronization signal (SYNC) input from a video synchronization signal generation section 1, a display timing generation section 2 inputs a timing signal to a VRAM 3 to generate a plurality of serial bits. The video signal with DAC4
The converted video signal and the input synchronization signal (RGB) are input into
SYNC), and the video signal synthesis unit 5 synthesizes the subcarrier signal into a color video signal and outputs it.

Therefore, by combining the video signal read from the VRAM 3 based on the synchronization signal into a color video signal using the synchronization signal and subcarrier and outputting it, the video signal to be sent out is interlaced, and the subcarrier and video It becomes possible to accurately maintain the phase between signals and improve image quality.

〔Example〕

Next, the configuration and operation of one embodiment of the present invention will be explained in detail using FIGS. 1 to 4.

In FIG. 1, a video synchronization signal generating section 1 generates a subcarrier (3.58 MHz), a synchronization signal (SYNC), and the like.

The display timing generator 2 receives an input synchronization signal (SY
NC) based on *RAS, *CAS, SAs, *ACK
, *LD, *SFT, etc. (see Figs. 2 and 3).

VRAM (Video RAM) 3 is, for example, a dual-baud RAM that allows the CPU to write data in parallel to the RAM section, and also reads data (for example, 32 vias wide data) from the RAM section. This video RAM has a structure that transmits 15 bits representing color information of one pixel (see Figs. 2 and 3).

A DAC (DA converter) 4 converts a digital video signal into an analog video signal 13 (RGB).

The video signal synthesis section 5 synthesizes a color video signal (NTC3 video signal) based on the input video signal, subcarrier, and synchronization signal (SYNc).

Next, the configuration and operation shown in FIG. 1 will be sequentially explained in detail using FIGS. 2 to 4.

FIG. 2 shows an example of a configuration for reading out a video signal, and FIG. 3 shows an explanatory diagram for reading out a video signal. Here, the display timing generator 2, VRAM 3, and DAC 4 are the same as shown in FIG.

In FIG. 2, the display timing generator 2 generates *RAS, *CAS, 5AS (sum access strobe, signals for extracting data from SAM) based on the synchronization signal (SYNC) input from the video synchronization signal generator 1. ) to VRA
RAM 3-14 that constitutes M3: Input and *
ACK, *ID.

*Input SFT to shift register 3-2 (Fig. 2,
(See Figure 3 (a)).

RAM3-1 that constitutes VRAM3 is *RAS, *C
It transfers 32 bits of data to the shift register 3-3 in response to the inputs of AS and SAS (see Figure 3).
b) see). Here, as shown in Figure 3 (b), RA
The 32-bit data read from M3-1 and set in SAM3-2 is serially transferred to SAM in accordance with SAS.
Shift register 3- via D (serial data bus)
Transferred to 3 and set.

The shift register 3-3 that constitutes the VRAM 3 divides the set 32 bits into two groups, and divides the set 32 bits into two groups.
Fifteen bits of the bits are sent to the DAC 4 as a 1-pixel video signal (5 bits each for digital and ROB).

The DAC 4 converts the input 15-bit video signal (digital) into analog video (No. 3 (R)) in 5-bit increments.
, G, B).

Through the above operations, a digital video signal is read out pixel by pixel from the VRAM 3 based on the timing signal manually input from the display timing generator 2, and the digital video signal is sent to the DAC.
4 to convert it into an analog video signal (R, G, B).

FIG. 3(a) shows an operating waveform diagram of the configuration shown in FIG. 2, and FIG. 3(b) shows the structure of the dual baud 1-RAM.

Next, FIG. 4 shows an explanatory diagram of video signal synthesis.

In Figure 4 (a), the subcarrier is 3°58HH
zO color signal subcarrier.

The synchronization signal (SYNC, 15,75KHz> is NTSC
This is a horizontal synchronization signal according to the method.

The video signal (RGB) is a video signal that has been converted into analog by the DAC 4 in FIG.

The video signal includes a subcarrier, a synchronization signal (SYNC),
This is a signal that is synthesized based on video signals (RGB) as shown schematically so as to conform to the NTSC standard.

Figure 4 (b) shows the subcarrier and synchronization signal (SYNC)
, and a video signal as inputs, and outputs video No. 13.

In this embodiment, the NTSC system was explained, but the P
The same method may be applied to other methods such as AL and SECAM.

〔Effect of the invention〕

As explained above, according to the present invention, a configuration is adopted in which a video signal read from the VRAM 3 based on a synchronization signal is further synthesized into a color video signal using a synchronization signal (SYNC) and a subcarrier, and then output. Therefore, it is possible to incrace the video signal to be sent out, accurately maintain the phase between the subcarrier and the video signal, and improve the image quality.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of one embodiment of the present invention, FIG. 2 is an example of a video signal readout configuration, FIG. 3 is an explanatory diagram of successive video signals, and FIG.
The figure shows an explanatory diagram of video signal synthesis. In the figure, 1 is a video synchronization signal generator, 2 is a display timing generator, 3 is a VRAM (video signal generator), and 4 is a DA.
C, 5 represents a video signal synthesis section. 1 Embodiment of the present invention Configuration diagram 1 Figure C% (-.

Claims (1)

[Claims] In a video signal synthesis method that combines an image read from a memory into a color video signal and sends it out, there is provided a video synchronization system that generates a subcarrier and a synchronization signal (SYNC) to generate a color video signal. A signal generator (1) and a timing signal that reads a serial video signal (digital) having multiple bits from the VRAM (3) based on the synchronization signal input from the video synchronization signal generator (1). A display timing generator (2) that generates a display timing, a VRAM (3) that sends out a serial video signal (digital) having multiple bits according to the timing signal input from the display timing generator (2), and this VRAM.
A video signal synthesis section (for synthesizing a color video signal based on the video signal sent from M(3) and the subcarrier signal and synchronization signal (SYNC) input from the video synchronization signal generation section (1)); 5), and is configured to send out a color video signal after being synthesized by the video signal synthesizing section (5).