JPH02195448A - Device for tracing instruction - Google Patents

Abstract

PURPOSE:To collect data to be analyzed without increasing the execution time of a program to be traced by stopping counting operation in each prescribed interval. CONSTITUTION:A counter 1 counts up the number of instructions to be executed by counting up the number of pulses of an instruction execution signal 12 for outputting a pulse in each execution of an instruction. The output signal 13 of the counter 1 is compared with the output signal 11 of a register 2 by a comparator 3, and when both the signals coincide with each other, an interruption signal 16 is outputted, a reset signal 15 is generated to reset a flip flop (FF) 4, the counter 1 is cleared by an output 17, and the counting operation of the counter 1 is stopped. A trace memory 5 records an executed instruction address and an executed instruction word at the timing of instruction execution and stops its operation in each resetting of the FF 4, so that trace data recording the execution of plural instructions executed before the time in each interruption interval in order is obtained.

Description

[Detailed description of the invention] Skin and blood stand! The present invention relates to an instruction tracing device, and more particularly to an instruction tracing device that performs instruction tracing to obtain software dynamic characteristics.

2. Description of the Related Art In general, in an information processing apparatus, one method of measuring the dynamic characteristics of software is to use instruction tracing.

This is the traced instruction sequence-L, which generates an interrupt every time one instruction or a certain number of instructions ends, and then collects data such as the address and instruction word of the instruction executed immediately before the interrupt in the interrupt processing routine. After that, the program returns to the traced instruction sequence before the interrupt. After completing the trace, the collected data is aggregated and analyzed or used as input to a simulator to obtain the dynamic characteristics of the software.

As mentioned above, in instruction tracing in an information processing device, there are two methods: one method generates an interrupt for every instruction in the traced instruction sequence, and the other method generates an interrupt every fixed number of instructions, and traces the instructions that are executed immediately before the interrupt. There was a method to collect data for one instruction. However, each of these instruction tracing methods has the following drawbacks.

First, in the former method of generating interrupts for all instructions, the interrupt handling routine and data collection routine run each time one instruction in the traced instruction sequence is executed, so compared to the case where tracing is not performed, This method has the disadvantage that the execution time of the traced instruction sequence is extremely increased by several hundred times.

Although it depends on the recording medium, trace data can usually be collected and recorded for 105 to 107 instructions, and this number of instructions corresponds to an execution time of several seconds or less in a large computer. Therefore, this method of tracing all instructions has the disadvantage that it is only possible to collect data on a very limited portion of a normal business program.

On the other hand, the latter method of interrupting every fixed number of instructions can solve the drawbacks of the former method. However, it has the following drawbacks.

Some of the dynamic characteristics of software that are not analyzed from the contents of instruction trace data are related to the order of instruction execution.For example, in order to obtain data regarding disturbances in a computer's pipeline, it is necessary to analyze the order in which instructions are executed. There is. In such a case, the latter method has the drawback that analysis cannot be performed from trace data obtained by sampling data of one instruction every certain number of instructions.

The present invention was made to solve the above-mentioned two methods, and it is possible to minimize the increase in the execution time of the traced program and analyze the order in which instructions are executed. The purpose is to provide an instruction tracing device capable of collecting possible data.

An instruction tracing device according to the present invention includes a counting means that starts a counting operation in response to a counting start command and counts up each time an instruction is executed, and while the counting means is performing the counting operation. The present invention is characterized by comprising a tracing means for tracing trace data regarding executed instructions, and a counting stop means for stopping the counting operation of the counting means at predetermined intervals.

"X cliff" Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of an instruction tracing device according to the present invention. In FIG. a trace memory 5 as a means for recording a plurality of sets in the order of execution; a counter 1 as a counting means for counting the number of executed instructions; a flip-flop 4 for controlling the setting and resetting of the counter 1;
The comparator 3 is a means for sending an interrupt signal 16 when the count value of the counter 1 does not reach the specified value specified by the register 2. ing.

In addition, 18 is an address signal of an execution instruction, 19 is an execution instruction B signal, 10 is an interrupt interval designation signal activated by an instruction specifying an interrupt interval, 12 is an instruction execution signal whose pulse is issued for each instruction, and 13 is an execution instruction signal. Output signal of counter 1, 1
4 is a counting activation signal activated by an instruction to start counting the number of executed instructions; 15 is a reset signal for the flip-flop 4; and 17 is an output signal of the flip-flop 4.

The features of this embodiment include a counter 1, a register 2, and a comparator 3.
, a flip-flop 4 and a memory 5 are provided to perform tracing.

Next, the operation of this embodiment will be explained. Note that in this embodiment, an interrupt interval specification instruction that specifies an interrupt interval, a counting start instruction that starts counting the number of executed instructions, and a transfer instruction that transfers trace data in the trace memory to the main memory are defined. There is.

First, when an interrupt interval designation instruction is executed, the designated value is set in the register 2 by the interrupt interval designation signal 10. Subsequently, when a count start instruction for the number of executed instructions is executed, the flip-flop 4 is set by the count start signal 14. When the flip-flop 4 is set, the output signal 17 activates the counter 1 and starts recording the instruction address and instruction word in the trace memory 5.

The counter 1 counts the number of executed instructions by counting the number of pulses of the instruction execution signal 12, which is output every time one instruction is executed. The output signal 13 of the counter 1 and the output signal 11 of the register 2 are ratio-axed by a comparator 3. When these two values match, the comparator 3 outputs an interrupt signal 16 to generate an interrupt, and also outputs a reset signal 15 to reset the flip 70 knob 4. In this way, when the counter 1 is cleared by the output signal 17 of the flip-flop 4, the h1 number of executed instructions stops. At the same time, recording to the trace memory 5 for the next instruction is also stopped.

The trace memory 5 activated by the output signal 17 of the flip-flop 4 records the execution instruction address and execution instruction word at the timing of the instruction execution signal 12. This trace memory 5 can record a plurality of sets of instruction addresses and instruction words according to its contents, and the recording is performed while updating the addresses on the trace memory 5. Therefore, the most recently executed instruction and a plurality of sets of previous instructions are sequentially recorded in the trace memory 5. Furthermore, recording to the trace memory 5 is stopped when the flip-flop 4 is reset.

The interrupt processing routine activated by the interrupt signal 16 described above executes a transfer instruction to transfer the data in the trace memory 5 to a trace buffer in the main memory (not shown), and then executes a counting start instruction and executes the interrupt processing routine. It exits and passes control to the original process, which causes the operations described above to occur again. Note that when the trace buffer becomes full, trace data is output to a recording medium (not shown) by an interrupt processing routine.

When the above processing is repeated, it is possible to obtain trace data in which a plurality of previously executed instructions are recorded in the order of their execution at each interrupt interval according to the value set in register 2. By aggregating and analyzing this data after tracing, it is possible to obtain software dynamic characteristic data such as the frequency of occurrence of instruction codes, the average data length of variable-length instructions, and the amount of pipeline disturbance that depends on the order of instruction execution. It can be done.

Furthermore, by changing the value set in register 2, the interval at which the interrupt processing routine is entered can be changed. In other words, according to the present invention, since the interval at which the interrupt processing routine is entered can be configured to be variable, the increase in execution time can be minimized. The present invention records execution instruction words and their instruction addresses in a trace memory in the order of execution, generates an interrupt every time a specified number of instructions are executed, and outputs the data in the trace memory, thereby executing a traced program. This has the effect that data that can be used to analyze the instruction execution order can be collected without significantly increasing the time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an instruction tracing device according to an embodiment of the present invention. Explanation of symbols of main parts 1... Counter 2... Register 3... Comparator 4... Flip-flop 5... Trace memory

Claims (1)

[Claims] (1) A counting means that starts a counting operation in response to a counting start command and counts up every time an instruction is executed, and while the counting means is performing the counting operation, traces trace data related to executed instructions. 1. An instruction tracing device comprising: tracing means for performing the tracing; and counting stopping means for stopping the counting operation of the counting means at predetermined intervals.