JP5591859B2 - 基板の分離方法及び分離装置 - Google Patents
基板の分離方法及び分離装置 Download PDFInfo
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- JP5591859B2 JP5591859B2 JP2012068287A JP2012068287A JP5591859B2 JP 5591859 B2 JP5591859 B2 JP 5591859B2 JP 2012068287 A JP2012068287 A JP 2012068287A JP 2012068287 A JP2012068287 A JP 2012068287A JP 5591859 B2 JP5591859 B2 JP 5591859B2
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/11—Methods of delaminating, per se; i.e., separating at bonding face
- Y10T156/1168—Gripping and pulling work apart during delaminating
- Y10T156/1189—Gripping and pulling work apart during delaminating with shearing during delaminating
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/19—Delaminating means
- Y10T156/1994—Means for delaminating from release surface
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- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Description
図1は、第1の実施形態の基板分離方法の工程を順に示す概略断面図である。なお、図1及びこれ以降に示す図面はいずれも、分離する2枚の基板(半導体ウエハ及び支持基板)の周縁部及びその近傍のみを示している。
また、除去工程において半導体ウエハ14の周縁部をブレード30により除去しており、エッジトリミング加工を施したのと同様の効果が得られるため、別工程での半導体ウエハに対するエッジトリミング加工を省くことができる。すなわち、予めエッジトリミング加工した半導体ウエハを用いずとも、分離後のウエハ割れ、ウエハ欠けを抑制することができる。
図2は、第2の実施形態の基板分離方法の工程を順に示す概略断面図である。
さらに、除去工程において半導体ウエハの周縁部をブレード30により除去しており、エッジトリミング加工を施したのと同様の効果が得られるため、別工程での半導体ウエハに対するエッジトリミング加工を省くことができる。
Claims (6)
- 表面の周縁部を除く領域に剥離層が形成された第1の基板と、前記第1の基板の表面の少なくとも前記剥離層を含む領域に接着剤層を介して貼り合わせた第2の基板とを分離する基板分離方法であって、
前記第2の基板周縁部を、少なくともその直下の前記接着剤層表面が露出し、かつ前記第1の基板の周縁部と前記第2の基板の間に前記接着剤層が残存して、前記第1及び第2の基板間の接着が保持されるように、物理的に除去する除去工程と、
前記除去工程後、前記接着剤層を溶解する溶解工程と
を具備することを特徴とする基板分離方法。 - 除去後の前記第2の基板の外縁が、平面視で前記剥離層の外縁より外側に位置するように、前記除去工程において前記第2の基板周縁部を除去することを特徴とする請求項1記載の基板分離方法。
- 前記除去工程において、前記第1の基板周縁部上の接着剤を前記第1の基板近傍まで除去することを特徴とする請求項2記載の基板分離方法。
- 除去後の前記第2の基板の外縁が、平面視で前記剥離層の外縁より内側に位置するように、前記除去工程において前記第2の基板周縁部を除去することを特徴とする請求項1記載の基板分離方法。
- 前記接着剤層の厚みが、5〜100μmであることを特徴とする請求項1乃至4のいずれか1項記載の基板分離方法。
- 表面の周縁部を除く領域に剥離層が形成された第1の基板と、前記第1の基板の表面の少なくとも前記剥離層を含む領域に接着剤層を介して貼り合わせた第2の基板とを分離する基板分離装置であって、
前記第2の基板周縁部を物理的に除去する除去手段と、
前記除去手段によって周縁部が除去された第2の基板の周囲に前記接着剤層を溶解する溶解液を供給する供給手段と
を具備することを特徴とする基板分離装置。
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JP2012068287A JP5591859B2 (ja) | 2012-03-23 | 2012-03-23 | 基板の分離方法及び分離装置 |
TW102106790A TWI529799B (zh) | 2012-03-23 | 2013-02-26 | 基板之分離方法及分離裝置 |
CN201310063932.6A CN103325733B (zh) | 2012-03-23 | 2013-02-28 | 基板的分离方法以及分离装置 |
US13/790,266 US8771456B2 (en) | 2012-03-23 | 2013-03-08 | Method of manufacturing a semiconductor device and substrate separating apparatus |
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-
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- 2013-02-26 TW TW102106790A patent/TWI529799B/zh active
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US8771456B2 (en) | 2014-07-08 |
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CN103325733B (zh) | 2016-09-28 |
US20130248099A1 (en) | 2013-09-26 |
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